Power11 hits the market this month

IBM made the date official: Power11 launches July 25, with the 32 AI-core Spyre Accelerator expected to follow in the fourth quarter. IBM's launch products will be the full-rack Power E1180 with up to up to 256 SMT-8 Power11 cores with 2MB L2 each and up to 128GBMB of shared L3 (8GBMB per core with the correct figures in the Red Book) with 64TB of DDR5 memory, the midrange 4U Power E1150 with up to 120 Power11 cores and 16TB of DDR5, the junior 4U Power S1124 with up to 60 Power11 cores with 8MB of L3 per core and 8TB of DDR5, and the "low-end" 2U Power S1122 with up to 60 Power11 cores and 4TB of DDR5. The processors come in 16, 24 or 30-core versions; the E systems have four sockets (with up to four nodes in the E1180) and the S systems have two. All four systems can run AIX and Linux, and all systems except for the E1150 can run IBM i. As is usual for IBM's initial offerings, internally they look like straight-up implementations of the Blueridge reference platform and should be expected to scale accordingly. And if you have to ask how much they are, well ...

It's notable that the "meet the family" document IBM links from the press release — so we can assume it's officially blessed — says nothing about OMI, only DDR5 RAM. However, IBM has made it clear that Power11 will continue to have OMI, since enterprise Power10 customers would certainly have had an investment in it, and the upper tier datasheets reference OMI channel capacity. We don't know if the OMI firmware for Power11 is open and libre (it was not in Power10), nor if the Synopsys IP blocks reportedly used in Power10's I/O are still present, because IBM didn't say, or if the "low-end" binned CPUs are different in this regard.

If there are going to be third-party Power11 systems, and IBM didn't say anything in the press release about them either, they generally follow six to twelve months after. We have heard little from Raptor since about the SolidSilicon S1 and X1, and because all indications suggest the S1 is a Power10 implementation without the crap, this already puts them behind the curve. That said, adapting Power11 should be possible to any next-generation Power ISA workstation: the Talos II and T2 Lite are fairly straightforward reworks of the reference POWER9 Romulus design, and Blackbird is still Romulus, just in a much smaller form factor. These first-generation P11 boxes, as presumably performant as they are, wouldn't be nice to have in an office and IBM just doesn't do end user sales. Creating a T3 based on Blueridge would seem to be the best way forward for Raptor to regain the top slot in OpenPOWER workstations — assuming the architecture is still open.

[UPDATE: I have been advised by an anonymous individual with knowledge of the situation that a new Raptor announcement on products under development is scheduled for Q1 2026 ... which would be "six to twelve months after" as predicted. "Open firmware" is specifically mentioned and absolutely planned. It's worth pointing out that both Raptor and SolidSilicon are now listed as top-tier Platinum members for OpenPOWER parallel with IBM itself. That implies SolidSilicon is still in the mix and IBM is still backing OpenPOWER. They stressed this is not an official announcement, so you take it for what it's worth.]

Enter the IBM z17 mainframe with Telum II (more clues for Power11?)

IBM is announcing their new z17 mainframe, based on the Telum II (see our notes on the original Telum CPU). IBM first announced the Telum II last year and the z17, its intended first deployment, has now emerged just about bang on time.

Still, we're obviously more interested in Power ISA around here, and IBM has yet to say much substantive about Power11 other than the usual assertions of additional power efficiency, more cores and higher clock. It is also expected to offer DDR5 support for enhanced memory bandwidth, though this is all but certain to require OMI DDR5, not direct-attached RAM as in our Raptor boxes. But it's often instructive to look at what's going on with IBM mainframes for microarchitectural clues now that Z-machines and IBM "big" Power chips often have the same underlying design.

The first Telum strongly emphasized cache. Interestingly, it did so by dropping categorial L3 and L4 altogether: instead, IBM developed a strategy where cores could reach into the L2 of other cores and treat that as L3, and reach into other chips' cache and treat that as L4. Each chip had eight cores and 32MB of L2 per core, giving lots of opportunity for more efficient utilization. The picture of the Telum II die above shows that IBM has not substantially deviated from this plan, using the same 128K/128K L1 but increasing L2 to 36MB per core. IBM's documentation says that there are eight cores per chip, but at a cursory glance there appear to be ten on the die, likely for yield reasons (two cores would be fused off). Assuming these dud cores still have useable cache, however, that matches IBM's specs of up to 360MB of effective L3 and a whopping 2.88GB of L4 per system.

The cores top out at 5.5GHz with various microarchitectural improvements such as better branch prediction and faster store writeback and address translation, all the typical kinds of tweaks that would also likely show up in Power11. Power11 is also expected to remain on 7nm with a "refined" process instead of moving to 5nm. (It's possible that Power12, whenever that arrives, may skip 5nm entirely.)

Of course, the marketing material on z17 is all AI all the time. IBM's claimed AI improvements seem to descend from an enhanced "DPU" ("data processing unit") with its own 64K (32K instruction/32K data) L1 cache capable of 24 trillion INT8 operations per second, the kind of bolt-on hardware that could also be incorporated or scaled-down into other products. In fact, such a product exists already, shown above: IBM's Spyre Accelerator, which is basically 32 more DPUs. These attach over PCIe and would be a good alternative to our having to scrabble around with iffy GPU support, assuming that IBM supports this in Linux (but they already do for LinuxONE systems, so it shouldn't be much of a stretch).

If you have the money and a convenient IBM salesdroid who actually answers the phone, you too can horrify your electrical utility starting in June. As for those of us on the small systems side, Power11 in whatever form it ends up taking is not anticipated to emerge until Q3 2025, presumably as what will be the E1100 series starting with the E1180 and going down. This further shrinks the production and sales window for the long-anticipated Raptor S1 systems, however, and there hasn't been a lot of news about those — to say nothing of what the Trump tariffs could mean for rolling out a new system.

Microwatt goes multiprocessor

It's been awhile since we dropped in on Microwatt, the OpenPOWER VHDL softcore. Microwatt now runs on multiple FPGA boards or can be run (slowly) in simulation, and is capable of booting Linux. Raptor uses Microwatt for the Arctic Tern soft BMC. Although it still doesn't support vector instructions, recent commits have added an FPU and many of the standard special-purpose registers, and the newest ones now add support for SMP.

The newest pull request, currently to be committed, allows more than one processor core to be created by adding an NCPUS option to soc.vhdl. These cores can be debugged separately with JTAG and have the same view of memory and the same timebase value, and can be individually activated. For interrupts, they each have their own presentation controller in the XICS.

Although Microwatt cores are currently of only modest performance, more cores — if you have the space — can certainly improve its throughput and the range of applications it could be practical for. Unfortunately, we've still yet to hear anything new about the Solid Silicon S1 or how libre Power11 will end up being. Hopefully as the Microwatt design gets more efficient, at least the very smallest Power ISA systems will now have some additional flexibilities to work with.

A RISC-V option for your Framework laptop (how about POWER next?)

Many of you have heard of the Framework laptop, a modular system that you can DIY from a mainboard and parts or purchase fully assembled. The designs are open-sourced on Github and Framework has actively been trying to develop an ecosystem around the product.

The part that's potentially most interesting is the mainboard. Framework actively advertises the notion that you can just replace components piecemeal to upgrade, including the logic board, yet keep the same display, port loadout, keyboard, battery and so on if they still work. You can even stick the old one in a case and use it for something else, which is not only environmentally conscious but very customer-friendly.

Now the first third-party Framework mainboard is coming, and it's not x86: it's RISC-V, and it fits in their 13" chassis. A RISC-V option is of course not new in portable computers; I reviewed the ClockworkPi RISC-V DevTerm a couple years ago, which can take either an RPi ARM compute module or an Allwinner D1 based on the 1GHz RV64IMAFDCVU XuanTie C906. However, the CPU is more powerful than that, a quad-core StarFive JH7110 with four SiFive U74 cores. The new Framework mainboard is based on an existing DeepComputing laptop product called "Roma;" DeepComputing now sells a more advanced version in a laptop of their own based on the octocore SpacemiT K1. Combined with the generally well-regarded Framework loadout and creature comforts, this could definitely be a product to watch.

That said, much as I was disappointed with the performance of the RISC-V DevTerm, most people are going to be similarly unimpressed with the performance of this one. Phoronix's benchmarks placed it well below the Raspberry Pi 4 (and the Orange Pi 5 crushed it), and Framework is trying to set expectations low by saying, "The peripheral set and performance aren’t yet competitive with our Intel and AMD-powered Framework Laptop Mainboards." That would certainly be an understatement, and is yet another example of the self-licking RISC-V ice cream cone getting ahead of its skis on real-world throughput. Framework also apologetically notes that the board "has soldered memory and uses MicroSD cards and eMMC for storage, both of which are limitations of the processor." Still, it's (soon to be) available and functional, and it could be mounted in one of those small desktop cases, so if you want a sidecar RISC-V machine to play with you've got another option better than yet another SBC.

But more important than that: it proves that you can put really any architecture on such a board and take advantage of the Framework, uh, framework instead of reinventing the wheel completely. So, instead of these various attempts at building a PowerPC laptop, why isn't there a Power ISA Framework mainboard? Wouldn't that approach just make more sense?

A baby Power10, if you're desperate

Are you really desperate to have your own Power10 (libre issues notwithstanding) while we wait for S1? IBM historically releases "little" versions of their servers after the launch systems have exhausted their novelty and now it's time for this generation's. If you've got 2Us in your rack, a wad of money in your wallet and an IBM salesdroid in your Rolodex, in about a month the Power S1012 could be yours.

Based on the size of the board, no one would mistake this for a Blackbird, yet it's pretty much the IBM equivalent: a single socket supporting up to eight cores. It comes as either a rackmount or in IBM's mega-tower case with four RAM slots for up to 256GB of memory. Tape and RAID are options, and it boots Linux, AIX or IBM i. If you need more sockets, there's the S1022 with a second one in the same form factor, and if you need more capacity, the 4U S1014 has you covered — and is still tower-ready in the same way that Orson Welles was suit-ready.

IBM hasn't shown as much love for their baby towers recently, though. In fact, there wasn't an IBM 2U option at all in POWER9's generation (no doubt much to Raptor's relief); if you wanted Big Blue in a Littler Box, you had to buy the 4U S914 instead (or a leftover POWER8 S812). Also, it seems like the S1012 tower's power output is gimped somewhat: the spec sheet says the rackmount can put 240W through the single CPU socket but the tower manages "only" 195W, which limits your core count. In the glory days, though, we had things like this.

This is my long-trucking POWER6 p520, the 2U baby of the old POWER6 generation. You could get it with two sockets and the same CPUs as its larger siblings, and since the POWER6 was SMT-2, I've got four threads running on its single LPAR. It has RAID and an optical drive and 16GB of RAM, with more available if you were willing to do battle with IBM Capacity on Demand codes. All in all, not bad for 2009.

Of course, I'm being very facetious in this article, because naturally none of these towers are really workstation substitutes. The S1012 (and certainly the S1022) is undoubtedly as loud as the POWER6, and while the POWER6's back baffle reduces some of the noise, it correspondingly reduces ventilation. There's a reason, after all, that I gave the thing its own room with the other geriatric servers. Plus, IBM doesn't talk to us end users: you'll have to buy it through a VAR or authorized rep. That was why I said screw it to buying a brand-spanking new POWER7 back in the day and got the POWER6, because it was used, cheaper and actually available. Which reminds me — if you have to ask how much it is, you almost certainly can't afford it. Hope you've been saving your pennies for the S1.

End of the road for PowerPC 40x in Linux

The original PowerPC 400-series embedded chips are no longer supported in the Linux kernel as of today. Despite its prior design wins in many set top boxes, service processors and network equipment, there are no known current consumers of the code and no maintainers. The change affects the 401, 403 and 405, but in case you were worried the change is irrelevant to the embedded PowerPC 405 variant used as an on-chip controller for OpenPOWER, since it runs the Self-Boot Engine and not mainline Linux. It also does not extend to the 44x and above, like the Amiga clone Sam440ep and Sam460ex (AmigaOne 500) boards, which use the AMCC 440EP and 440-derived AMCC 460EX respectively and thus remain supported.

Early Power11 signals in the kernel

A number of people have alerted me to some new activity around Power11 in the Linux kernel, such as this commit and a PVR (processor version register) value of 0x0F000007. It should be pointed out that all this is very preliminary work and is likely related to simulation testing; we don't even know for certain what node size it's going to be. It almost certainly does not mean such a CPU is imminent, nor does this tell us when it is. Previous estimates had said 2024-5, but the smart money says no earlier than next calendar year and probably at the later end of that timeframe.

That said, the reputed pressures around Power10 that caused closed IP to be incorporated are hopefully no longer as acute for Power11, and off-the-books discussions I've had suggest IBM internally acknowledges its strategic mistake. That would be good news for Power11, but it's not exactly clear what this means for Solid Silicon and the S1 because S1's entire value proposition is being Power10 without the crap. While S1 will certainly come out before Power11, we still don't know when, and if there's a short window between S1 and a fully open Power11 then S1 could go like Osborne.

"Short" here will be defined in terms of how much work it takes to adapt the Power11 reference system. IBM understandably always likes to sell its launch systems first and exclusively before the chips and designs trickle down. The Talos II and to a lesser extent the Blackbird are a relatively straightforward rework of Romulus (POWER9's reference), so one would think adapting Power11 would similarly require little adjustment, though Romulus used the ASPEED BMC and any Raptor Power11 would undoubtedly use (Ant)arctic Tern/Solid Silicon's X1. In contrast, there'd be a bit more work to port Rainier (Power10) to S1 since the RAM would be direct-attach instead of OMI and there may be differences to account for with PCIe, plus the BMC change. The last estimate we had for the S1 machines was late 2024; putting this all together and assuming that date is at all accurate, such a system may have a year or two on the market before Power11 exits its IBM-exclusive phase.

That could still be worth it, but all of this could be better answered if we had a little more insight into S1 and its progress, and I've still got my feelers out to talk to the Solid Silicon folks. You'll see it here first when I get a bite.

Firmware 2.10 available for Talos II and Blackbird

Raptor has released firmware updates for Talos II and Blackbird (version 2.10). I'm still between residences but I intend to install this myself on both my machines in the next couple days. The biggest update is that Skiroot makes a big jump to kernel 6.6 which hopefully should solve glitches like Petitboot pooping its pants on XFS volumes with stuck log entries, not that that's ever happened to me twice, and there is a tweak for sporadic crashes on systems with more than 8 cores. Officially this wasn't a supported configuration on the Blackbirds, but there are people who try, and it's definitely appreciated for T2 and T2 Lite. Hostboot, HCODE, Skiboot, Skiroot and Petitboot are also all pulled up to current, InfiniBand drivers are now live in Skiroot (and thus Petitboot), and the Hostboot runtime has been compressed to give you more headroom in the BOOTKERNFW partition.

An intriguing change for the future also in this release is to enable firmware component signature checks during IPL by default. But using what key, you ask? You didn't sign anything! The key is the insecure known key in the official firmware builds, which adds no security currently and doesn't look any different from before, but provides the framework for you signing it later. At that point you'd sign it with your own key and provide that; now everything is already set up, and the process should "just work" with fewer steps. This is a long-running entry I keep intending to write and this is a good excuse to do that in the near future.

ICYMI: Hugo Landau explains how the Broadcom BCM5719 was freed

In case you missed it, Hugo Landau in December appeared at the 37th Chaos Communication Congress (37C3) to talk about how the Broadcom BCM5719 was freed in our favourite OpenPOWER systems. Sure, he's got lots of information on his blog, and you can look at the firmware written to his spec by Evan Lojewski, but there's nothing like hearing him explain the process of how he got it all open (and your jaw dropping to hear that the firmware never checks the signature). It's a good hero story but also reinforces the standard principles of how to make hardware your own, including hardware not particularly amenable to subversion. And Broadcom's a good example of that, by golly. Thanks to Jeremy Rand for the tip.

The next Raptor OpenPOWER systems are coming, but they won't be Power10

I'd like to first start out by saying I've been aware of new developments but made certain promises to keep my mouth shut until all the parties were ready to announce. (Phoronix is not so constrained.) Many of you noted an offhand comment in this YouTube video about Raptor announcing a new Power10 system. That got a lot of people excited, because while our POWER9 systems are doing well, in 2023 this dual-8 64-thread POWER9 is no longer cutting edge and we need new silicon in the pipeline to keep the ecosystem viable.

Raptor yesterday officially announced that we're not getting Power10 systems. The idea is we're going to be getting something better: the Solid Silicon S1. It's Power ISA 3.1 and fully compatible, but it's also a fully blob-free OpenPOWER successor to the POWER9, avoiding Power10's notorious binary firmware requirement for OMI RAM and I/O.

I asked Timothy Pearson at Raptor about the S1's specs, and he said it's a PCIe 5.0 DDR5 part running from the high 3GHz to low 4GHz clock range, with the exact frequency range to be determined. (OMI-based RAM not required!) The S1 is bi-endian, SMT-4 and will support at least two sockets with an 18-core option confirmed for certain and others to be evaluated. This compares very well with the Power10, which is also PCIe 5.0, also available as SMT-4 (though it has an SMT-8 option), and also clocks somewhere between 3.5GHz and 4GHz.

S1 embeds its own BMC, the X1 (or variant), which is (like Arctic Tern) a Microwatt-based ISA 3.1 core in Lattice ECP5 and iCE40 FPGAs with 512MB of DDR3 RAM, similar to the existing ASpeed BMC on current systems. X1 will in turn replace the existing Lattice-based FPGA in Arctic Tern as "Antarctic Tern," being a functional descendant of the same hardware, and should fill the same roles as a BMC upgrade for existing Raptor systems as well as the future BMC for the next generation systems and a platform in its own right. The X1 has "integrated 100% open root of trust" as you would expect for such a system-critical part.

Raptor's newest systems are planned for late 2024. There will be tiering, so most likely (though not confirmed) Blackbird, T2 and T2 server classes of systems will be available under new names. Price? Well, you'll just have to wait and see.

Solid Silicon is definitely a new name in the Power ecosystem and we don't know a lot about them. There's a web page, but the TwXitter and LinkedIn links are unpopulated as of this writing, and it's maddeningly minimal on actual content. Tim confirmed they are a new licensee and have been working on the design for at least a couple years. The press release gives a 737 area code, which is Austin, Texas, and the only Solid Silicon business entry I could find for Texas is this one for Solid Silicon Technology LLC in Plano. I'm told this isn't them, so if anyone from Solid Silicon would like to lift the corporate veil a little, drop me a line at ckaiser at floodgap dawt com. [UPDATE: The LinkedIn was updated after this posted, listing Todd Rooke as CEO. Rooke's listing indicates past experience with FPGAs, as well as his time at HPE and Microsoft. His location is given as Colorado Springs but Colorado lists no company by that name. Hopefully more to come.]

But besides new systems in the offing, it's also good news that we're getting — we hope — performant OpenPOWER chips that aren't from IBM. I don't have anything against IBM; I've worked with IBM hardware for literally decades, and my home server is a classic POWER6 that just keeps on truckin'. But IBM designs chips to benefit IBM's world, which is server rooms (ask anyone who's got one what it's like to share an office with a POWER8), and IBM doesn't do end-user sales. If Raptor has a good partner here who can design solid OpenPOWER chips for workstations and small servers, not traditionally IBM's present domain but one important for them to maintain if they want OpenPOWER to stay relevant, then in around a year we should be in for a treat — and a very rosy near future.

It's a plug and pray night

The Talos II got an upgrade today but not without a lot of messing around. Some of you have noted I've said little about further Firefox JIT updates and that's because of 1) $DAYJOB and 2) running dangerously low on space on the 1TB Samsung 960 EVO NVMe SSD mounted on /home, so having lots more source code sitting around wasn't happening.

Well, as of Monday I'm now officially between jobs (don't worry, I'll be getting a paycheck again in October) and I finally got the T2 to cooperate with a new 2TB Samsung 980 PRO. At the same time I also replaced the Raptor BTO Marvell 88SE9235 SATA card with a JMicron JMB582 card. It's two ports instead of four, but I'm only using it for the two optical drives, and it seems to be much more reliable than the Marvell which would sometimes come up with drives and other times stall out.

But getting them to all work together was unexpectedly tricky. Here's what's in there now.

% lspci
0000:00:00.0 PCI bridge: IBM POWER9 Host Bridge (PHB4)
0000:01:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Ellesmere [Radeon Pro WX 7100]
0000:01:00.1 Audio device: Advanced Micro Devices, Inc. [AMD/ATI] Ellesmere HDMI Audio [Radeon RX 470/480 / 570/580/590]
0001:00:00.0 PCI bridge: IBM POWER9 Host Bridge (PHB4)
0001:01:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd NVMe SSD Controller PM9A1/PM9A3/980PRO
0002:00:00.0 PCI bridge: IBM POWER9 Host Bridge (PHB4)
0003:00:00.0 PCI bridge: IBM POWER9 Host Bridge (PHB4)
0003:01:00.0 USB controller: Texas Instruments TUSB73x0 SuperSpeed USB 3.0 xHCI Host Controller (rev 02)
0004:00:00.0 PCI bridge: IBM POWER9 Host Bridge (PHB4)
0004:01:00.0 Ethernet controller: Broadcom Inc. and subsidiaries NetXtreme BCM5719 Gigabit Ethernet PCIe (rev 01)
0004:01:00.1 Ethernet controller: Broadcom Inc. and subsidiaries NetXtreme BCM5719 Gigabit Ethernet PCIe (rev 01)
0005:00:00.0 PCI bridge: IBM POWER9 Host Bridge (PHB4)
0005:01:00.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge (rev 04)
0005:02:00.0 Multimedia video controller: ASPEED Technology, Inc. ASPEED Graphics Family (rev 41)
0030:00:00.0 PCI bridge: IBM POWER9 Host Bridge (PHB4)
0030:01:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd NVMe SSD Controller SM961/PM961/SM963
0031:00:00.0 PCI bridge: IBM POWER9 Host Bridge (PHB4)
0032:00:00.0 PCI bridge: IBM POWER9 Host Bridge (PHB4)
0033:00:00.0 PCI bridge: IBM POWER9 Host Bridge (PHB4)
0033:01:00.0 SATA controller: JMicron Technology Corp. JMB58x AHCI SATA controller

Originally, the NVMe drive I bought was a 2TB WD Black SN850X. This worked great in an external USB3 enclosure. I rsynced /home to it and put it into the PCIe carrier and restarted, and it failed to show up in Petitboot, lspci or Fedora. I tried a different passive adaptor on the off-chance that had something to do with it and moved it around the available slots, but nothing made it work. Later I found an old post on the Raptor forums reporting a similar problem, nor was I willing to get one of those pricey switched multi-M-2 cards to try.

Since the boot drive is (still) a Raptor BTO Samsung 960 and the drive I was replacing was also a Samsung, I decided the cheaper option would be to just buy another Samsung, though the TLC flash in the 980 PRO makes it more like a 980 EVO in my book. Anyway, I left everything copying overnight, came back this morning, pulled the PCIe carrier, swapped the SSD sticks and fired it back up, and Petitboot wouldn't see it either. (I had installed the JMicron card at the same time and it did show up, but that wasn't too helpful just then.) At this point two drives acting exactly the same way, including one that would be very likely to work, made me suspicious this was a configuration problem.

This is a fully-populated dual-8 T2, so both CPUs and all five PCIe slots are live. At this point, other than the BMC, Ethernet and USB, the only device on the first CPU's slots was the Raptor BTO AMD Radeon Pro WX7100 workstation card in the 16x (the 8x is open); the original NVMe SSDs and the Marvell SATA card occupied the three lower slots (16x, 16x, 8x) handled by the second CPU.

I started off by pulling the SATA card completely and just leaving the two SSDs and the WX7100. Sforza POWER9s support three PCIe controllers (PECs), 48 PCIe lanes and six PCIe host bridges (PHBs) per processor module. In theory this looks like three x16 slots per CPU, but in practice PEC1 on each CPU is always bifurcated x8x8 and PEC2 is optionally trifurcatable x8x4x4. Plus, there are on-board resources also competing for those lanes, so some of the T2 slots are necessarily bifurcated and others aren't. The x8 slot on CPU0 is actually a bifurcated PEC1, with x4 allocated to the Microsemi PM8068 BTO option (whether present or not), and its phantom PEC2 is split between the BMC, the Broadcom Ethernet controllers and the TI USB 3.0 host controller. On CPU1, slot three is PEC2 x16, slot four is PEC0 x16 (never bifurcated on either CPU), and slot five is PEC1 x8, with x4 allocated to OCuLink.

The old 960 EVO and the unresponsive new 980 were originally in slot 5 (CPU1, PEC1) and the boot 960 in slot 4 (CPU1, PEC0). Moving the new 980 into slot 1 (CPU0, PEC1) finally allowed it to coexist and be mountable with the boot 960, so next I put the JMicron SATA card into the newly available slot 5 and restarted ... and the x16 video card in slot two (CPU0, PEC0) failed to come up. Petitboot was fine on serial.

Figuring I had exceeded some maximum on CPU0 somehow, I moved the WX7100 to the open x16 on slot 3 (CPU1, PEC2). Not only did I still get a black screen, but I also got the dreaded PHB Freeze/Fence detected ! on that slot in the Hostboot output, which usually means the system planar is not happy with you now.

I returned to the immediately preceding configuration, returning the video card to CPU0 PEC0 in slot 2. Putting the 960 into slot 5 and the JMicron card into slot 4 also failed, so within those constraints the only thing I hadn't tried yet was putting the JMicron SATA card in slot 3 instead of slot 5. This seemed technically disgusting since I was wasting an entire x16 slot on a miserable little x1 card, and of course it worked.

The JMicron has a bright blue LED, so with the final configuration and the existing LEDs on the board I suppose I could slap a Honda hood ornament on the front and go street racing. This configuration leaves slot 5 unoccupied, which is an x8, so in the end it's no worse than what I started with (slot 1 was originally free).

I'm not sure what the moral of the story is here. It's possible the Marvell was misbehaving because of conflicts too, but it never failed to show up in lspci even though the drives connected to it sometimes did, whereas the new NVMe drive didn't even show up as a device, let alone a mountable filesystem. It also seems like the Radeon doesn't like being in a bifurcatable slot, though to test this I'd have to try it in slot 4. On the other hand, slot 5 should have been exactly the same as slot 1, yet neither the new 980 nor the SN850X would work in slot 5, nor would the JMicron card. Perhaps the SN850X would work fine in slot 1 as well. If I'm inside the case again to do something else, I should test some or all of these theories.

One thing that is worth remembering is that a PCIe device that initially fails to work or be recognized when installed may simply be picky about where you put it depending on what other devices are present. Unfortunately that means a whole lot more trial and error when you have multiple devices, and tonight I'm not interested in pushing my luck further. Once I've built the next Firefox (article to follow), then it's time to get back to work with a terabyte more space to expand into. And that'll hold a lot of source trees.

POWER9 and tagged memory and why you care

Another excellent analysis by Hugo Landau (using findings from Jim Donoghue) on the presence — and accessibility — of hardware-supported tagged memory in the POWER9, even bare-metal POWER9s like ours. Operating systems like IBM i (formerly OS/400) use tagged pointers on every quadword for security purposes to mark pointers as valid, storing the tag data outside of the normal addressing space. If an invalid pointer is loaded, a trap instruction intercepts the fault. The instruction to set tags is undocumented and (apparently) privileged, and nothing other than IBM i currently uses it, but naturally that didn't stop these guys. Enabling tags active requires you set your POWER9 to big-endian and use the HPT MMU (i.e., the same configuration IBM i would run the CPU in). Hugo provides a detailed technical discussion on how they are accessed and stored, plus sample code (spoiler alert: the tag set instruction is 0x7c0103e6).

Arctic Tern available for purchase

Raptor now has Arctic Terns available for purchase, along with the user's guide. The US$1600 bundle comes with the PCIe carrier card, one ECP5 FPGA module (using Microwatt, the FPGA OpenPOWER core), FSI and JTAG adaptors and all the necessary cabling to connect to a Talos II system (we presume this means the entire T2 family including the T2 Lite and Blackbird, but it doesn't say — more about that in a moment UPDATE: it does now). As it is designed to completely replace the onboard ASPEED BMC, there are fan, Ethernet and two (!) HDMI connectors on board. There is a second module slot as we surmised, but it appears most board functions will be available with just one FPGA module installed, as provided in this bundle (fortunate since an extra module is US$900).

Unfortunately it looks like it does need its own PCIe slot and people like me with a nearly full loadout will be a bit disappointed if that's truly the case. We don't yet know, because the user's guide doesn't look like it has installation instructions for any T2 family system either even though it does have Raptor's usual studious pinouts and schematics. Being primarily a peripheral, I look forward to seeing additional documentation posted since no one wants to buy a $1600 card, get it home and accidentally brick it and their expensive OpenPOWER computer. Once I get my hands on one, we'll talk more about it.

Raptor says the Blackbird crunch ends in August (and maybe Arctic Terns too)

Good news for everyone with a Blackbird backorder: Raptor is announcing order fulfillment and restocking by August 31, 2022. This may not mean the order you submit now will get fulfilled by then, but if you have your order already in, the wait will be over soon and new orders should be processed much more quickly. (This date does not apply yet to the Talos II Lite, but I'm sure Raptor is working on it.) In the meantime, if you can't wait, may we suggest a regular T2? Those are in stock and ready for purchase.

Raptor is also stating Arctic Tern will launch in the "next few weeks" for purchase, with the Kestrel soft-BMC onboard and compatible with the entire Raptor family including the full T2 and the 'Bird. We're looking forward to it and expect a review as soon as I can get my hands on a couple. Faster BMC booting is always welcome around here!

CXL is going to eat OMI's lunch

The question is whether that's a bad thing. And as it stands right now, maybe it's not.

High I/O throughput has historically been the shiny IBM dangled to keep people in the Power fold, and was a featured part of the POWER9 roadmap even though those parts never emerged. IBM's solution to the memory throughput problem was the Centaur buffer used in POWER8 and scale-up Cumulus POWER9 systems (as opposed to our scale-out Nimbus POWER9s, which use conventional DDR4 RAM and an on-chip controller), and then for Power10 the Open Memory Interface, or OMI, a subset of OpenCAPI. In these systems, the memory controller-buffer accepts high-level commands from the CPU(s), abstracting away the details of where the underlying physical memory actually is and reordering, fusing or splitting those requests as required. Notoriously, OMI has an on-board controller, and its firmware isn't open-source.

But why should the interconnect be special-purpose? Compute Express Link (CXL) defines three classes of protocol: CXL.io, an enhanced CPU-to-device interconnect based on PCIe 5.0 with enhancements; CXL.cache, allowing peripheral devices to coherently access CPU memory; and CXL.mem, an interface for low-latency access to both volatile and non-volatile memory. Both CXL.cache and CXL.mem are closely related and themselves transmit over a standard PCIe 5.0 PHY. Memory would be an instance of a CXL Type 3 device, implementing both the CXL.io and CXL.mem specifications (Type 1 devices implement CXL.io and CXL.cache, and rely on access to CPU memory; Type 2 devices implement all three protocols, such as GPUs or other types of accelerators). The memory topology is highly flexible. If this sounds familiar, you might be thinking of Gen-Z, which aimed for an open royalty-free "memory semantic" protocol; Gen-Z started the merge into the CXL Consortium, led by Intel, in January.

IBM was part of Gen-Z, but eventually let it dangle for OpenCAPI and OMI, and while it is a contributing member to CXL this seems to have been as a consequence of its earlier involvement with Gen-Z. But really, what's OMI's practical future anyway? So far we've seen exactly one chipset implementation from one vendor and that implementation has directly harmed Power10's wider adoption apart from IBM's own hardware. OMI promises 25Gbps per lane at a 5ns latency, but Samsung's new CXL memory module puts 512GB of DDR5 RAM on the bus at nearly 32Gbps. It's a cinch that Power11, whenever it gets on the roadmap, would support at least PCIe 5.0 or whatever it is by then and CXL would appear to be a better overlay on that baseline. Devices of all sorts could share a huge memory pool, even GPUs. Plus, a lot more companies are on board and that would mean a lot more choices and greater staying power, plus more likelihood of open driver support the more devices emerge.

There are still some aspects of CXL that aren't clear. Although it's advertised as an open industry standard, there's nothing saying it's royalty or patent-free (Gen-Z explicitly was, or at least the former), and the download for the specification has an access agreement. The open aspect may not be much better either: Samsung has an ASIC controller in their memory device but it still may need a blob to drive it, either internally or as part of CPU firmware (earlier prototypes used an FPGA), and nothing says that another manufacturer might not require it either.

Still, OMI has the growing stench of death around it, and it never got the ecosystem support IBM was hoping for; CXL currently looks like everything technologically OMI was to be and more, and at least so far not substantially worse from a policy perspective. Other than as a sop to their legacy customers, one may easily conclude there's no technological nor practical reason to keep OMI in future IBM processors. With nothing likely changing on the horizon for Power10's firmware, that may be cautiously good news for us for a future Power11 option.

And now a real RISC-V laptop ... maybe

Phoronix is reporting the first production RISC-V laptop, (code?) named ROMA, with "a quad-core RISC-V CPU (although clock frequencies are not noted), a GPU/NPU accelerator [and reportedly other features], up to 16GB of LPDDR4/LPDDR4X RAM [and] up to 256GB of storage." This sounds great, except that I was seriously underwhelmed by the Allwinner D1 in the DevTerm R-01, so the lack of CPU specs is not encouraging. There are also two distinct process nodes for the System-on-Module, 12nm for Pro and 28nm for Normal, so there may be a wide gulf between configurations. On the other hand, it does prominently claim to be upgradable, possibly by swapping out the modules. Strangely, it advertises itself with an ARM SC300 secure enclave, which seems a bit odd as well.

The other thing that's not encouraging, which Phoronix correctly calls bulls**t on, is the proliferation of buzzwords (NFTs! Web3! AR! BINGO!) in the press release. You can register your interest and how many units you want, though I'm understandably not thrilled about signing up for a pre-order from an unknown potentially sketchy company. If actual product emerges, I'll try to get one, but right now this seems more like just another revolution of the RISC-V hype machine.

Mini-review: The Clockwork Pi DevTerm R-01, or RISC-V on the go

This blog is unambiguously pro-Power ISA, not least because I'm a long-time PowerPC bigot to start with, but also I think OpenPOWER — POWER9 specifically — is currently the best option for a practical yet truly open computing platform: competitive performance, auditable stack, solid hardware, and good and steadily improving software support, so there. And that remains my official editorial position as I type this on my trusty Talos II.

But that doesn't mean I'm not other-RISC-curious, and RISC-V gets a lot of ink these days. I'll say for the record I believe much of that ink is hype: RISC-V is only a performance threat on the low end, there's a lot of sizzle and little steak in present hardware choices, and while the ISA may be open the actual implementations vary greatly on that point. I've observed that there are two main markets for OpenPOWER workstations, namely people who want to support alternatives to the x86-ARM duopoly, and those who want a truly libre auditable platform (with some natural overlap between these groups). RISC-V can scratch the itch of the first group, but it's arguable whether the ecosystem does so collectively for the second. That said, all hype machines, to borrow a cow-orker's trenchant expression, easily transform into self-licking ice cream cones and that sort of salivary momentum is why RISC-V is here to stay.

One other thing that RISC-V and OpenPOWER have in common, besides a royalty-free ISA, is that workstations are neither architecture's core market. POWER9 (and Power10 even more so) is still primarily a server and big-iron chip, and extant RISC-V cores mostly lurk in embedded applications (especially the "too cheap for MIPS" segment). But Raptor workstations at least have nerd awareness, while only the even-less-frequently-encountered HiFive Unmatched meets the definition of a RISC-V PC, and the others are just glorified evaluation boards. And even some people complain about the price of that.

For me, though, it wasn't the price that was the problem (I mean, I've got two T2 systems and a Raptor Blackbird and I'm saving my pennies for an Arctic Tern, so I'm all in on POWER); it was the form factor. I'm out of KVM slots and I have too many boxes around the office. If I was going to play with RISC-V as a use-it-like-a-computer user, it needed to be something that I could set up to mess with and tear it down to recover the desk space. Why, it could even be portable. That would be nice. There's no portable OpenPOWER option (yet?), so if there's a totable libre system out there other than those old bizarro Loongsons I'd love to rock one.

So when ClockworkPi announced they were making a RISC-V spin of their DevTerm "portable terminal," and for just US$240 to boot, I said, "Take my money. No, seriously, take it." So they took it, and yesterday about two months later it arrived, fresh from off the DHL boat from COVID-infested Hong Kong Hangzhou Manifest Tech Co Ltd (wait, did I buy a car or a computer?). Today I'll tell you about it.

Here's what this review isn't: in general it's not a review of the CPi DevTerm itself, though necessarily I'll mention some things of relevance. There are many of these reviews based on its previous iteration using aarch64 CPUs (mostly Cortex-A53 and A72) and the R-01 is literally just a DevTerm with a core module swap. Everything you'd like or hate about the form factor largely applies to both flavours, so refer to any of those existing reviews to determine whether you'd want a DevTerm at all regardless of what CPU's actually in it. Instead, I'm going to talk about this device specifically as a RISC-V general purpose computer, either if you'd just like a RISC-V machine to play with or to truly use as an alternative system on the road.

So, about that form factor. Although most people liken the DevTerm to the Tandy Radio Shack TRS-80 Model 100 (the most famous member of the Kyotronic 85 family), actually its design cues come more from the Model 100's close relative, the NEC PC-8201A. (Dig the control diamond: don't tell me that's a coincidence. For some reason CPi chose to make its codes separate from the cursor keys.) But I've used my PC-8201A on the road, for an entire month on Penang Island in Malaysia in 2000 where it was my only computer, and its full-size keyboard made it quite liveable. The DevTerm's a bit ... smaller — 65 percent regular size, to be exact. I have thin fingers (even when I was 45 pounds heavier) and wide hands, and I can sort of touch-type on it, or lift it in two hands and two-thumb-type with my hand width allowing my thumbs to just meet in the center of the keyboard. However, if you lack either of these attributes you may not enjoy the experience, though it has enough ports you could still potentially use it as a desktop system with external input devices instead. (The DevTerm keyboard is also not backlit, but I'm not going to ding it for that at this price point.)

Obligatory unboxing:

The box clearly advertises what's in it and, interestingly, the amount of RAM on the board (at 1GB this seems an odd thing to brag about).

Famously, it comes unassembled. Everything is in nice neat trays and it's actually rather fun to unpack. The plastic standoffs and holdfasts on sprues give it a delightful model-kit feel.

What's not included are a USB-C charger and two 18650 Li-Ion batteries. Neither of those is expensive or tough to find, but you'll need one or the other to actually power it up. There is also no paper for the thermal printer (!) it carries onboard, though any office supply store will have that too.

Case design, schematics and connectors are all GPL and on Github. The RISC-V "core," as CPi calls their CPU modules, sits on anti-static foam in one of the compartments:

CPi modules contain basically everything but storage and peripherals. In particular, the CPU/SoC, GPU (if present) and RAM are provisioned on a 200-pin SO-DIMM and can be swapped out (naturally you'd need to change the operating system at the same time, but that can be as simple as another microSD card). This is a strength of the design because if you don't like the experience with one CPU card (too slow? not compatible?), try another. CPi sells them inexpensively; if you already own an ARM DevTerm you can just buy the RISC-V module for US$29 and download the software. CPi kindly included a RISC-V build of their Ubuntu-based OS with this unit.

In this case, the CPU is an Allwinner D1, a single-core 1GHz RV64IMAFDCVU CPU based on the XuanTie C906 with on-board 2D graphics, DSP, audio/video, USB and SDIO. The DevTerm exposes HDMI, audio and USB external ports directly serviced by the D1. This is the same part in the Sipeed Nezha evaluation board and in a forthcoming SBC from Pine64. Impressively the RTL for the C906 core is open source and Apache-licensed, but unfortunately the rest of the design isn't: in particular the onboard graphics, DSP and peripheral controllers are only available as blobs, and only then if you register as a developer with Allwinner. For CPi's purposes this isn't a killer because their other CPU options are also blobularly blobtastic, but it's a minus in our book. The Hynix chip next to it is the RAM, a single gigabyte as stated. I cannot find any L2 cache at all, just the 32K L1 caches each for I+D.

Another minus is that the C906 and related cores, while they advertise vector instructions, predate the current RISC-V vector instruction standard. The instructions are similar but they are neither binary nor source compatible. On the other hand there's hardly anything supporting the current standard anyway, so this may not be a problem in the long run if the install base becomes large enough.

Getting out the clear orange scaffold and installing the screen, here's a size comparison against a DVD case to give you another idea about how big it is:

As you can see they're roughly the same size. If you'd find typing on a keyboard about half the size of a lengthwise DVD case difficult, the DevTerm is probably not for you. Anyway, let's finish putting it together.

Ta-daa! It took me about half an hour and it was pretty easy with no tools required. The manual goes step by step though they use a lot of part code shorthand that needed some flipping back and forth to check exactly what standoff, etc., I was supposed to be using where. While most of it can be taken apart as easily as it came together, some are glued stick-on components like the little on-board speakers and most notoriously the wireless antenna. I also didn't like the fact the flex cables are a little nervewracking to install and it took a little fiddling to convince myself they were properly seated (plus the video cable in particular has "SCREEN" silkscreened on it, but that end does not connect to the actual screen; it connects to the port marked "SCREEN" on the mainboard). Although it directs you to insert tiny screws to affix the core module to the board, there didn't seem to be any holes drilled on my board and the SO-DIMM socket seemed to hold the core just fine anyway. This might be something specific about the RISC-V module because the assembly manual is generic in scope. Finally, a pro-tip: it's easiest to put in the microSD card during assembly; it felt like I was inserting the card into an empty hole when I did it after, even though it did go in securely.

All that aside I give overall high marks to the fit and finish of the case, though it took me a little time to get the top to mate with the front lip of the bottom. And then there's those Frankensteiny Princess Leia earmuff closures on either side of the screen: they're cute and give it some personality, and they do hold the unit together, and I guess they're better than thumbscrews, but you almost expect them to have some sort of input device functionality and they don't. Missed opportunity, in my opinion. Plus, if you reopen the case the two halves of the closures come apart and have to be snapped back together, which is a little irritating. Once it is together, though, the case feels very sturdy. I liked how it felt in my hands; it didn't feel flimsy or fragile, and it was not excessively heavy even with the batteries in. Total weight according to my kitchen scale is 588g, or about a pound and a quarter.

Booting up! The manual warns it may take up to a minute, which wasn't too far off. The screen is very bright and legible, even considering the 1280x480 resolution is a little odd by modern standards (basically two VGA screens side by side), but it's very glossy and picks up hairs and fingerprints like a magnet. You probably want to have a microfibre cloth around in your bag for this thing.

And booted into CPi's bespoke Ubuntu variant, ClockworkOS. Despite the wiki (it's correct in the on-screen readme), the default username and password are both cpi.

Proof of uname:

ClockworkOS is very lightweight, and thank goodness it is for reasons we'll get into. There's no Wayland crap here; this is Xorg, as G-d Himself intended (especially because — as our frustrations with Wayland on our BMC-only 2D framebuffer Blackbird have proven — Wayland generally does not do well without a GPU even though it's doing better these days than it has). If the window manager looks throwback, it's because it's good old school twm. Fortunately the thumb trackball isn't too bad but there are key combinations for several marquee apps, which I found to be a thoughtful touch.

The status monitor on the right is also very handy, but you'll notice the clock is wrong, and the reason the clock is wrong is because it couldn't contact any time servers. Despite manually creating a network configuration for the house Wi-Fi, the DevTerm wouldn't connect from the front of the house (the Wi-Fi access point is in the server room in the middle) even though every other Wi-Fi capable device I own is able to do so. I was so perplexed by the range I ended up disassembling it again to check if I'd damaged the antenna or if it had come loose when I turned it over to put on the bottom, but the antenna was physically intact and the connector was snapped securely onto the mainboard. The only way it would connect was if it were closer to it. Various Wi-Fi issues have been reported with the DevTerm's relative GameShell, which appears to use the same sort of antenna, though I'm not sure if this is the same specific problem.

There are lots of fun pieces of software pre-installed like DOSBox and Chocolate Doom (and things like GIMP, Inkscape and Xfig if you want to do real work), so I fired up Doom because of course it plays Doom to get an idea of performance. The CPU immediately showed as pegged in the status monitor, which was not encouraging. Neither was gameplay:

I mean, the poor thing's even using a smaller viewport (by default: it started up that way) and the CPU is still straining at 99%. The framerate wasn't slide-show-slow and music and sound effects didn't seem to suffer (use Fn+the volume key to turn up the audio), but you could clearly see it painting each frame.

Web browsing was equally disappointing, but also for different reasons. Firefox on RISC-V is still a work in progress, although there was an Fx94 build at one point; there are patches for Chromium 104, though I wouldn't be caught dead using Chrome or anything derived from it, and neither Firefox nor Chromium are installed in any case. But it does have Qutebrowser, so let's try ... uh ...

Um, okay, how about ELinks?

This worked and might even be more appropriate for the display and CPU anyhow. It was very sprightly. Text for the win. I did go back to Qutebrowser and try QtWebKit despite the warning, and that does start, but ...

Besides the bad rendering, it was also just as slow as playing Doom was. At this point it would seem most appropriate to get an idea of how much oomph this thing actually has. For this we'll use CoreMark, since it's simple, easy to port and verifiable, and it's what many RISC-V vendors cite so this gives you comparison points. ClockworkPi kindly included development tools making it as simple as cloning it from Github and running make.

A couple benchmark results first, using default settings and reporting the highest score obtained: my NetBSD Macintosh IIci (25MHz Motorola 68030, no cache card) gets 8.3 iterations/second, my NetBSD Mac mini (1.5GHz PowerPC G4 7447A) gets 6073.9 iterations/second, my M1 MacBook Air gets 31713.3 iterations/second (single thread) and 171848.9 iterations/second (8 threads), and this dual-8 SMT-4 DD2.3 Raptor Talos II gets 14367.8 iterations/second (single thread) and 430078.6 iterations/second (64 threads). The D1 clocks in at ... 2232.5 iterations/second, just over a third of the performance of the G4 Mac mini, and I can run TenFourFox on that.

Another thing that performs badly on this device: shutting down. It takes literal, honest-to-goodness multiple minutes to power off cleanly. A surprise was the loud "click" it makes when it finally finishes. There doesn't appear to be an obvious way to make it sleep or suspend, though there is a screen saver which turns off the display after a period of inactivity.

I imagine some of these software problems will improve in later iterations, but as it stands this was my out-of-the-box user experience right now (in fairness CPi does say it is a "highly experimental" model, and actively steers new users away from it). I suppose you could try other distros but they may not support (fully) the DevTerm's onboard devices.

Now, something positive: battery life and power consumption seemed really good. The CPU may be weaksauce but it doesn't put a lot of power demand on the hardware either, nor is there a GPU to draw more juice, and the backlight can be easily changed with key combinations or terminal commands. And although there's a tiny little fan on the board I never heard it unless I put my ear right up against it and the device never seemed to get hot even when it was being held at its limits (which was a lot of the time). While the status monitor will show battery percentage (second from the bottom, above the uptime), cat /sys/class/power_supply/axp20x-battery/uevent will display a fuller, different set of statistics that don't always agree. Either way it's thrifty enough I'd estimate you can probably get eight, maybe 10 hours of runtime or more out of a full charge depending on load and battery quality. On the Kill-A-Watt the USB-C charger pulled between 11 and 14 watts depending on CPU load, though even with the CPU pegged in Chocolate Doom it only occasionally drew at the upper end of that range. Incidentally, since the batteries are removeable it's probably more efficient just to shut it down, take them out and stick them in a wall charger at the end of the day.

You might think after all the complaints I've made that I don't like this device. That is absolutely not the case; in fact, I've already become rather fond of it. I'll even go so far as to say that if you want an easy way to try RISC-V and want one you can use like a general purpose computer, and you're not already drunk on the Kool-Aid, then the DevTerm R-01 is your ticket. Clockwork Pi should be commended for offering it and charging less for it on top of that. Offered the choice between a HiFive Unmatched system and the DevTerm R-01, even considering the Unmatched will be somewhat more powerful, I'd still pick the DevTerm. Besides its obvious space and price advantages it's at least got enough grunt to serve as a terminal and do some very basic tasks and do it for hours on easily replaceable batteries, and it comes with sufficient developer tools out of the box that you can test your software on actually available RISC-V silicon today. Plus, with HDMI, USB and Bluetooth, you can just dock it as a desktop system if you don't need it to be mobile. While I certainly had my share of software problems, I suspect they are not at all unique to this particular implementation.

No, my objections here are primarily to the Allwinner D1. For as many claims as RISC-V's proponents make about openness, this chip isn't meaningfully so, and its underwhelming performance doesn't make it worth putting up with. I realize it's aggressively low-end but for crying out loud, it's getting its clock cleaned by a value-spec 2005 Power Mac (the U740 in the Unmatched gets by the G5, but by less than you'd think), and some software still doesn't work on the architecture yet — certainly more so than OpenPOWER. About all it's got going for it is that it can clearly do very well in a portable, power-constrained environment, and it's cheaper than ARM would be in that setting, yet despite such obvious shortcomings it and its progeny are the very chips here and in other upcoming products simply because they exist and survive. Is RISC-V going to be perennially bringing up the performance rear? (Hey, Raptor, want to make a souped-up Arctic Tern in this form factor?) Not for nothing but I don't see anyone selling those ballyhooed Micro Magic parts, and they may well be snake oil. Maybe some future RISC-V system will have sufficient performance, low power usage and full auditability to become a new and self-sustaining libre mobile option, but I'm having a hard time seeing any such CPU on the horizon.

The bottom line: the DevTerm R-01 is fun to play with and makes a stellar introductory RISC-V general purpose computer at a decent price that you can, for some values of "use," use. If you're already a DevTerm owner a measly US$29 for an R-01 module is a slam dunk, and even as a first-time buyer I feel my US$240 wasn't ill-spent. But after this first personal taste of RISC-V, I don't think OpenPOWER has much to worry about right now.

First production Kestrel and Arctic Terns? (OpenPOWER compute modules exist!)

Thanks, D, who's quicker on the draw than I am: this image popped up on the Raptor Wiki. Looks like Kestrel and Arctic Tern made it to full prototyping, and maybe on the way to production!

This image shows a Blackbird being brought up solely with the Kestrel soft BMC (the metadata says the ASPEED BMC was completely disabled), powered by a much more advanced design than the ECP5 card we saw in the last iteration, especially because this is now a set of custom boards. The PCIe carrier card has Ethernet and two HDMI ports to the left, and what looks like JTAG and serial (grey ribbon) on the right near the LEDs. The "hat" board has been incorporated into the carrier with the LPC, FSI (the black cables curling around out and back into frame go to the connector next to DIMM A1) and I2C signals, and a separate ribbon cable carries the TPM lines.

So far, this is mostly just moving components around. But new on this carrier card are two SO-DIMM style module slots, both populated with what looks like the same sort of card, though only the top one seems to be active. These modules are labeled "ARCTIC TERN ECP5 MODBMC (?) CARD AT1MB1 REV 1.01 (C)2022 RAPTOR COMPUTING SYSTEMS, LLC" (there was a rev 1.0? what did we miss?). This is clearly the CPU card on which the Kestrel soft BMC software runs. The BMC flash likely lives on these boards, but not the PNOR, which appears to be on flash chips on the carrier to the left of the LEDs. UPDATE: this thread says the modules have 1GB of DDR3 RAM each (!), and the CPU fan is directly connected to the carrier. They can be accessed remotely.

It really looks like it may be shipping in the very near future and I'm jazzed about how fast Kestrel reportedly can bring the system to power-ready. But there are two more exciting things about this: first, if this is laid out the way it appears to me to be, this means you can have two BMCs for a libre dual-monitor setup right out of the box, no extra PCI cards or firmware blobs required. (Suck it, Nvidia.) Second, and even more notable, this means that OpenPOWER compute modules may soon be a thing! Given Raptor Engineering, I'm sure hoping these will be sold for standalone projects, especially if the onboard Microwatt-core performance is competitive with RPi and other ARM boards. Maybe then the people whining about how much it costs to play with OpenPOWER will finally get something at a lower price point to play with (and then they can complain about that).

That said, we still don't know price or availability yet, and we don't know if there will be a way to add a Kestrel setup without using a precious PCIe slot (after all, the T2 Lite has only three, and the Blackbird just two; hopefully it can be configured to pull power from something else). But there's a lot of good things in this picture and we're looking forward to hearing more in what are no doubt soon-to-come official announcements.

Attack of the zombie PowerVR GPUs

Like rotted silicon corpses, several new recent GPU cards based on Imagination Technologies' old school PowerVR IP have emerged in the Chinese market, including the Innosilicon Fantasy One series and most recently the Moore Threads MUSA family. Don't kid yourself either about these being particularly more open than AMD and Nvidia offerings, though support for the Rogue GPUs is landing in kernel and in Mesa3D; while there is fairly good documentation on the GPU's ISA the firmware is still likely to be binary blobs (though this is no worse than the alternatives). Moreover, their performance even from the OEM specs just isn't competitive with current cards. That said, any GPU at all beats the flat framebuffer of the ASTs in our systems, and these chips may move more slowly enough to be more stable in the kernel compared to the occasional churn with amdgpu and friends. Assuming it can be flexible on page size, another alternative GPU architecture, even a basic one, would be welcome (at least until the Microwatt-based Libre-SoC is a viable option). We'll be watching that space.

The first production RISC-V portable?

Yes, there have been various one-off RISC-V kinda-portables, just like there have been various one-off RISC-V kinda-workstations. But it was inevitable a production "RISC-V PC" would become available, and now there's a new first, a RISC-V version of the Clockwork DevTerm portable.

The DevTerm series is clearly inspired by the Kyotronic 85 family, which many people will remember in the form of the TRS-80 Model 100. This warms my heart because an NEC PC-8201A (the other white meat) was my one and only portable computer for a month when I was overseas in Malaysia and Singapore in 2000. (It acquitted itself fabulously, for the record.) The keyboard is unfortunately smaller (one review of the ARM version compared it to an HP 200LX, which is a small keyboard indeed) and it's not touch-enabled, but the machine is very modular and apparently all that was necessary to go R5 was a redo of the OS and a new CPU-memory card (which you can buy separately for anything that will accept a Raspberry Pi compute module form factor). The CPU appears to be an Allwinner D1 containing a OpenXuantie C906, a 1GHz RV64IMAFDC(V)U single core with 1GB of memory onboard. There is no GPU, just a framebuffer.

Bluntly, these are underwhelming specs (the specs for the HiFive Unmatched didn't get my sizzle zizzled much either), and even the lowliest 4-core POWER9 Blackbird or T2 Lite would smash a HiFive into itty bitty little RISC bits. Against this, well, I think my iBook G4 wouldn't have much to worry about. But there's no portable option for OpenPOWER yet, and while a Microwatt or Libre-SoC system might get there one day — perhaps as a compatible compute module, even — this is here today, and could be a worthy mobile complement to an OpenPOWER desktop workstation. I haven't reviewed their Github exhaustively, but the C906 seems to be open-source. Plus, even though the specs are lower than their other ARM-based offerings, it's also the cheapest (the set is $239, but the CPU-memory card is just $29). This is convenient and inexpensive enough that I've squeezed a bit out of our budget to order one and I'll do a review here when it arrives. I'm unquestionably a Power ISA bigot at heart, but that doesn't mean I'm not Five-curious.