Chapter 6

Digital Design and Computer Architecture: ARM® Edition

Sarah L. Harris and David Money Harris

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <1>
Chapter 6 :: Topics
• Introduction
• Assembly Language
• Machine Language
• Programming
• Addressing Modes

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <2>
Introduction
• Jumping up a few levels of
abstraction
– Architecture: programmer’s view
of computer
• Defined by instructions &
operand locations
– Microarchitecture: how to
implement an architecture in
hardware (covered in Chapter 7)

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <3>
Instructions
• Commands in a computer’s language
– Assembly language: human-readable
format of instructions
– Machine language: computer-readable
format (1’s and 0’s)

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <4>
ARM Architecture
• Developed in the 1980’s by Advanced RISC
Machines – now called ARM Holdings
• Nearly 10 billion ARM processors sold/year
• Almost all cell phones and tablets have multiple
ARM processors
• Over 75% of humans use products with an ARM
processor
• Used in servers, cameras, robots, cars, pinball
machines,, etc.
Once you’ve learned one architecture, it’s easier to learn others

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <5>
Architecture Design Principles
Underlying design principles, as articulated by
Hennessy and Patterson:
1.Regularity supports design simplicity
2.Make the common case fast
3.Smaller is faster
4.Good design demands good compromises

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <6>
Instruction: Addition

C Code ARM Assembly Code

a = b + c; ADD a, b, c

• ADD: mnemonic – indicates operation

to perform
• b, c: source operands
• a: destination operand

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <7>
Instruction: Subtraction
Similar to addition - only mnemonic changes

C Code ARM assembly code

a = b - c; SUB a, b, c
• SUB: mnemonic
• b, c: source operands
• a: destination operand

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <8>
Design Principle 1
Regularity supports design simplicity
• Consistent instruction format
• Same number of operands (two sources and
one destination)
• Ease of encoding and handling in hardware

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <9>
Multiple Instructions
More complex code handled by multiple ARM
instructions
C Code ARM assembly code
a = b + c - d; ADD t, b, c ; t = b + c
SUB a, t, d ; a = t - d

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <10>
Design Principle 2
Make the common case fast
• ARM includes only simple, commonly used instructions
• Hardware to decode and execute instructions kept
simple, small, and fast
• More complex instructions (that are less common)
performed using multiple simple instructions

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <11>
Design Principle 2
Make the common case fast
• ARM is a Reduced Instruction Set Computer (RISC),
with a small number of simple instructions
• Other architectures, such as Intel’s x86, are
Complex Instruction Set Computers (CISC)

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <12>
Operand Location
Physical location in computer
– Registers
– Constants (also called immediates)
– Memory

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <13>
Operands: Registers
• ARM has 16 registers
• Registers are faster than memory
• Each register is 32 bits
• ARM is called a “32-bit architecture”
because it operates on 32-bit data

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <14>
Design Principle 3
Smaller is Faster
• ARM includes only a small number of
registers

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <15>
ARM Register Set
Name Use
R0 Argument / return value / temporary variable
R1-R3 Argument / temporary variables
R4-R11 Saved variables
R12 Temporary variable
R13 (SP) Stack Pointer
R14 (LR) Link Register
R15 (PC) Program Counter

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <16>
Operands: Registers
• Registers:
– R before number, all capitals
– Example: “R0” or “register zero” or “register R0”

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <17>
Operands: Registers
• Registers used for specific purposes:
– Saved registers: R4-R11 hold variables
– Temporary registers: R0-R3 and R12, hold
intermediate values
– Discuss others later

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <18>
Instructions with Registers
Revisit ADD instruction

C Code ARM Assembly Code

; R0 = a, R1 = b, R2 = c

a = b + c ADD R0, R1, R2

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <19>
Operands: Constants\Immediates
• Many instructions can use constants or
immediate operands
• For example: ADD and SUB
• value is immediately available from
instruction

C Code ARM Assembly Code

; R0 = a, R1 = b
a = a + 4; ADD R0, R0, #4
b = a – 12; SUB R1, R0, #12

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <20>
 Generating Constants
Generating small constants using move (MOV):
C Code ARM Assembly Code
//int: 32-bit signed word ; R0 = a, R1 = b
int a = 23; MOV R0, #23
int b = 0x45; MOV R1, #0x45

Note: MOV can also use 2 registers: MOV R7, R9

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <21>
 Lab Example 1
;;; Directives Reset_Handler
PRESERVE8 ;;;;;;;;;;User Code Starts from the next
THUMB line;;;;;;;;;;;;

; Vector Table Mapped to Address 0 at Reset ; int a = 23;

; Linker requires __Vectors to be exported ; int b = 0x45;
AREA RESET, DATA, READONLY MOV R4, #23
EXPORT __Vectors MOV R5, #0x45

__Vectors END ;End of the program

DCD 0x20001000
; stack pointer value when stack is empty
DCD Reset_Handler ; reset vector
ALIGN

; The program
; Linker requires Reset_Handler
AREA MYCODE, CODE, READONLY

ENTRY
EXPORT Reset_Handler

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <22>
Generating Constants
Generate larger constants using move (MOV) and
or (ORR):
C Code ARM Assembly Code
# R0 = a
int a = 0x7EDC8765; MOV R0, #0x7E000000
ORR R0, R0, #0xDC0000
ORR R0, R0, #0x8700
ORR R0, R0, #0x65

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <23>
Operands: Memory
• Too much data to fit in only 16 registers
• Store more data in memory
• Memory is large, but slow
• Commonly used variables still kept in registers

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <24>
Byte-Addressable Memory
• Each data byte has unique address
• 32-bit word = 4 bytes, so word address
increments by 4

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <25>
Reading Memory
• Memory read called load
• Mnemonic: load register (LDR)
• Format:
LDR R0, [R1, #12]
Address calculation:
– add base address (R1) to the offset (12)
– address = (R1 + 12)
Result:
– R0 holds the data at memory address (R1 + 12)
Any register may be used as base address

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <26>
Reading Memory
• Example: Read a word of data at memory
address 8 into R3
– Address = (R2 + 8) = 8
– R3 = 0x01EE2842 after load

ARM Assembly Code

MOV R2, #0
LDR R3, [R2, #8]

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <27>
Writing Memory
• Memory write are called stores
• Mnemonic: store register (STR)

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <28>
Writing Memory
• Example: Store the value held in R7 into
memory word 21.
• Memory address = 4 x 21 = 84 = 0x54
ARM assembly code
MOV R5, #0
STR R7, [R5, #0x54]

The offset can be written in

decimal or hexadecimal

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <29>
Recap: Accessing Memory
• Address of a memory word must be
multiplied by 4
• Examples:
– Address of memory word 2 = 2 × 4 = 8
– Address of memory word 10 = 10 × 4 = 40

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <30>
 Lab Example 2
;;; Directives Reset_Handler
PRESERVE8 ;;;;;;;;;;User Code Starts from the next
THUMB line;;;;;;;;;;;;

; Vector Table Mapped to Address 0 at Reset ; R4 = a;

; Linker requires __Vectors to be exported ; mem[0x20000000] = 42;
; a = mem[0x20000000]
AREA RESET, DATA, READONLY
EXPORT __Vectors MOV R1, #0x20000000
; writeable portion of memory starts
__Vectors ; from 0x20000000. To check memory
DCD 0x20001000 ; range, go to Debug -> Memory Map in
; stack pointer value when stack is empty
DCD Reset_Handler ; reset vector ; uvision
ALIGN
MOV R9, #42
; The program STR R9, [R1, #2]
; Linker requires Reset_Handler LDR R4, [R1, #2]
AREA MYCODE, CODE, READONLY END ;End of the program
ENTRY
EXPORT Reset_Handler

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <31>
Big-Endian & Little-Endian Memory
• How to number bytes within a word?
– Little-endian: byte numbers start at the little
(least significant) end (ARM is Little Endian)
– Big-endian: byte numbers start at the big (most
significant) end

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <32>
Big-Endian & Little-Endian Memory
• Jonathan Swift’s Gulliver’s Travels: the Little-Endians
broke their eggs on the little end of the egg and the
Big-Endians broke their eggs on the big end
• It doesn’t really matter which addressing type used –
except when two systems share data

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <33>
Programming
High-level languages:
– e.g., C, Java, Python
– Written at higher level of abstraction

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <34>
Programming Building Blocks
• Data-processing Instructions
• Conditional Execution
• Branches
• High-level Constructs:
 if/else statements
 for loops
 while loops
 arrays
 function calls

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <35>
Programming Building Blocks
• Data-processing Instructions
• Conditional Execution
• Branches
• High-level Constructs:
 if/else statements
 for loops
 while loops
 arrays
 function calls

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <36>
Data-processing Instructions
• Logical operations
• Shifts / rotate
• Multiplication

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <37>
Logical Instructions
• AND
• ORR
• EOR (XOR)
• BIC (Bit Clear)
• MVN (MoVe and NOT)

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <38>
Logical Instructions: Examples

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <39>
Logical Instructions: Uses
• AND or BIC: useful for masking bits
Example: Masking all but the least significant byte of
a value
0xF234012F AND 0x000000FF = 0x0000002F
0xF234012F BIC 0xFFFFFF00 = 0x0000002F

• ORR: useful for combining bit fields

Example: Combine 0xF2340000 with 0x000012BC:
0xF2340000 ORR 0x000012BC = 0xF23412BC

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <40>
 Lab Example 3
;;; Directives Reset_Handler
PRESERVE8 ;;;;;;;;;;User Code Starts from the next
THUMB line;;;;;;;;;;;;

; Vector Table Mapped to Address 0 at Reset ; R1 = 0x46A1F1B7

; Linker requires __Vectors to be exported MOV R1, #0x46000000
ORR R1, #0xA10000
AREA RESET, DATA, READONLY ORR R1, #0xF100
EXPORT __Vectors ORR R1, #0xB7

__Vectors ; R2 = 0xFFFF0000
DCD 0x20001000 MOV R2, #0xFF000000
; stack pointer value when stack is empty ORR R2, #0xFF0000
DCD Reset_Handler ; reset vector
ALIGN AND R3, R1, R2
ORR R4, R1, R2
; The program EOR R5, R1, R2
; Linker requires Reset_Handler BIC R6, R1, R2
AREA MYCODE, CODE, READONLY MVN R7, R2

ENTRY STOP
EXPORT Reset_Handler B STOP

END ;End of the program

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <41>
 Shift Instructions
• LSL: logical shift left
Example: LSL R0, R7, #5 ; R0 = R7 << 5

• LSR: logical shift right

Example: LSR R3, R2, #31 ; R3 = R2 >> 31

• ASR: arithmetic shift right

Example: ASR R9, R11, R4 ; R9 = R11 >>> R47:0

• ROR: rotate right

Example: ROR R8, R1, #3 ; R8 = R1 ROR 3

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <42>
Shift Instructions: Example 1
• Immediate shift amount (5-bit immediate)
• Shift amount: 0-31

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <43>
Shift Instructions: Example 2
• Register shift amount (uses low 8 bits of register)
• Shift amount: 0-255

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <44>
 Lab Example 3
;;; Directives Reset_Handler
PRESERVE8 ;;;;;;;;;;User Code Starts from the next
THUMB line;;;;;;;;;;;;

; Vector Table Mapped to Address 0 at Reset ; R1 = 0xFFFFFF00

; Linker requires __Vectors to be exported MOV R1, #0xFF000000
ORR R1, #0xFF0000
AREA RESET, DATA, READONLY ORR R1, #0xFF00
EXPORT __Vectors ORR R1, #0x00

__Vectors MOV R2, #4

DCD 0x20001000 LSL R3, R1, #4
; stack pointer value when stack is empty LSR R4, R1, #4
DCD Reset_Handler ; reset vector ASR R5, R1, R2
ALIGN ROR R6, R1, #3

; The program STOP

; Linker requires Reset_Handler B STOP
AREA MYCODE, CODE, READONLY
END ;End of the program
ENTRY
EXPORT Reset_Handler

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <45>
Multiplication
• MUL: 32 × 32 multiplication, 32-bit result
MUL R1, R2, R3
Result: R1 = (R2 x R3)31:0
• UMULL: Unsigned multiply long: 32 × 32
multiplication, 64-bit result
UMULL R1, R2, R3, R4
Result: {R2,R1} = R3 x R4 (R2, R3
unsigned)
• SMULL: Signed multiply long: 32 × 32
multiplication, 64-bit result
SMULL R1, R2, R3, R4
Result: {R2,R1} = R3 x R4 (R2, R3
signed)
Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <46>
 Lab Example 4
;;; Directives Reset_Handler
PRESERVE8 ;;;;;;;;;;User Code Starts from the next
THUMB line;;;;;;;;;;;;

; Vector Table Mapped to Address 0 at Reset MOV R2, #0x00000005

; Linker requires __Vectors to be exported MOV R3, #0x00000005

AREA RESET, DATA, READONLY MUL R1, R2, R3

EXPORT __Vectors UMULL R5, R4, R2, R3
SMULL R7, R6, R2, R3
__Vectors
DCD 0x20001000 STOP
; stack pointer value when stack is empty B STOP
DCD Reset_Handler ; reset vector
ALIGN END ;End of the program

; The program
; Linker requires Reset_Handler
AREA MYCODE, CODE, READONLY

ENTRY
EXPORT Reset_Handler

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <47>
Programming Building Blocks
• Data-processing Instructions
• Conditional Execution
• Branches
• High-level Constructs:
 if/else statements
 for loops
 while loops
 arrays
 function calls

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <48>
Conditional Execution
Don’t always want to execute code sequentially
• For example:
 if/else statements, while loops, etc.: only
want to execute code if a condition is true
 branching: jump to another portion of code
if a condition is true
• ARM includes condition flags that can be:
 set by an instruction
 used to conditionally execute an instruction

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <49>
ARM Condition Flags
Flag Name Description
N Negative Instruction result is negative
Z Zero Instruction results in zero
C Carry Instruction causes an unsigned carry out

V oVerflow Instruction causes an overflow

• Set by ALU (recall from Chapter 5)

• Held in Current Program Status Register (CPSR)

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <50>
Review: ARM ALU

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <51>
Setting the Condition Flags: NZCV
• Method 1: Compare instruction: CMP
Example: CMP R5, R6
 Performs: R5-R6
 Does not save result
 Sets flags. If result:
• Is 0, Z=1
• Is negative, N=1
• Causes a carry out, C=1
• Causes a signed overflow, V=1

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <52>
Setting the Condition Flags: NZCV
• Method 1: Compare instruction: CMP
Example: CMP R5, R6
 Performs: R5-R6
 Sets flags: If result is 0 (Z=1), negative (N=1), etc.
 Does not save result
• Method 2: Append instruction mnemonic with S
Example: ADDS R1, R2, R3
 Performs: R2 + R3
 Sets flags: If result is 0 (Z=1), negative (N=1), etc.
 Saves result in R1

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <53>
Condition Mnemonics
• Instruction may be conditionally executed
based on the condition flags
• Condition of execution is encoded as a
condition mnemonic appended to the
instruction mnemonic
Example: CMP R1, R2
SUBNE R3, R5, R8
 NE: not equal condition mnemonic
 SUB will only execute if R1 ≠ R2
(i.e., Z = 0)

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <54>
Condition Mnemonics
cond Mnemonic Name CondEx
0000 EQ Equal
0001 NE Not equal
0010 CS / HS Carry set / Unsigned higher or same
0011 CC / LO Carry clear / Unsigned lower
0100 MI Minus / Negative
0101 PL Plus / Positive of zero
0110 VS Overflow / Overflow set
0111 VC No overflow / Overflow clear
1000 HI Unsigned higher
1001 LS Unsigned lower or same
1010 GE Signed greater than or equal
1011 LT Signed less than
1100 GT Signed greater than
1101 LE Signed less than or equal
1110 AL (or none) Always / unconditional ignored

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <55>
Conditional Execution
Example:
CMP R5, R9 ; performs R5-R9
; sets condition flags

SUBEQ R1, R2, R3 ; executes if R5==R9 (Z=1)

ORRMI R4, R0, R9 ; executes if R5-R9 is
; negative (N=1)

Suppose R5 = 17, R9 = 23:

CMP performs: 17 – 23 = -6 (Sets flags: N=1, Z=0, C=0, V=0)
SUBEQ doesn’t execute (they aren’t equal: Z=0)
ORRMI executes because the result was negative (N=1)

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <56>
 Lab Example 5
;;; Directives Reset_Handler
PRESERVE8 ;;;;;;;;;;User Code Starts from the next
THUMB line;;;;;;;;;;;;

; Vector Table Mapped to Address 0 at Reset MOV R5, #17

; Linker requires __Vectors to be exported MOV R9, #23

AREA RESET, DATA, READONLY MOV R2, #4

EXPORT __Vectors MOV R3, #2
MOV R0, #0xFF
__Vectors MOV R9, #0xFF
DCD 0x20001000
; stack pointer value when stack is empty CMP R5, R9 ; performs R5-R9
DCD Reset_Handler ; reset vector ; sets condition flags
ALIGN
SUBEQ R1, R2, R3
; The program ; executes if R5==R9 (Z=1)
; Linker requires Reset_Handler
AREA MYCODE, CODE, READONLY ORRMI R4, R0, R9
; executes if R5-R9 is negative (N=1)
ENTRY
EXPORT Reset_Handler
STOP
B STOP

END ;End of the program

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <57>
Programming Building Blocks
• Data-processing Instructions
• Conditional Execution
• Branches
• High-level Constructs:
 if/else statements
 for loops
 while loops
 arrays
 function calls

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <58>
Branching
• Branches enable out of sequence instruction
execution
• Types of branches:
– Branch (B)
• branches to another instruction
– Branch and link (BL)
• discussed later
• Both can be conditional or unconditional

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <59>
The Stored Program

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <60>
Unconditional Branching (B)
ARM assembly
MOV R2, #17 ; R2 = 17
B TARGET ; branch to target
ORR R1, R1, #0x4 ; not executed

TARGET
SUB R1, R1, #78 ; R1 = R1 + 78

Labels (like TARGET) indicate instruction location.

Labels can’t be reserved words (like ADD, ORR, etc.)

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <61>
The Branch Not Taken
ARM Assembly
MOV R0, #4 ; R0 = 4
ADD R1, R0, R0 ; R1 = R0+R0 = 8
CMP R0, R1 ; sets flags with R0-
R1
BEQ THERE ; branch not taken
(Z=0)
ORR R1, R1, #1 ; R1 = R1 OR R1 = 9
THERE
ADD R1, R1, 78 ; R1 = R1 + 78 = 87

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <62>
Programming Building Blocks
• Data-processing Instructions
• Conditional Execution
• Branches
• High-level Constructs:
 if/else statements
 for loops
 while loops
 arrays
 function calls

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <63>
if Statement
C Code ARM Assembly Code
;R0=f, R1=g, R2=h, R3=i, R4=j

if (i == j) CMP R3, R4 ; set flags with R3-R4

f = g + h; BNE L1 ; if i!=j, skip if block
ADD R0, R1, R2 ; f = g + h

L1
f = f – i; SUB R0, R0, R3 ; f = f - i

Assembly tests opposite case (i != j) of high-level code

(i == j)

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <64>
 Lab Example 6
;;; Directives Reset_Handler
PRESERVE8 ;;;;;;;;;;User Code Starts from the next
THUMB line;;;;;;;;;;;;
;High Level Code
; Vector Table Mapped to Address 0 at Reset ; if (i == j)
; Linker requires __Vectors to be exported ; f = g + h;
; f = f – i;
AREA RESET, DATA, READONLY
EXPORT __Vectors ;R0=f, R1=g, R2=h, R3=i, R4=j
MOV R3, #2
__Vectors MOV R4, #2
DCD 0x20001000
; stack pointer value when stack is empty MOV R0, #0
DCD Reset_Handler ; reset vector MOV R1, #3
ALIGN MOV R2, #4

; The program CMP R3, R4 ; set flags with R3-R4

; Linker requires Reset_Handler BNE L1 ; if i!=j, skip if block
AREA MYCODE, CODE, READONLY ADD R0, R1, R2 ; f = g + h
L1
ENTRY SUB R0, R0, R3 ; f = f - i
EXPORT Reset_Handler
STOP
B STOP

END ;End of the program

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <65>
if Statement: Alternate Code
C Code ARM Assembly Code
;R0=f, R1=g, R2=h, R3=i, R4=j

if (i == j) CMP R3, R4 ; set flags with R3-

f = g + h; R4
f = f – i; ADDEQ R0, R1, R2 ; if (i==j) f = g + h
SUB R0, R0, R3 ; f = f - i

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <66>
if Statement: Alternate Code
Original Alternate Assembly Code
;R0=f, R1=g, R2=h, R3=i, R4=j

CMP R3, R4 CMP R3, R4 ; set flags with R3-

BNE L1 R4
ADD R0, R1, R2 ADDEQ R0, R1, R2 ; if (i==j) f = g + h
L1 SUB R0, R0, R3 ; f = f - i
SUB R0, R0, R3

Useful for short conditional blocks of code

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <67>
if/else Statement

C Code ARM Assembly Code

;R0=f, R1=g, R2=h, R3=i, R4=j

if (i == j) CMP R3, R4 ; set flags with R3-R4

f = g + h; BNE L1 ; if i!=j, skip if
block
ADD R0, R1, R2 ; f = g + h
else B L2 ; branch past else
f = f – i; block
L1
SUB R0, R0, R2 ; f = f – i
L2

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <68>
if/else Statement: Alternate Code

C Code ARM Assembly Code

;R0=f, R1=g, R2=h, R3=i, R4=j

if (i == j) CMP R3, R4 ; set flags with R3-

f = g + h; R4
else ADDEQ R0, R1, R2 ; if (i==j) f = g + h
f = f – i;
SUBNE R0, R0, R2 ; else f = f - i

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <69>
if/else Statement: Alternate Code

Original Alternate Assembly Code

;R0=f, R1=g, R2=h, R3=i, R4=j

CMP R3, R4 CMP R3, R4 ; set flags with R3-

BNE L1 R4
ADD R0, R1, R2 ADDEQ R0, R1, R2 ; if (i==j) f = g + h
B L2
L1 SUBNE R0, R0, R2 ; else f = f - i
SUB R0, R0, R2
L2

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <70>
while Loops
C Code ARM Assembly Code
// determines the power ; R0 = pow, R1 = x
// of x such that 2x = 128 MOV R0, #1 ; pow = 1
int pow = 1; MOV R1, #0 ; x = 0
int x = 0;
WHILE
CMP R0, #128 ; R0-128
while (pow != 128) { BEQ DONE ; if (pow==128)
; exit loop
pow = pow * 2; LSL R0, R0, #1 ; pow=pow*2
x = x + 1; ADD R1, R1, #1 ; x=x+1
} B WHILE ; repeat loop

DONE

Assembly tests for the opposite case (pow == 128) of the C

code (pow != 128).

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <71>
 Lab Example 7
;;; Directives Reset_Handler
PRESERVE8 ;;;;;;;;;;User Code Starts from the next
THUMB line;;;;;;;;;;;;
; int pow = 1;
; Vector Table Mapped to Address 0 at Reset ; int x = 0;
; Linker requires __Vectors to be exported ; while (pow != 128) {
; pow = pow * 2;
AREA RESET, DATA, READONLY ; x = x + 1;
EXPORT __Vectors ;}

__Vectors ; R0 = pow, R1 = x
DCD 0x20001000 MOV R0, #1 ; pow = 1
; stack pointer value when stack is empty MOV R1, #0 ; x = 0
DCD Reset_Handler ; reset vector
ALIGN WHILE
CMP R0, #128 ; R0-128
; The program BEQ DONE ; if (pow==128) exit loop
; Linker requires Reset_Handler LSL R0, R0, #1 ; pow=pow*2
AREA MYCODE, CODE, READONLY ADD R1, R1, #1 ; x=x+1
B WHILE ; repeat loop
ENTRY DONE
EXPORT Reset_Handler
STOP
B STOP

END ;End of the program

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <72>
for Loops
for (initialization; condition; loop operation)
statement

• initialization: executes before the loop begins

• condition: is tested at the beginning of each iteration
• loop operation: executes at the end of each iteration
• statement: executes each time the condition is met

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <73>
for Loops
C Code ARM Assembly Code
// adds numbers from 1-9 ; R0 = i, R1 = sum
int sum = 0 MOV R0, #1 ; i = 1
MOV R1, #0 ; sum = 0

for (i=1; i!=10; i=i+1) FOR

sum = sum + i; CMP R0, #10 ; R0-10
BEQ DONE ; if (i==10)
; exit loop
ADD R1, R1, R0 ; sum=sum + i
ADD R0, R0, #1 ; i = i + 1
B FOR ; repeat loop

DONE

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <74>
for Loops: Decremented Loops
In ARM, decremented loop variables are more efficient
C Code ARM Assembly Code
// adds numbers from 1-9 ; R0 = i, R1 = sum
int sum = 0 MOV R0, #9 ; i = 9
MOV R1, #0 ; sum = 0

for (i=9; i!=0; i=i-1) FOR

sum = sum + i; ADD R1, R1, R0 ; sum=sum + i
SUBS R0, R0, #1 ; i = i – 1
; and set
flags
BNE FOR ; if (i!=0)
; repeat loop
Saves 2 instructions per iteration:
• Decrement loop variable & compare: SUBS R0, R0, #1
• Only 1 branch – instead of 2

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <75>
Programming Building Blocks
• Data-processing Instructions
• Conditional Execution
• Branches
• High-level Constructs:
 if/else statements
 for loops
 while loops
 arrays
 function calls

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <76>
Arrays
• Access large amounts of similar data
 Index: access to each element
 Size: number of elements

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <77>
Arrays
• 5-element array
 Base address = 0x14000000 (address of first
element, scores[0])
 Array elements accessed relative to base address

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <78>
Accessing Arrays
C Code
int array[5];
array[0] = array[0] * 8;
array[1] = array[1] * 8;

ARM Assembly Code

; R0 = array base address
MOV R0, #0x60000000 ; R0 = 0x60000000
LDR R1, [R0] ; R1 = array[0]
LSL R1, R1, #3 ; R1 = R1 << 3 = R1*8
STR R1, [R0] ; array[0] = R1
LDR R1, [R0, #4] ; R1 = array[1]
LSL R1, R1, #3 ; R1 = R1 << 3 = R1*8
STR R1, [R0, #4] ; array[1] = R1

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <79>
 Lab Example 8
;;; Directives Reset_Handler
PRESERVE8 ;;;;;;;;;;User Code Starts from the next
THUMB line;;;;;;;;;;;;
; int array[5];
; Vector Table Mapped to Address 0 at Reset ; array[0] = 2;
; Linker requires __Vectors to be exported ; array[1] = array[0] * 8;

AREA RESET, DATA, READONLY ; R0 = array base address

EXPORT __Vectors MOV R0, #0x20000000 ; R0 = 0x20000000
; writeable portion of memory starts
__Vectors ; from 0x20000000. To check memory
DCD 0x20001000 ; range, go to Debug -> Memory Map in
; stack pointer value when stack is empty
DCD Reset_Handler ; reset vector ; uvision
ALIGN
MOV R1, #2 ; R1 = array[0] = 2
; The program STR R1, [R0] ; array[0] = R1
; Linker requires Reset_Handler
AREA MYCODE, CODE, READONLY LDR R1, [R0] ; R1 = array[0]
LSL R1, R1, #3 ; R1 = R1 << 3 = R1*8
ENTRY STR R1, [R0, #4] ; array[1] = R1
EXPORT Reset_Handler
STOP
B STOP

END ;End of the program

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <80>
Arrays using for Loops
C Code
int array[200];
int i;
for (i=199; i >= 0; i = i - 1)
array[i] = array[i] * 8;

ARM Assembly Code

; R0 = array base address, R1 = i
MOV R0, #0x60000000
MOV R1, #199
FOR
LDR R2, [R0, R1, LSL #2] ; R2 = array(i)
LSL R2, R2, #3 ; R2 = R2<<3 = R3*8
STR R2, [R0, R1, LSL #2] ; array(i) = R2
SUBS R1, R1, #1 ; i = i – 1
; and set flags
BPL FOR ; if (i>=0) repeat loop

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <81>
 Lab Example 9
;;; Directives Reset_Handler
PRESERVE8 ;;;;;;;;;;User Code Starts;;;;;;;;;;;;
THUMB ; int array[200];
; int i;
; Vector Table Mapped to Address 0 at Reset ; for (i=10; i >= 0; i = i - 1)
; Linker requires __Vectors to be exported ;array[i] = (array[i]+2) * 8;

AREA RESET, DATA, READONLY ; R0 = array base address, R1 = i

EXPORT __Vectors MOV R0, #0x20000000
; writeable portion of memory starts
__Vectors ; from 0x20000000. To check memory
DCD 0x20001000 ; range, go to Debug -> Memory Map in
; stack pointer value ; uvision
; when stack is empty MOV R1, #10
DCD Reset_Handler ; reset vector
ALIGN FOR
LDR R2, [R0, R1, LSL #2]
; The program ; R2 = array(i)=[R0+(R1<<2)]=[R0+R1*4]
; Linker requires Reset_Handler ADD R2, #2 ; R2 = array(i)+2
AREA MYCODE, CODE, READONLY LSL R2, R2, #3 ; R2 = R2<<3 = R3*8
STR R2, [R0, R1, LSL #2] ; array(i) = R2
ENTRY SUB R1, R1, #1 ; i = i – 1
EXPORT Reset_Handler CMP R1, #0 ; check R1-0
BGE FOR ; if (i>=0) repeat loop
STOP
B STOP
END ;End of the program

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <82>
ASCII Code
• American Standard Code for Information
Interchange
• Each text character has unique byte value
– For example, S = 0x53, a = 0x61, A = 0x41
– Lower-case and upper-case differ by 0x20 (32)

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <83>
Cast of Characters

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <84>
Programming Building Blocks
• Data-processing Instructions
• Conditional Execution
• Branches
• High-level Constructs:
 if/else statements
 for loops
 while loops
 arrays
 function calls

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <85>
Function Calls
• Caller: calling function (in this case, main)
• Callee: called function (in this case, sum)
C Code
void main()
{
int y;
y = sum(42, 7);
...
}

int sum(int a, int b)

{
return (a + b);
}

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <86>
Function Conventions
• Caller:
– passes arguments to callee
– jumps to callee
• Callee:
– performs the function
– returns result to caller
– returns to point of call
– must not overwrite registers or memory needed by
caller

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <87>
ARM Function Conventions
• Call Function: branch and link
BL
• Return from function: move the link register
to PC: MOV PC, LR
• Arguments: R0-R3
• Return value: R0

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <88>
Function Calls
C Code ARM Assembly Code
int main() { 0x00000200 MAIN BL SIMPLE
simple(); 0x00000204 ADD R4, R5, R6
a = b + c; ...
}

0x00401020 SIMPLE MOV PC, LR

void simple() {
return;
}

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <89>
Function Calls
C Code ARM Assembly Code
int main() { 0x00000200 MAIN BL SIMPLE
simple(); 0x00000204 ADD R4, R5, R6
a = b + c; ...
}

0x00401020 SIMPLE MOV PC, LR

void simple() {
return;
}

void means that simple doesn’t return a value

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <90>
Function Calls
C Code ARM Assembly Code
int main() { 0x00000200 MAIN BL SIMPLE
simple(); 0x00000204 ADD R4, R5, R6
a = b + c; ...
}

0x00401020 SIMPLE MOV PC, LR

void simple() {
return;
}

BL branches to SIMPLE
LR = PC + 4 = 0x00000204
MOV PC, LR makes PC = LR
(the next instruction executed is at 0x00000204)

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <91>
Input Arguments and Return Value
ARM conventions:
• Argument values: R0 - R3
• Return value: R0

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <92>
Input Arguments and Return Value
C Code
int main()
{
int y;
...
y = diffofsums(2, 3, 4, 5); // 4 arguments
...
}

int diffofsums(int f, int g, int h, int i)

{
int result;
result = (f + g) - (h + i);
return result; // return value
}

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <93>
Input Arguments and Return Value
ARM Assembly Code
; R4 = y
MAIN
...
MOV R0, #2 ; argument 0 = 2
MOV R1, #3 ; argument 1 = 3
MOV R2, #4 ; argument 2 = 4
MOV R3, #5 ; argument 3 = 5
BL DIFFOFSUMS ; call function
MOV R4, R0 ; y = returned value
...
; R4 = result
DIFFOFSUMS
ADD R8, R0, R1 ; R8 = f + g
ADD R9, R2, R3 ; R9 = h + i
SUB R4, R8, R9 ; result = (f + g) - (h + i)
MOV R0, R4 ; put return value in R0
MOV PC, LR ; return to caller

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <94>
 Lab Example 10
;;; Directives Reset_Handler
PRESERVE8 ;;;;;;;;;;User Code
THUMB Starts;;;;;;;;;;;; DIFFOFSUMS
; int main() { ADD R8, R0, R1 ; R8 = f + g
; Vector Table Mapped to ; int y; ADD R9, R2, R3 ; R9 = h + i
; Address 0 at Reset ; y = diffofsums(2, 3, 4, 5); SUB R4, R8, R9
; Linker requires __ ;} ; result = (f + g) - (h + i)
; Vectors to be exported
;int diffofsums (int f, int g, MOV R0, R4
AREA RESET, DATA, READONLY int ; h, int i) { ; put return value in R0
EXPORT __Vectors ; int result; MOV PC, LR
; result = (f + g) - (h + i); ; return to caller
__Vectors ; return result;
DCD 0x20001000 ;} STOP
; stack pointer value B STOP
; when stack is empty MAIN
DCD Reset_Handler ; R4 = y END ;End of the program
; reset vector MOV R0, #2 ; arg 0 = f = 2
ALIGN MOV R1, #3 ; arg 1 = g = 3
MOV R2, #4 ; arg 2 = h = 4
; The program MOV R3, #5 ; arg 3 = i = 5
; Linker requires Reset_Handler BL DIFFOFSUMS ; call function
AREA MYCODE, CODE, READONLY MOV R4, R0 ; y = returned value
; R4 = result
ENTRY B STOP
EXPORT Reset_Handler

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <95>
Input Arguments and Return Value
ARM Assembly Code
; R4 = result
DIFFOFSUMS
ADD R8, R0, R1 ; R8 = f + g
ADD R9, R2, R3 ; R9 = h + i
SUB R4, R8, R9 ; result = (f + g) - (h + i)
MOV R0, R4 ; put return value in R0
MOV PC, LR ; return to caller

• diffofsums overwrote 3 registers: R4, R8, R9

•diffofsums can use stack to temporarily store registers

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <96>
The Stack
• Memory used to temporarily
save variables
• Like stack of dishes, last-in-
first-out (LIFO) queue
• Expands: uses more memory
when more space needed
• Contracts: uses less memory
when the space no longer
needed
Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <97>
The Stack
• Grows down (from higher to lower memory
addresses)
• Stack pointer: SP points to top of the stack

Stack expands by 2 words

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <98>
How Functions use the Stack
• Called functions must have no unintended
side effects
• But diffofsums overwrites 3 registers: R4,
R8, R9
ARM Assembly Code
; R4 = result
DIFFOFSUMS
ADD R8, R0, R1 ; R8 = f + g
ADD R9, R2, R3 ; R9 = h + i
SUB R4, R8, R9 ; result = (f + g) - (h + i)
MOV R0, R4 ; put return value in R0
MOV PC, LR ; return to caller

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <99>
Storing Register Values on the Stack
ARM Assembly Code
; R2 = result
DIFFOFSUMS
SUB SP, SP, #12 ; make space on stack for 3 registers
STR R4, [SP, #-8] ; save R4 on stack
STR R8, [SP, #-4] ; save R8 on stack
STR R9, [SP] ; save R9 on stack
ADD R8, R0, R1 ; R8 = f + g
ADD R9, R2, R3 ; R9 = h + i
SUB R4, R8, R9 ; result = (f + g) - (h + i)
MOV R0, R4 ; put return value in R0
LDR R9, [SP] ; restore R9 from stack
LDR R8, [SP, #-4] ; restore R8 from stack
LDR R4, [SP, #-8] ; restore R4 from stack
ADD SP, SP, #12 ; deallocate stack space
MOV PC, LR ; return to caller

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <100>
The Stack during diffofsums Call

Before call During call After call

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <101>
 Lab Example 11
;;; Directives Reset_Handler DIFFOFSUMS
PRESERVE8 ;;;;;;;;;;User Code ; Save R4, R8, R9 in Stack
THUMB Starts;;;;;;;;;;;; SUB SP, SP, #12
; int main() { STR R4, [SP, #-8]
; Vector Table Mapped to ; int y; STR R8, [SP, #-4]
; Address 0 at Reset ; y = diffofsums(2, 3, 4, 5); STR R9, [SP]
; Linker requires __ ;}
; Vectors to be exported ADD R8, R0, R1 ; R8 = f + g
;int diffofsums (int f, int g, ADD R9, R2, R3 ; R9 = h + i
AREA RESET, DATA, READONLY int ; h, int i) { SUB R4, R8, R9
EXPORT __Vectors ; int result; ; result = (f + g) - (h + i)
; result = (f + g) - (h + i); MOV R0, R4
__Vectors ; return result; ; put return value in R0
DCD 0x20001000 ;}
; stack pointer value ; Retrieve R4, R8, R9 in Stack
; when stack is empty MAIN LDR R9, [SP]
DCD Reset_Handler ; R4 = y LDR R8, [SP, #-4]
; reset vector MOV R0, #2 ; arg 0 = f = 2 LDR R4, [SP, #-8]
ALIGN MOV R1, #3 ; arg 1 = g = 3 ADD SP, SP, #12
MOV R2, #4 ; arg 2 = h = 4 MOV PC, LR ; return to caller
; The program MOV R3, #5 ; arg 3 = i = 5
; Linker requires Reset_Handler BL DIFFOFSUMS ; call function STOP
AREA MYCODE, CODE, READONLY MOV R4, R0 ; y = returned value B STOP
; R4 = result
ENTRY B STOP END ;End of the program
EXPORT Reset_Handler

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <102>
 Lab Example 12
;;; Directives Reset_Handler DIFFOFSUMS
PRESERVE8 ;;;;;;;;;;User Code PUSH {R4, R8, R9}
THUMB Starts;;;;;;;;;;;; ADD R8, R0, R1 ; R8 = f + g
; int main() { ADD R9, R2, R3 ; R9 = h + i
; Vector Table Mapped to ; int y; SUB R4, R8, R9
; Address 0 at Reset ; y = diffofsums(2, 3, 4, 5); ; result = (f + g) - (h + i)
; Linker requires __ ;} MOV R0, R4
; Vectors to be exported ; put return value in R0
;int diffofsums (int f, int g,
AREA RESET, DATA, READONLY int ; h, int i) { POP {R4, R8, R9}
EXPORT __Vectors ; int result; MOV PC, LR ; return to caller
; result = (f + g) - (h + i);
__Vectors ; return result; STOP
DCD 0x20001000 ;} B STOP
; stack pointer value
; when stack is empty MAIN END ;End of the program
DCD Reset_Handler ; R4 = y
; reset vector MOV R0, #2 ; arg 0 = f = 2
ALIGN MOV R1, #3 ; arg 1 = g = 3
MOV R2, #4 ; arg 2 = h = 4
; The program MOV R3, #5 ; arg 3 = i = 5
; Linker requires Reset_Handler BL DIFFOFSUMS ; call function
AREA MYCODE, CODE, READONLY MOV R4, R0 ; y = returned value
; R4 = result
ENTRY B STOP
EXPORT Reset_Handler

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <103>
Registers
Preserved Nonpreserved
Callee-Saved Caller-Saved
R4-R11 R12

R14 (LR) R0-R3

R13 (SP) CPSR

stack above SP stack below SP

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <104>
Storing Saved Registers only on Stack
ARM Assembly Code
; R2 = result
DIFFOFSUMS
STR R4, [SP, #-4]! ; save R4 on stack
ADD R8, R0, R1 ; R8 = f + g
ADD R9, R2, R3 ; R9 = h + i
SUB R4, R8, R9 ; result = (f + g) - (h + i)
MOV R0, R4 ; put return value in R0
LDR R4, [SP], #4 ; restore R4 from stack
MOV PC, LR ; return to caller

Notice code optimization for expanding/contracting stack

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <105>
Nonleaf Function
ARM Assembly Code
STR LR, [SP, #-4]! ; store LR on stack
BL PROC2 ; call another function

...
LDR LR, [SP], #4 ; restore LR from stack
jr $ra ; return to caller

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <106>
Nonleaf Function Example
C Code ARM Assembly Code
; R0=a, R1=b, R4=i, R5=x ; R0=p, R4=r
int f1(int a, int b) { F1 F2
int i, x; PUSH {R4, R5, LR} PUSH {R4}
ADD R5, R0, R1 ADD R4, R0, 5
x = (a + b)*(a − b); SUB R12, R0, R1 ADD R0, R4, R0
MUL R5, R5, R12 POP {R4}
for (i=0; i<a; i++) MOV R4, #0 MOV PC, LR
x = x + f2(b+i); FOR
CMP R4, R0
return x; BGE RETURN
} PUSH {R0, R1}
ADD R0, R1, R4
int f2(int p) { BL F2
int r; ADD R5, R5, R0
POP {R0, R1}
r = p + 5; ADD R4, R4, #1
return r + p; B FOR
RETURN
} MOV R0, R5
POP {R4, R5, LR}
MOV PC, LR

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <107>
Nonleaf Function Example
ARM Assembly Code
; R0=a, R1=b, R4=i, R5=x ; R0=p, R4=r
F1 F2
PUSH {R4, R5, LR} ; save regs PUSH {R4} ; save regs
ADD R5, R0, R1 ; x = (a+b) ADD R4, R0, 5 ; r = p+5
SUB R12, R0, R1 ; temp = (a-b) ADD R0, R4, R0 ; return r+p
MUL R5, R5, R12 ; x = x*temp POP {R4} ; restore regs
MOV R4, #0 ; i = 0 MOV PC, LR ; return
FOR
CMP R4, R0 ; i < a?
BGE RETURN ; no: exit loop
PUSH {R0, R1} ; save regs
ADD R0, R1, R4 ; arg is b+i
BL F2 ; call f2(b+i)
ADD R5, R5, R0 ; x = x+f2(b+i)
POP {R0, R1} ; restore regs
ADD R4, R4, #1 ; i++
B FOR ; repeat loop
RETURN
MOV R0, R5 ; return x
POP {R4, R5, LR} ; restore regs
MOV PC, LR ; return

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <108>
Stack during Nonleaf Function

At beginning of f1 Just before calling f2 After calling f2

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <109>
Recursive Function Call
C Code
int factorial(int n) {
if (n <= 1)
return 1;
else
return (n * factorial(n-1));
}

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <110>
Recursive Function Call
ARM Assembly Code
0x94 FACTORIAL STR R0, [SP, #-4]! ;store R0 on stack
0x98 STR LR, [SP, #-4]! ;store LR on stack
0x9C CMP R0, #2 ;set flags with R0-2
0xA0 BHS ELSE ;if (r0>=2) branch to else
0xA4 MOV R0, #1 ; otherwise return 1
0xA8 ADD SP, SP, #8 ; restore SP 1
0xAC MOV PC, LR ; return
0xB0 ELSE SUB R0, R0, #1 ; n = n - 1
0xB4 BL FACTORIAL ; recursive call
0xB8 LDR LR, [SP], #4 ; restore LR
0xBC LDR R1, [SP], #4 ; restore R0 (n) into R1
0xC0 MUL R0, R1, R0 ; R0 = n*factorial(n-1)
0xC4 MOV PC, LR ; return

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <111>
Recursive Function Call
C Code ARM Assembly Code
int factorial(int n) { 0x94 FACTORIAL STR R0, [SP, #-4]!
0x98 STR LR, [SP, #-4]!
if (n <= 1) 0x9C CMP R0, #2
return 1; 0xA0 BHS ELSE
0xA4 MOV R0, #1
0xA8 ADD SP, SP, #8
0xAC MOV PC, LR
else 0xB0 ELSE SUB R0, R0, #1
return (n * factorial(n-1)); 0xB4 BL FACTORIAL
} 0xB8 LDR LR, [SP], #4
0xBC LDR R1, [SP], #4
0xC0 MUL R0, R1, R0
0xC4 MOV PC, LR

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <112>
Stack during Recursive Call

Before call During call After call

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <113>
Function Call Summary
• Caller
– Puts arguments in R0-R3
– Saves any needed registers (LR, maybe R0-R3, R8-R12)
– Calls function: BL CALLEE
– Restores registers
– Looks for result in R0
• Callee
– Saves registers that might be disturbed (R4-R7)
– Performs function
– Puts result in R0
– Restores registers
– Returns: MOV PC, LR

Digital Design and Computer Architecture: ARM® Edition © 2015 Chapter 6 <114>