MICROPROCESSOR ( BEE602)
UNIT-1
By :
Ajit Kumar Yadav
Assistant Professor
Department of Electrical Engineering
United College of Engineering & Research, Prayagraj
United College of Engineering & Course Instructor: Mr. Ajit Yadav
Research
Prayagraj Dept. Of Electrical Engineering
MICROPROCESSOR SYLLABUS
(BEE602)
Unit- I:
• Introduction to Microprocessor and its applications, Microprocessor Evolution Tree,
Microprocessor Architecture (Harward & Princeton), General Architecture of the
Microprocessor and its operations, Component of Microprocessor system: Processor, Buses,
Memory, Inputs-outputs (I/Os) and other Interfacingdevices
Unit-II:
• Intel 8085 microprocessor: Pin Diagram, Internal architecture: ALU, Registers, Timing and
control unit, interrupt:
• Instruction Set of 8085:
• Instruction format, op-codes, mnemonics, no. of bytes computation of the instruction,
Machine cycles and T- states and Execution time computation of an instruction. Classification
of instruction with their examples. Writing of assembly Language programs.
United College of Engineering & Course Instructor: Mr. Ajit Yadav
Research
Prayagraj Dept. Of Electrical Engineering
MICROPROCESSOR SYLLABUS
(BEE602)
Unit-III:
• Architecture of Intel 8086:
• Pin Diagram, Bus Interface Unit, Execution unit, Register organization, Memory addressing,
Memory Segmentation, Pipelining, Min & Max operating Modes
• 8086 Instruction set: Format, Addressing Modes, Instruction Set Groups: Data transfer,
Arithmetic, Logic, String, Branch control transfer and Processor control.
• Interrupts: Hardware and software interrupts.
Unit-IV:
• Program structure for microprocessors, Flowcharts of series, parallel, and controls structures.
• Assembler Level Programming: Memory space allocation for monitor and user program.
Assembly language program using Debug or MASM assembler
United College of Engineering & Course Instructor: Mr. Ajit Yadav
Research
Prayagraj Dept. Of Electrical Engineering
MICROPROCESSOR SYLLABUS
(BEE602)
Unit-V:
• Peripheral Interfacing:
• Programmed I/O, Memory Mapped I/O, Interrupt Driven I/O, DMA I/O interface, Serial and
Parallel communications
• Peripheral Devices:
• DMA controller (Intel 8237), Programmable peripheral interface (Intel 8255), Programmable
timer/counter (Intl 8253/8254),Programmable Interrupt Controller (Intel 8259).
•
United College of Engineering & Course Instructor: Mr. Ajit Yadav
Research
Prayagraj Dept. Of Electrical Engineering
MICROPROCESSOR BOOKS
(BEE602)
Text Books: 6. Brey, Barry B. “INTEL Microprocessors”
1. 1. Ramesh Gaonkar, “Microprocessor Prentice Hall ( India)
Architecture, Programming, and 7. Aditya P Mathur, “Introduction to
Applications with the 8085”, 6th Edition, Microprocessor” Tata McGraw Hill
Penram International Publication (India) Pvt. 8. M. Rafiquzzaman, “Microprocessors- Theory
Ltd.,2013 & applications”, Pearson India.
2. D. V. Hall : Microprocessors Interfacing, , 9. B. Ram, “Advanced Microprocessor &
McGraw 3rd Edition Interfacing” Tata McGraw Hill
3. Avtar Singh & Walter A. Triebel “8088 & 10. Renu Singh & B.P. Singh, “Microprocessor
8086 Microprocessor” Pearson Education. and Interfacing and applications” New Age
4. Ray, A.K. &Burchandi,K.M., “Advanced International
Microprocessors and Peripherals: 11. Liu and Gibson G.A., “Microcomputer
Architecture, Programaming and Systems: The 8086/8088 Family Architecture
Interfacing” Tata Mc. Graw Hill Programming & Design” Pearson India.
5. AK Gautam, “Advanced Microprocessors”,
Khanna Publishers.
Reference Books:
United College of Engineering & Course Instructor: Mr. Ajit Yadav
Research
Prayagraj Dept. Of Electrical Engineering
Microprocessor Architecture (Harward
& Princeton)
• HARVARD VERSUS PRINCETON
• Many years ago, the United States government asked Harvard and
Princeton Universities to come up with a computer architecture to
be used in computing tables of Naval artillery shell distances for
varying elevations and environmental conditions.
• Princeton's response was a computer that had common memory
for storing the control program as well as variables and other data
structures. It was best known by the chief scientist's name "Von
Neumann"
United College of Engineering & Course Instructor: Mr. Ajit Yadav
Research
Prayagraj Dept. Of Electrical Engineering
Von Neumann Architecture
• Von Neumann Architecture is a digital computer architecture whose design is
based on the concept of stored program computers where program data and
instruction data are stored in the same memory. This architecture was
designed by the famous mathematician and physicist John Von Neumann in
1945.
• Advantages of Von Neumann Architecture
• Simplicity: The fact that all data and instructions are stored in a single
memory space helps the process of designing a computer system as there is
no need to create complicated systems of routing since pathways may
coincide.
• Cost-Effective: A smaller number of components is needed as compared to
the other architectural designs hence more economical.
• Flexibility: A program can Always be changed or altered without experiencing
a change in some underlying physical aspects such as the circuitry.
United College of Engineering & Course Instructor: Mr. Ajit Yadav
Research
Prayagraj Dept. Of Electrical Engineering
Microprocessor Architecture (Harward &
Princeton)
United College of Engineering & Course Instructor: Mr. Ajit Yadav
Research
Prayagraj Dept. Of Electrical Engineering
Disadvantages of Von Neumann
Architecture
• Bottleneck Issues: The shared bus can be a problem
because the data and control instructions cannot be
obtained simultaneously and therefore it becomes slow.
• Memory Corruption: Since the data and instructions reside
in the same memory, then there is a temptation of one
erasing the other thereby producing system faults.
United College of Engineering & Course Instructor: Mr. Ajit Yadav
Research
Prayagraj Dept. Of Electrical Engineering
Harvard Architecture
• Harvard Architecture is the digital computer architecture whose
design is based on the concept where there are separate storage
and separate buses (signal path) for instruction and data. It was
basically developed to overcome the bottleneck of Von Neumann
Architecture.
• Features
• Separate memory spaces
• Fixed instruction length
• Parallel instruction and data access
• More efficient memory usage
• Suitable for embedded systems
• Limited flexibility
United College of Engineering & Course Instructor: Mr. Ajit Yadav
Research
Prayagraj Dept. Of Electrical Engineering
Advantages of Harvard Architecture
• Faster Processing: The availability of two buses for data
and instructions avoids a problem of contention where
only one bus is used and this enhances the velocity of
the system.
• Improved Security: In this way the chance of memory
corruption is at least cut in half since data is not stored
in the same locations as instructions.
• Efficient Use of Resources: It enables the use of
different memory for data and for instructions of
different sizes as this help in optimal utilization of the
buses and other resources.
United College of Engineering & Course Instructor: Mr. Ajit Yadav
Research
Prayagraj Dept. Of Electrical Engineering
Microprocessor Architecture (Harward &
Princeton)
United College of Engineering & Course Instructor: Mr. Ajit Yadav
Research
Prayagraj Dept. Of Electrical Engineering
Disadvantages of Harvard Architecture
• Complexity: The design and the implementation of
this type are more intricate, thus necessitating other
hardware facilities.
• Higher Cost: Since the concept of Harvard
architecture calls for two sets of memory and two
separate buses, their implementation costs are
comparatively high than Von Neumann architecture.
• Less Flexibility Competitors : Changing or even
improving the system can also be a little tricky
because of the different memory regions.
United College of Engineering & Course Instructor: Mr. Ajit Yadav
Research
Prayagraj Dept. Of Electrical Engineering
Microprocessor Architecture (Harward &
Princeton)
• The Princeton architecture won the competition
because it was better suited for the technology of the
time. Using one memory was preferable because of the
unreliability of current electronics (this was before
transistors were in widespread use). A single memory
interface would have fewer things that could go wrong.
• The Harvard architecture was largely ignored until the
late 1970s when microcontroller manufacturers
realized that the architecture had advantages for the
devices they were currently designing.
United College of Engineering & Course Instructor: Mr. Ajit Yadav
Research
Prayagraj Dept. Of Electrical Engineering
Microprocessor Architecture (Harward &
Princeton)
• Advantages of the two architectures
• The Von Neumann architecture's largest advantage is that it simplifies the
microcontroller chip design because only one memory is accessed. For
microcontrollers, its biggest asset is that the contents of RAM (random-access
memory) can be used for both variable (data) storage as well as program
instruction storage. An advantage for some applications is the program counter
stack contents that are available for access by the program. This allows greater
flexibility in developing software, primarily in the areas of real-time operating
systems.
• The Harvard architecture executes instructions in fewer instruction cycles that
the Von Neumann architecture. This is because a much greater amount of
instruction parallelism is possible in the Harvard architecture. Parallelism means
that fetches for the next instruction can take place during the execution of the
current instruction, without having to either wait for a "dead" cycle of the
instruction's execution or stop the processor's operation while the next
instruction is being fetched.
United College of Engineering & Course Instructor: Mr. Ajit Yadav
Research
Prayagraj Dept. Of Electrical Engineering
Difference between Von Neumann and
Harvard Architecture
ON NEUMANN ARCHITECTURE HARVARD ARCHITECTURE
It is ancient computer architecture based on stored program It is modern computer architecture based on Harvard Mark I
computer concept. relay based model.
Same physical memory address is used for instructions and Separate physical memory address is used for instructions
data. and data.
There is common bus for data and instruction transfer. Separate buses are used for transferring data and
instruction.
Two clock cycles are required to execute single instruction. An instruction is executed in a single cycle.
It is cheaper in cost. It is costly than Von Neumann Architecture.
CPU can not access instructions and read/write at the same CPU can access instructions and read/write at the same
time. time.
It is used in personal computers and small computers. It is used in micro controllers and signal processing.
United College of Engineering & Course Instructor: Mr. Ajit Yadav
Research
Prayagraj Dept. Of Electrical Engineering
