SOFTWARE
ARCHITECTURE OF
THE 68000
Chapter Outline
Assembly Language Programming 68000
Addressing Modes
The 68000’s Instruction Set
Subroutine and Stack
Interrupts
• Program execution in any microprocessor
Assembly system consists of fetching binary information
from memory and decoding that information
Language to determine the instruction represented.
Programmi • The source file (human readable) is converted
into an object file containing actual binary
ng information the machine will understand by a
special program called an assembler.
Assembly Language
Programming (Cont..)
Source file
[Link]
ASM68K Assembler
Object file List file Hex file
([Link]) ([Link]) ([Link])
Assembly Language
Programming (Cont..)
• Data representation in assembly
– $42 - Hexadecimal
– @102 - Octal
– %1000010 - Binary
– &66 or 66 - Decimal
– ‘B’ - ASCII character
Assembly Language
Programming (Cont..)
• 68000 Machine code format
– Instruction Operation Word General Format
15 14 13 12 11 10 9 8 7 6 5
4 3 2 1 0
Operation word
(first word specifies operation and modes)
Immediate operand
(If any, one or two words)
Source effective address extension
(If any, one or two words)
Destination effective address extension
(If any, one or two words)
Assembly Language
Programming (Cont..)
• 68000 Machine code format
– Single-Effective-Address Instruction Operation
Word
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Effective Address
X X X X X X X X X X
Mode Register
68000 Instruction
Types
• The 68000 only have 54 basic instructions but if counted all the
variation, the amount of the instruction is over than 1000.
• There is impossible to include all the instruction in one list
• Normally, the instruction set of the 68000 microprocessor is
composed of 8 different groups:
– Data transfer – Arithmetic
– Logical – Shift and rotate
– Bit manipulation – BCD operations
– Program control – System control
68000 Instruction
Types (cont..)
Data transfer
68000 Instruction
Types (cont..)
Arithmetic
68000 Instruction
Types (cont..)
Compare and test
68000 Instruction
Types (cont..)
Logic
68000 Instruction
Types (cont..)
Shift
68000 Instruction
Types (cont..)
Rotate
68000 Instruction
Types (cont..)
Bit Manipulation
68000 Instruction
Types (cont..)
Subroutine and control
68000 Instruction
Types (cont..)
BCD Arithmetic
68000 Addressing Mode
An addressing mode specifies
how to calculate the effective
Addressing modes are the ways
memory address of an operand
how microprocessors specify
by using information held in
the address of an object they
registers and/or constants
want to access.
contained within a machine
instruction or elsewhere.
• There are six basic types of addressing mode
68000 – Register Direct
– Register Indirect
Addressing – Absolute
Mode – Program Counter Relative
(Cont..) – Immediate
– Implied
68000 Addressing Mode
(Cont..)
Data Register Direct
• In this addressing mode, the operand is one of the eight
data register.
• Example:
Instruction MOVE.B D0,D3
- Content for LSB byte in data register D0 is
copied to data register D3
Before After
REGISTER CONTENTS REGISTER CONTENTS
D0 10204FFF D0 10204FFF
D3 1034888A D3 103488FF
Only bit 0 – 7 involved in this because
this operation is a byte operation
Data Register Direct
(Cont..)
• Example:
Instruction MOVE.W D0,D3
- Content for LSB word in data register D0 is
copied to data register D3
Before After
REGISTER CONTENTS REGISTER CONTENTS
D0 10204FFF D0 10204FFF
D3 1034888A D3 10344FFF
Only bit 0 – 15 involved in this because
this operation is a word operation
Data Register Direct
(Cont..)
• Example:
Instruction MOVE.L D0,D3
- Content for LSB long word in data register D0 is
copied to data register D3
Before After
REGISTER CONTENTS REGISTER CONTENTS
D0 10204FFF D0 10204FFF
D3 1034888A D3 10204FFF
All bit 0 – 31 involved in this because
this operation is a long word operation
This addressing mode uses an
address register as the operand.
Address
Register
Direct Whenever an address register is
used as a destination, the size of
the operation must be W or L.
When W is used, the address
register will be loaded with a sign
extended value.
Address Register Direct
(Cont..)
• Example:
Instruction MOVEA A3,A0
- Copy content (word) in address register A3
to A0
Before After
REGISTER CONTENTS REGISTER CONTENTS
A0 00200000 A0 FFFF88A
A3 0004F88A A3 0004F88A
Sign-extended
Address Register Direct
(Cont..)
• Example:
Instruction MOVEA.L A3,A0
- Copy content (word) in address register A3
to A0
Before After
REGISTER CONTENTS REGISTER CONTENTS
A0 00200000 A0 0004F88A
A3 0004F88A A3 0004F88A
No sign-extended operation because
this instruction involve 32-bit
(longword)
Absolute Data
Addressing
• There are two types of absolute data addressing
– Absolute Long Mode:
In this mode, effective address can be determined by combining the two
operand word of an instruction.
First word Upper address
Lower address Second word
Combine
Memory address Operand
Absolute Data
Addressing (Cont..)
Machine code for CLR.W $10000 (Absolute long)
Mode =
Op-code = Size= absolute
long clear data byte
0100 0010 00 111 001 Operation word
0000 0000 0000 0001
Operand
0000 0000 0000 0000
Machine code for CLR.W $1000 (Absolute short)
Mode =
Op-code = Size= absolute short
clear data byte
0100 0010 00 111 000 Operation word
0001 0000 0000 0000 Operand
Absolute Data
Addressing (Cont..)
• Absolute short mode
– Absolute short addressing is usually generated by the assembler rather
than directly by the programmer. The assembler does this to generate
shorter code but it restricts the memory range you can access
– As absolute short uses a 16-bit extension word, it can only be used to
access memory at the bottom of memory or at the top of memory as
shown below. Absolute short cannot be used to access the memory in
between.
Memory address
Sign-extended
Memory address Operand
Absolute Data
Addressing (Cont..)
• Sign extended is performed as follows:
– If the most-significant bit of the word value is low (word values
0000 through 7FFF), the upper 16 bits of the address register will
be cleared. Thus, if A0 contains the address 12346800, the
instruction MOVEA.W A0,A1 will put 00006800 into A1
– If the most significant bit is high (word value 8000 through FFFF),
the upper 16 bits of the address register will be set. To illustrate,
if A0 contains 0000C580, the instruction MOVEA A0,A1
will place FFFFC580 into A1.
• This convention is known as short addressing, and allow
two 32KB block of memory to be accessed easily.
The first block is from 000000
to 007FFF. The second block is
from FF8000 to FFFFFF. Notice
that these two ranges are the
Absolute only ones available when sign
Data extension is used.
Addressing This is useful addressing mode
(Cont..) when the system is small and
requires only a small amount
of RAM and EPROM, such as
an automated vending
machine, etc.
Absolute Data
Addressing (Cont..)
000000 32 KB can be accessed using
short address 16 bit
007FFF
All other addresses need 32
bit to access
FF8000
32 KB can be accessed using
short address 16 bit
FFFFFF
Absolute Data
Addressing (Cont..)
• Example of absolute long mode addressing
• Instruction: CLR.B $10000
010000 42 51 010000 00 51
010002 55 13 010002 55 13
Absolute Data
Addressing (Cont..)
• Instruction: CLR.W
$10000
010000 42 51 010000 00 00
010002 55 13 010002 55 13
• Instruction: CLR.L
$10000
010000 42 51 010000 00 00
010002 55 13 010002 00 00
Absolute Data
Addressing (Cont..)
• Example of absolute short mode addressing
• Instruction: CLR.W $1000
001000 42 51 001000 00 00
001002 55 13 001002 55 13
• Instruction: CLR.W
$F000
FFF000 42 51 FFF000 00 00
FFF002 55 13 FFF002 55 13
Register Indirect
Addressing
• In this addressing mode an address register hold the
address of the memory location that contains the
operand data. The assembler will recognize this
addressing mode whenever the address register is
surrounded by parentheses, as in (A0), (A3) and (A7).
• Example
Instruction: MOVE.L D0, ;copy content in D0 to address in
(A0) register A0
Register Indirect
Addressing (cont..)
Before
Register Contents Address Contents
A0 00001000 001000 55
D0 001001 02
1043834F 001002 3F
001003 00
A0 contains destination
address
After
Register Contents Address Contents
A0 00001000 001000 10
D0 1043834F 001001 43
001002 83
Content A0 is not
changed 001003 4F
Longword of D0 is stored in address $001000
Register Indirect
Addressing with post -
increment
Array
Address Address Address
N Value 0 N Value 0 N Value 0
N+1 Value 1 N+2 Value 1 N+4 Value 1
Value 2 Value 2 N+8 Value 2
N+2 Value 3 N+4 Value 3 N+12 Value 3
Value 4 Value 4 Value 4
N+3 Value 5 N+6 Value 5 N+16 Value 5
N+4
: N+8
: :
: : :
Byte array Word array Longword array
Register Indirect
Addressing with post –
increment (cont..)
• Using pointer in array manipulation
“pointer” Address
An N Value 0 N
Value 1 N+2
Value 2 N+4
Value 3
: N+6
Address
Value 0 N
“pointer”
An N+2 Value 1 N+2
Value 2
Value 3 N+4
:
N+6
:
Register Indirect
Addressing with post –
increment (cont..)
• If we want to determine the amount of total values in the
array, we have to know the following:
– The beginning address. Let say $2000
– Total value in array. Let say 4
– Value’s size. Let say 2 byte
– Data type. Let say unsigned integer
– End address (for this example;
• End add. = beginning add. + (total value – 1) * value’s size
= $2000 + (4 – 1) * 2 = $2006
Register Indirect
Addressing with post –
increment (cont..)
Program 1
0RG $1000
CLR D0 ;store result in D0
ADD.W $2000,D0 ;add value 0
ADD.W $2002,D0 ;add value 1
ADD.W $2004,D0 ;add value 2
ADD.W $2006,D0 ;add value 3
END
Register Indirect Addressing
Program 2 with post –increment (cont..)
0RG $1000
CLR D0 ;Store result in D0
MOVEA ;A0 holds beginning address
#$2000,A0 ADD ;add value 0
(A0),D0 ;point to value 1
ADD #2,A0 ;add value 1
;point to value 2
ADD (A0),D0 ;add value 2
ADD #2,A0 ;point to value 3
ADD (A0),D0 ;add value 3
ADD #2,A0
ADD
(A0),D0 END
Register Indirect
Addressing with post –
increment (cont..)
• Example of Register Indirect Addressing with post –increment
– Instruction: MOVE.W (A5)+, D0
A5 contains source
operand address
– This instruction will copy content in address register A5 to register
D0. Since this is a word operation so A5 (pointer) will be
incremented by 2
Register Indirect
Addressing with post –
increment (cont..)
Before
Register Contents Address Contents
A5 00001000 001000 45
D0 0000FFFF 001001 67
001002 89
001003 AB
After
Register Contents Address Contents
A5 00001002 001000 45
D0 00004567 001001 67
001002 89
001003 AB
A5 is incremented by 2
Register Indirect Addressing
with post –increment (cont..)
Program 3
0RG $1000
CLR D0 ;Store result in D0
MOVEA ;A0 holds address $2000
ADD.W (A0)+,D0
#$2000,A0 ;add value 0, increment A0 by 2
ADD.W (A0)+,D0 ;add value 1, increment A0 by 2
ADD.W (A0)+,D0 ;add value 2, increment A0 by 2
ADD.W (A0)+,D0 ;add value 3, increment A0 by 2
END
Register Indirect
Addressing with post –
increment (cont..)
Example: To move block of data in memory
Before After
00007000 11 22 11 22
33 44 33 44
55 66 55 66
00 00 00007008 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00007010 00 00 11 22
00 00 33 44
00 00 55 66
00 00 00007018 00 00
Register Indirect
Addressing with post –
increment (cont..)
Program 3
MOVEA.W #$7000,A0 ;beginning address of 1st block
MOVEA.W #$7010,A1 ;beginning address of 2nd block
MOVE.W (A0)+,(A1)+ ;move line 1 block 1 to block 2
MOVE.W (A0)+,(A1)+ ;move line 2 block 1 to block 2
MOVE.W (A0)+,(A1)+ ;move line 3 block 1 to block 2
Register Indirect
Addressing with pre–
decrement
• Example of Register Indirect Addressing with pre-decrement
– Instruction: MOVE.W D0, -(A6)
A6 contains
destination address
– This instruction will decrement value in address register A6, then
copy content in D0 to the address pointed by A6
Register Indirect
Addressing with post –
increment (cont..)
Before
Register Contents Address Contents
A6 00001002 001000 99
D0 00000143 001001 88
001002 89
001003 AB
After
Register Contents Address Contents
A6 00001000 001000 01
D0 00000143 001001 43
001002 89
001003 AB
Value of A6 is decremented by 2
Address Register Indirect
Addressing with Offset
• Example: Instruction MOVE.W 6(A0), D0
A0 contains source operand
address that incremented
with 610
– In this instruction, value in register A0 is added with decimal 6
then copy data from the present address to register A0.
Address Register Indirect
Addressing with Offset
(Cont..)
Before
Register Contents Address Contents
A0 00001020 001025 99
D0 00000143 001026 88
001027 89
001028 AB
After
Register Contents Address Contents
A0 00001020 001025 99
D0 00008889 001026 88
001027 89
001028 AB
Address Register Indirect
Addressing with Index
and Offset
• Example of Register Indirect Addressing with index and offset
– Instruction: MOVE.W $10(A0,D0.L), D1
Index Register D0 as index register,
that used 32-bit
Address register
Effective address = $10 + $100A + $2 = $101C
Address Register Indirect
Addressing with Index
and Offset
Before
Register Contents Address Contents
A0 000100A 00101B 98
D0 0000002 00101C 76
D1 12345678 00101D 54
00101E 32
After
Register Contents Address Contents
A0 000100A 00101B 98
D0 0000002 00101C 76
D1 12347654 00101D 54
00101E 32
Address Register Indirect
Addressing with Index
and Offset
• EXAMPLE
MOVEA #$2000, A0
MOVE.B $0(A0,D0.W), D1
A0 002000 30 31 D0 00 00 00 00
002002 32 33
002004 34 35 D1 00 12 70 02
002006 36 37
002008 38 39
00200A 41 42
00200B 43 44
00200C 45 46
00200D 47 48
Address Register Indirect
Addressing with Index
and Offset
• EXAMPLE
MOVEA #$2000, A0
MOVE.B $0(A0,D0.W), D1
A0 002000 30 31 D0 00 00 00 00
002002 32 33
002004 34 35 D1 00 12 70 30
002006 36 37
002008 38 39
00200A 41 42
00200B 43 44
00200C 45 46
00200D 47 48
Address Register Indirect
Addressing with Index
and Offset
• EXAMPLE
MOVEA #$2000, A0
MOVE.B $0(A0,D0.W), D1
A0 002000 30 31 D0 00 00 00 0A
002002 32 33
002004 34 35 D1 00 12 70 30
002006 36 37
002008 38 39
00200A 41 42
00200C 43 44
00200E 45 46
002010 47 48
Address Register Indirect
Addressing with Index
and Offset
• EXAMPLE
MOVEA #$2000, A0
MOVE.B $0(A0,D0.W), D1
002000 30 31 D0 00 00 00 0A
002002 32 33
002004 34 35 D1 00 12 70 41
002006 36 37
002008 38 39
A0 00200A 41 42
00200C 43 44
00200E 45 46
002010 47 48
PC Relative Addressing
• PC Relative with Offset
Instruction: MOVE.W $1200(PC),D5
- It is assumed the instruction is stored beginning at
location $122000. Therefore, during its execution PC
point to $00122002. This address is added by
$1200 to form the source operand address.
- The effective address is:
$00122002 + $00001200 = $00123202
- After the implementation, PC will be changed to
$00122004
PC Relative Addressing
(Cont..)
Before
Register Contents Address Contents
PC 00122000 123200 89
D5 12345678 123201 44
123202 AB
123203 CD
After
Register Contents Address Contents
PC 00122004 123200 89
D5 1234ABCD 123201 44
123202 AB
123203 CD
PC Relative Addressing
(Cont..)
• PC Relative with Index and Offset
Instruction: MOVE.L -20(PC,A2.L),D5
- It is assumed the instruction is stored beginning at
location $00010200. Therefore, during its execution
PC point to $000102002.
- The effective address is:
$00010202 + $00020030 + $FFFFFFEC = $0003021E
- Value for -20 decimal in hexadecimal is EC. So sign-
extended is $FFFFFFEC
PC Relative Addressing
(Cont..)
Before
Register Contents Address Contents
PC 00010200 3021E FE
A2 00020030 3021F CB
D5 44445555 30220 A9
30221 87
After
Register Contents Address Contents
PC 00010204 3021E FE
A2 00020030 3021F CB
D5 FECBA987 30220 A9
30221 87
Immediate Addressing
• In this addressing mode, the operand is in the instruction
– Example:
Instruction MOVE.L #$1FFFF, D0 ;transfer value $1FFFF into D0
# shown that there
is immediate data
Before: D0 = 12345678
After: D0 = 0001FFFF
Immediate Addressing
(cont..)
• Quick Immediate
– Only byte value may be specified in the
instruction. This byte value are sign
extended to bit before use.
– Example:
Instruction: MOVEQ #$2C, D3
Before: D3 = 12345678, after: D3 =
0000002C
Instruction: MOVEQ #$8A, D3
Before: D3 = 12345678, after: D3 =
FFFFFF8A
Implied Addressing
• Some instructions make implicit reference to the program
counter (PC), the system stack pointer (SP), the
supervisor stack pointer (SSP), the user stack pointer
(USP), or the status register (SR).
• A selected set of instructions may reference the status
register by means of the effective address field.
• Example:
– Instruction: RTS ;return from subroutine