Job descriptions

University Recruitment, India

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 Design Verification Intern

What? Why?
The verification team checks the analog and To ensure that the chips work as intended
digital logic design for bugs. and reduce reparation costs later down the
line.

Job Responsibilities:
 Use industry-standard design verification tools and processes such as Verilog/System Verilog, UVM
and C programming to verify System on a Chip (SoC) designs​
 Develop simulation test environment and components such as test benches, checkers and monitors​
 Perform automation of data collection and analysis using Python or other scripting​languages
 Work closely with the design team to ensure best-in-class quality designs that meet our customer
requirements​
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 Design for Test Intern (DFT)

What? Why?

DFT (Design For Test) Involves addition of Extra The DFT circuitry enables to check whether the ICs
Hardware to enable testing of Manufactured IC's are manufactured without physical defects which
with in a short period of time. causes degradation in the specification , before
releasing it to the customer as well as when it is
Job Responsibilities: being used in field, ensuring quality and reliability of
the IC's
 This position is required in the team which is responsible for implementing DFT / Test on complex
IP and SOC for ASIC designs.
 Candidate will be performing DFT insertion and/or verification tasks for the team.
 Strong fundamentals in Digital Circuit Design is required
 Scripting skills using PERL, Tcl and C-Shell Experience with Cadence/Mentor/Synopsys Tool set
(Genus, Modus & NCSim / Tessent/Spyglass) is plus
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 Input Output Electrostatic Discharge (ESD) Intern

What? Why?
Design GPIO for the ICs and assures ESD reliability. Interfaces and reliable ESD solution are key to every
SoC’s success.

Job Responsibilities:

 Development of general-purpose, analog IO (GPIO) and power circuits like Driver/Receiver, LDO
 Design and analysis of amplifiers, VCO, Charge Pump, Clock Divider, PFD, Bandgap, ADC/DAC,
and Voltage Regulators.
 Verifying ESD robustness for IP and ESD through industry standard tools and custom checks.
 Schematic capture, spice level simulation of transient, DC, AC, and noise conditions.
 Validate and characterize the design based on SPICE simulation, and any other useful methods.

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What? Why?
The validation engineer understand chip architecture Because manufacturing and/or design defects
and ensures functionality of chip can cause hardware not to function and be very
expensive to redesign the chip
Job Responsibilities:
 Develop code in C/C++/Python and execute them automatically by doing required modification in
existing farmwork
 Develop validation plan by discussing Architecture, Design and Verification team and execute the
same.
 Understand Good knowledge of C/C++ and/or Python. Knowledge of embedded Firmware/SW
development.
 Project work in embedded systems and hands-on experience in debugging is plus
 Familiarity with typical lab tools: Emulators, Oscilloscopes, Logic Analyzers is a plus
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 Able to work across disciplines and manage time across several demands
 Hardware Intern
What? Why?
This engineer involved in development of emulation To ensure that the chips work as designed and speed
system required for designing of chip . up the firmware development
.
Job Responsibilities:
 Designing and Developing validation test plans for Asic products and understanding of Analog circuitry.
 Programming experience in C, C++ and Python and any scripting language.
 Familiar with Linux OS and equipment like Oscilloscope, Power Analyzer, AWG etc..
 Bring up different hardware components on FPGA/Veloce setups/Asic
 Develop firmware and validation scripts to automate pre-silicon and Post Silicon validation on
FPGA/Veloce setup/Asic
 Debug hardware issues with designers, validate the fix or provide proper workaround
 Develop automation software and scripts for measurement data collection and analysis.

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What? Why?
The Serdes characterization team verifies and The performance and interoperability of
optimizes the performance of the Serdes IPs as per Serdes IPs are critical to meet key system
Industry Standards performance specifications
Job Responsibilities:
 Work to enable Multigigabit Systems for data-center and storage applications through robust Serial and Parallel interface
IPs.
 Understand characterization strategy and hardware development for Serial and Parallel Interfaces.
 Evaluate Transmitter, Receiver and related IP Block performance versus the specifications.
 Suggest performance improvement through statistical modelling and analyses of characterization data.
 Automate processes to improve efficiency to increase characterization coverage.
 Desirable : Knowledge of Computer Architecture, Serial and Parallel Interface standards, knowledge of I/O technologies,
Network Theory, Communication Theory, VLSI.
 Desirable : Hands-on experience on Oscilloscopes, Logic Analyzers, Signal Generator, Multimeter, Power Source.
 Good knowledge of MATLAB, C/C++, Python, MS Excel and VBA. Knowledge of software development principles.
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Software Engineering Intern

What? Why?
The data infrastructure that our customers Software enables the hardware to do what
build has never been more critical to our global it was intended/designed for and cannot be
economy. altered at discretion.

Job Responsibilities:
 Proficient in programming languages: C, C++, Python, and scripting languages: Bash, Perl
 Develop, integrate, and test network and cryptographic protocols using C, C++, and Python
 Conduct case studies and develop software prototypes for future products
 Strong understanding of Linux OS concepts, data structures, algorithms, computer architecture,
and computer networks. Familiarity with ARM/RISCV architecture is desirable
 Collaborate with engineering teams to enhance existing Marvell and open-source software
products
 Conduct research and experiments on new AI algorithms, models, and architectures.

Firmware Engineering Intern

What? Why?
Firmware is the software that is hard Firmware enables the hardware to do what
coded and runs the hardware that we it was intended/designed for and cannot be
manufacture.​ altered at discretion.

Job Responsibilities:
 Design, implementation, verification, and customer support.
 Programming knowledge in C/C++, Python/Java/C etc.. Knowledge of data structures and
algorithms.
 Knowledge of embedded systems and Linux OS concepts, Device Driver, PCIe concepts
 Skill in Automation Strategy and Methodology.
 Good skills in tools like iPerf, Wireshark, IXIA, Spirent.
 As a member of this team, you may interact with different teams such as Soc.
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