COA (CoSc Chapter

2041) VI
BASIC COMPUTER ORGANIZATION & DESIGN
Introduction
Basic Computer Organization with CPU, Memory and I/O

As we studied, the above diagram indicates the 3 major units of a computer system.
Every different processor type has its own design (different registers, buses, micro operations,
machine instructions, etc). Modern processors are little bit complex device in design. It
contains many registers, multiple arithmetic units - for both integer and floating point
calculations. They have the ability to pipeline several consecutive instructions to speed
execution, and more…
However, to understand how processors work, we will start with a simplified processor model.
M. Morris Mano introduces a simple processor model he calls the “Basic Computer”.
The
“Basic Computer” designed by M. Morris Mano is specifically used as an instructional
aid to introduce processor organization and thereby to study basic computer organization
and its design. It is not meant to compete with CPUs currently used. Rather, it is designed to
illustrate the various aspects of CPU design. This module begins with computer instructions and
a review of the basic organization of a computer. In order to cover the basic concepts behind
designing a computer, the “Basic Computer” (an imaginary system) by Morris Mano,
will be used throughout this chapter.
Computer Instructions
Computer instructions are the basic components of a computer program. They are also known
as macrooperations, since each one is comprised of a sequence of micro_operations. Each
instruction initiates a sequence of micro_operations that fetch operands from registers or
memory, possibly perform arithmetic, logic, or shift operations, and store results in registers or
memory.
Instructions are encoded as binary instruction codes. Each instruction code contains an operation
code, or opcode, which designates the overall purpose of the instruction (e.g. add,
subtract, move, input, etc.). The number of bits allocated for the opcode depicts how
many different instructions the architecture supports. In addition to the opcode, many
instructions also contain one or more operands, which indicate where the data required for
the operation is located in (registers or memory). For example, an ADD instruction
requires two operands; while a NOT instruction requires only one.

The control unit of the CPU is responsible for decoding the opcode and operand bits in
the instruction register, and then generating the control signals necessary to drive all other
hardware in the CPU to perform the sequence of micro_operations that comprise the instruction.

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COA (CoSc Chapter
2041) VI

Instruction Codes
The Internal organization of a digital system is defined by the sequence of micro operations
it performs on data stored in its registers. The user can control the process by means of a
program. A program is a set of instructions that specify the operations, operands, and the
processing sequence. Each computer has its own unique instruction set. An Instruction code is
a group of bits that instructs the computer to perform a specific operation (sequence of
micro_operations). It is divided into parts (basic part is the operation part). The operation code
of an instruction is a group of bits that defines certain operations such as add, subtract,
shift, and complement. An instruction code must therefore specify not only the operation,
but also the location of the operands (in registers or in the memory), and where the result will
be stored (registers/memory). An operation must be performed on some data stored in
processor registers or in memory. Processor registers and memory words can be specified
in an instruction by their names and address respectively. Each computer has its own
particular instruction code format. Instruction code formats are conceived by computer
designers who specify the architecture of the computer. An instruction code is usually divided
into operation code, operand address and will belong one of the addressing mode. In the Basic
Computer, bit 15 of the instruction specifies the addressing mode (0: direct addressing, 1:
indirect addressing) as shown below.

Instruction Execution model

• Instruction codes and data are stored in memory

• The CPU reads each instruction from memory and places it in a register.
• The control unit of the CPU interprets the binary code of the instruction and proceeds to
execute it by issuing a sequence of micro-operations.
• The simplest way to organize a computer is to have one processor register (accumulator
AC) and an instruction code format with two parts (opcode, address) as shown in
the below diagram.

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Amanuel B. 2 G2-CS-
COA (CoSc Chapter
2041) VI

Computer Registers
A processor has many registers to hold instructions, addresses, data, etc... The processor in the
Basic Computer has a register, the Program Counter (PC) that holds the memory address of the
next instruction to get. Since the memory in the Basic Computer only has 4096 locations, the PC
only needs 12 bits. The Address Register (AR) keeps track of what locations in memory
it is addressing. The AR is a 12 bit register in the Basic Computer. When an operand is
found, it is placed in the Data Register (DR). The processor then uses this value as data for
its operation. The Basic Computer has a single Accumulator (AC) register, which is used as a
general purpose register. Often a processor will need a scratch register to store
intermediate results or other temporary data; in the Basic Computer this is the Temporary
Register (TR). The Basic Computer uses a very simple model of input/output (I/O) operations.
The Input Register (INPR) holds an 8 bit character received from an input device and the
Output Register (OUTR) holds an 8 bit character to be sent to an output device.

Registers in the Basic Computer

Computer Instructions
Again, we will familiarize with the instructions which were used in the Basic Computer model.
Those were Memory reference, Register reference and I/O instructions as follows;

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Amanuel B. 3 G2-CS-
COA (CoSc Chapter
2041) VI
The following are list of instructions in the Basic Computer model.

Instruction Set Completeness

A computer should have a set of instructions so that the user can construct machine
language programs to evaluate any function that is known to be computable.
Functional Instructions
- Arithmetic, logic, and shift instructions
- ADD, CMA, INC, CIR, CIL, AND, CLA
Transfer Instructions
- Data transfers between the main memory and the processor registers
- LDA, STA
Control Instructions
- Program sequencing and control
- BUN, BSA, ISZ
Input/Output Instructions
- Input and output
- INP, OUT

Memory Reference Instructions

As their name implies, memory reference instructions are those that reference memory.
Some read data from memory, others write data to memory, and one instruction does both.
For these instructions, the most significant bit is the indirect bit. If this bit is 1, the
instruction must use indirect memory addressing. (That is, the address given is not the address of
the operand. It is the address of a memory location which contains the address of the operand).
The next three bits are operation field (OPR) as shown below.

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Amanuel B. 4 G2-CS-
COA (CoSc Chapter
2041) VI
These three bits may take on any value except for 111; that is reserved for other instructions. The
OPR field tells the CPU which instruction is to be performed. Finally, the 12 low order
bits contain the memory address to be used by this instruction.

The AND instruction performs a bit-wise logical AND.

The ADD instruction performs a regular addition.
The LDA and STA are regular load and store instructions.
The BUN (branch unconditional) is a jump instruction.
The BSA is used to call subroutines in the Basic
Computer.
The ISZ instruction is used for program loops. Note the semicolon in this instruction. It means
that the first part is performed, then the second part is performed in the following clock cycle.

Register Reference Instructions

Register reference instructions are those which access data and manipulate the contents of
registers. They do not access memory. These instructions are executed in one clock cycle. Note
that the 12 low-order bits serve a different function depending on the instruction format used.

I/O instructions
This class of instructions accesses I/O devices. The instructions in this class also enable
and disable interrupts. Since this computer only allows for a single input device and a single
output device, no address information is needed.

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COA (CoSc Chapter
2041) VI

Like the register reference instructions, the input/output instructions are also performed in
a single clock cycle. Input Flag (FGI) is set when INPR is ready and clear when INPR is
empty. Similarly, the Output Flag (FGO) is set when operation is completed and clear
when output device is in the process of its operation. Note that there are no instructions to set
FGI or FGO to
1.These flags are set by external hardware when input data is ready or output data is requested.
When the CPU performs the proper input or output instruction (INP or OUT), it resets the flag to
allow for future I/O data transfers.

CONTROL UNIT (CU)

The control unit of the CPU issues signals to coordinate functions of the ALU, the registers and
external hardware. By issuing these signals in the proper order, they cause a sequence of
operations to occur. By performing this sequence, an instruction is fetched, decoded and
executed.
Control unit (CU) of a processor translates from machine instructions to the control signals for
the microoperations that implement them. Control units are implemented in one of two ways
• Hardwired Control
– CU is made up of sequential and combinational circuits to generate the control signals
• Microprogrammed Control
– A control memory on the processor contains microprograms that activate
the necessary control signals
We will consider a hardwired implementation of the control unit for the Basic Computer
The Control Unit for the basic computer (Hardwired control unit)

Timing & Control

The timing for all registers in the Basic Computer is controlled by a master clock generator. The
clock pulses are applied to all flip-flops and registers in the system, including the flip-flops and
registers in the control unit. The clock pulses do not change the state of a register
unless the register is enabled by a control signal (i.e., Load). The control signals are generated in
the control unit and provide control inputs for the multiplexers in the common bus,
control inputs in processor registers, and micro_operations for the accumulator.

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Amanuel B. 6 G2-CS-
COA (CoSc Chapter
2041) VI
As mentioned earlier, there are two major types of control organization:
• Hardwired control
• Micro programmed control

Timing signals are generated by a 4-bit sequence counter and 4x16 decoder. The
Sequence Counter (SC) can be incremented or cleared. The time periods (or states) are
mentioned as T0, T1, T2, T3, T4, T0, T1,…
Consider the following timing diagram. It indicates that, SC is cleared to 0 at time period T4, if
decoder output D3 is active. ie, D3T4: SC  0

T 0 T 1 T 2 T 3 T 4 T0
C loc k

T0 T1

T2

T3

T4

D3

C L R
S C

Design of Accumulator Logic

Circuits associated with AC

Statements that change the content of AC

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COA (CoSc Chapter
2041) VI

Design of Basic Computer

The basic computer consists of the following hardware components

1. A memory unit with 4096 words of 16bits
2. Nine registers : AR, PC, DR, AC, IR, TR, OUTR, INPR, and SC
3. Flip-Flops(Status)-Seven F/Fs : I, S, E, R, IEN, FGI, and FGO
4. Two decoder in control unit : 3 x 8 operation decoder, 4 x 16 timing decoder
5. A 16-bit common bus
6. Adder and Logic circuit connected to the AC input
7. Control Logic Gates

Control Logic Gates

8. Signals to control the inputs of the nine registers
9. Signals to control the read and write inputs of memory.
10. Signals to set, clear, or complement the F/Fs
11. Signals for S2 S1 S0 to select a register for the bus
12. Signals to control the AC, adder and logic circuit

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Amanuel B. 8 G2-CS-