A D D R E S S IN G M O D
ES & IN S T
R U C T IO N S SET O
F
8 0 51 M IC R O C O N T
R O LLER
A d d r e s s in g m o
des
Definition:-
The different ways in
which a source operand in an
instruction are known as the
addressing modes.
The 8051 provides a total
of 5 distinct addressing modes.
T y p e s o f A d d r e s s in g m o
des
Addressing
modes
Immediate Register Direct Register Indexed
Addressing Addressing Addressing indirect Addressing
mode mode mode Addressing mode
mode
Im m e d ia te a
d d r e s s in g m
o d e
In this addressing mode
the source operand is constant. In
immediate addressing mode, when
the instruction is assembled, the
operand comes immediately
after the op-code.
C
o n t in u e …
■ The immediate data must
be preceded by ‘ # ’ sign.
■ Thisaddressing mode can be
used to load information into
any of the register, including
the DPTR.
C
o n t in u e …
■ Ex :
-
MOV // load 25H in
A,#25H A to
MOV // load
R4,#62 the valu
decimal e
62
MOVinto
DPTR,#4532H //
R4.
R e g is te r a d d re s s in g m
ode
Register addressing
mode involves the use of
registers to hold the data to be
manipulated.
C
o n t in u e …
▶ Ex:-
MOV A,R0 // copy the contents of
R0 in to A.
MOV R2,A // copy the contents of
A in to
R2.
ADD A,R5 // add the content
of R5 to
content
D ire c t a d d r e s s in g m
ode
In direct addressing mode,
the data is in a RAM memory
location whose address is known,
and this address is given as a part
of the instruction. Contrast this with
the immediate addressing
mode in which the operand
itself is provided with the
instruction.
D ire c t a d d r e s s in g m
od e
■ In this mode the operand is
specified by an 8 - bit address field
In the instruction.
■ One can access all the 128 bytes
of internal RAM locations and
each SFR.
■ If the M S B bit = 0 then the location
is within on chip internal RAM. If
M S B bit =
1
2
D ire c t a d d r e s s in g m
o d e location 00h to 7Fh to
■ The
address the internal RAM .
■ SFR addresses from 80h to
FF h
■ e.g MOV
. A,40h
MOV
R0,14h
1
3
C
o n t in u e …
▶ Ex:-
MOV R0,40H // save content of
RAM
MOV 56H,A // location 40h into
save content of
R0.
A in RAM location
56H.
R e g is te r in d ire c t a d d re
s s in g m o d e
■ In the register indirect addressing
mode, a register is used as
a pointer to the
data.
■ If the data is inside the CPU,
only register R0 and R1 are used
for this purpose.
■ In other words,R2-R7 cannot be
used to hold the address of an
operand located in RAM when
using this addressing mode.
C
o n t in u e …
▶ When R0 and R1 are used as
pointers , that is, when they hold
the address of RAM locations ,
they must be preceded by the
“ @ ” sign.
Note : only register R0 and R1 can
be used for indirect addressing
mode .
MOV A,@R2 invalid instruction.
C
o n t in u e …
Ex :-
MOV A,@R0 // move contents of
RAM
location whose
address is held by
R0 into A.
MOV @R1,B // move contents of
B to
RAM location
E x te rn a l a d d re s s in g m
ode
o r In d e xe d add
re Code
(a) s s in gaccess
m o(ROM
d e access)
■ Using these instructions only
program memory can be
accessed.
■ This addressing mode is
preferred for reading look up
tables in the program memory.
■ Either DPTR or PC can be used
2
1
E x te rn a l a d d re s s in g m
ode
o r In d e xe d add
reE.g.
■ s s in g mode
MOVC
A,@A+DPTR
MOVC A,@A+PC
2
3
E x te rn a l a d d re s s in g m
ode
o r In d e xe d add
(b)sData
re s in gaccess
m o(RAM
d e access)
■ Using this addressing mode the
programmer can access the
external Data memory
■ E.g. MOVX
A,@DPTR MOVX
@R0,A Prof. Nitin 2
Ahire 4
C
o n t in u e …
▶ In this instruction the content of A
are added to the 16-bit register
DPTR to form the 16-bit address of
the needed data.
In s tru c tio n set o f 8
0 51
8051 simple instruction
has different set in There are:
■ groups.
Arithmetic instructions
■ Logical instructions
■ Data transfer instructions
■ Branching and looping
instructions
■ Bit control instructions
A rith m e t ic
in s tru c tio n s
These instructions are
used to perform various
mathematical operations like
addition, subtraction,
multiplication, and division etc.
C
o n t in u e …
■ ADD A, // Add the content of
R1 to
■ register1
ADDC A,#2 // Add 2 to Accumulator
accumulator with
carry
■ SUBB A,R2 // Subtract
content of register2
from
Accumulator
C
o n t in u e …
■ INC A // Increment
■ DEC A accumulator
■ M UL // Decrement
■ AB
DIV AB accumulator
// Divide A
by B // Multiply A and B
L o g ic a l in
s tru c tio n s
■ Thethe instructions
are logical which areused
instructions
for
performing some operations like
AND, OR, NOT, X- OR and etc., on
the operands.
C
o n t in u e …
■ ANL A, Rn // AND register to
accumulator
■ ORL A, Rn // OR register to
■ accumulator
CLR // Clear Accumulator
■ XRL
A A, Rn////Complement
Exclusive OR Reg to
■ Acc
CPL Accumulator
A
D a ta T r a n s f e r
In s tru c tio n s
■ These instruction are used to
transfer the data from source
operand to destination operand. All
the store, move, load, exchange
input and output instructions
belong to this to this group.
C
o n t in u e …
■ MOV A, // Move Reg to
■ Rn
MOVX A,@DPTR Acc
// Move external
RAM
■ PUSH // to Accumulator
PUSH direct byte
direct on to stack
■ POP // POP direct byte
direct from stack
B ra n c h a n d L o o p
in g In s tru c tio
ns
■ These instructions are bot
used for branching as we l h
■ as looping.
These instructions include
conditional & unconditional
jump or loop instructions.
C o n d itio n a l J u m p
In s tru c tio n s
■ JC // Jump if carry equal to
one
■ JNC // Jump if carry equal to
zero
■ JB // Jump if bit equal to
one
■ JNB // Jump if bit equal to
zero
■ J BC // Jump if bit equal to
one and clear bit
C
o n t in u e …
■ JZ // Jump if A=Zero
■ JNZ // Jump if A not equal to
■ DJN zero
Z // Decrement and Jump if
not equal to zero.
U n c o n d itio n a l
Jum p
In s tru c tio n s
■ In 8051 there two unconditional
jumps. They are:
■ SJMP // Short
■ LJMP jump
// Long
jump
