+

William Stallings
Computer Organization
and Architecture
9th Edition
+
Chapter 8
Operating System Support
Computer Hardware and Software
Structure
+
Operating System (OS) Services
 The most important system program

 Masks the details of the hardware from the programmer and provides
the programmer with a convenient interface for using the system

 The OS typically provides services in the following areas:

 Program creation
 Program execution
 Access to I/O devices
 Controlled access to files
 System access
 Error detection and response
 Accounting
+
Interfaces
Key interfaces in a typical computer system:

Instruction set Application Application

architecture binary interface programming
(ISA) (ABI) interface (API)

Gives a program access to the

hardware resources and services
Defines the nstructions that a
Defines a standard for binary available in a system through
machine language icomputer
portability across programs the user ISA supplemented with
can follow
high-level language (HLL)
library calls

Defines the system call

interface to the operating Using an API enables
Boundary between hardware system and the hardware application software to be
and software resources and services available ported easily to other systems
in a system through the user that support the same API
ISA
+ Operating System
as
Resource Manager
A computer is a set of resources for the movement, storage, and
processing of data and for the control of these functions
 The OS is responsible for managing these resources

The OS as a control mechanism is unusual in two respects:

 The OS functions in the same way as ordinary computer
software – it is a program executed by the processor
 The OS frequently relinquishes control and must depend on
the processor to allow it to regain control
The OS as
Resource
Manager
+
Types of Operating Systems

 Interactive system
 The user/programmer interacts directly with the computer to request the
execution of a job or to perform a transaction
 User may, depending on the nature of the application, communicate with
the computer during the execution of the job

 Batch system
 Opposite of interactive
 The user’s program is batched together with programs from other users and
submitted by a computer operator
 After the program is completed results are printed out for the user
+
Early Systems
 From the late 1940s to the mid-1950s the programmer
interacted directly with the computer hardware – there was no OS
 Processors were run from a console consisting of display lights, toggle switches,
some form of input device and a printer

 Problems:
 Scheduling
 Sign-up sheets were used to reserve processor time
 This could result in wasted computer idle time if the user finished early
 If problems occurred the user could be forced to stop before resolving the
problem
 Setup time
 A single program could involve
 Loading the compiler plus the source program into memory
 Saving the compiled program
 Loading and linking together the object program and common functions
+

Memory
Layout
for a
Resident Monitor
+
From the View of the Processor . . .
 Processor executes instructions from the portion of main memory containing the monitor
 These instructions cause the next job to be read in another portion of main memory
 The processor executes the instruction in the user’s program until it encounters an ending or
error condition
 Either event causes the processor to fetch its next instruction from the monitor program
 The monitor handles setup and scheduling
 A batch of jobs is queued up and executed as rapidly as possible with no idle time
 Job control language (JCL)
 Special type of programming language used to provide instructions to the monitor
 Example:
**Each FORTRAN instruction and each item of
 $JOB data is on a separate punched card or a separate record on tape. In
addition to FORTRAN and data lines, the job includes job control
 $FTN instructions, which are
denoted by the beginning “$”.
 ... Some Fortran instructions
 $LOAD
 $RUN
 ... Some data
 $END
 Monitor, or batch OS, is simply a computer program
 It relies on the ability of the processor to fetch instructions from various portions of main
memory in order to seize and relinquish control alternately
+
Desirable Hardware Features
 Memory protection  Privileged instructions
 User program must not alter the
 Can only be executed by the
memory area containing the monitor monitor
 The processor hardware should detect
 If the processor encounters such an
an error and transfer control to the instruction while executing a user
monitor program an error interrupt occurs
 The monitor aborts the job, prints an  I/O instructions are privileged so the
error message, and loads the next job monitor retains control of all I/O
devices

 Timer  Interrupts
 Used to prevent a job from  Gives the OS more flexibility in
monopolizing the system relinquishing control to and
regaining control from user
 If the timer expires an interrupt
programs
occurs and control returns to
monitor
System Utilization Example

+
+

Multiprogramming
Example
+
Time Sharing Systems

 Used when the user interacts directly with the computer

 Processor’s time is shared among multiple users

 Multiple users simultaneously access the system through terminals,

with the OS interleaving the execution of each user program in a
short burst or quantum of computation

 Example:
 If there are n users actively requesting service at one time, each user will
only see on the average 1/n of the effective computer speed
 Batch
Multiprogramming
versus
Time Sharing

+
+
Scheduling

 The key to multiprogramming

 Four types are typically involved:

Table 8.4 Types of Scheduling

Long Term Scheduling

In some systems a newly

created process begins in a
Once submitted, a job becomes
Determines which programs swapped-out condition, in
a process for the short term
are submitted for processing which case it is added to a
scheduler
queue for the medium-term
scheduler

Time-sharing system Batch system

• A process request is generated when a user
• Newly submitted jobs are routed to disk and held
attempts to connect to the system
in a batch queue
• OS will accept all authorized comers until the
• The long-term scheduler creates processes from the
system is saturated
queue when it can
• At that point a connection request is met with a
message indicating that the system is full and to
try again later
+
Medium-Term Scheduling
and Short-Term Scheduling

Medium-Term Short-Term
Part of the swapping function  Also known as the dispatcher
Swapping-in decision is based  Executes frequently and makes
on the need to manage the degree
the fine-grained decision of
of multiprogramming
which job to execute next
Swapping-in decision will
consider the memory
requirements of the swapped-out
processes
Five State Process Model
+

Process Control Block

Scheduling Example
Key Elements of O/S
Process Scheduling
+

Memory Management
Swapping
+

Memory Management
Partitioning
Effect of Dynamic Partitioning

Logical address
- expressed as a location relative to the
beginning of the program

Physical address
- an actual location in main memory

Base address
- current starting location of the process
+

Memory Management
Paging
+

Logical and Physical

Addresses

Paging
+
Virtual Memory
Demand Paging
 Each page of a process is brought in only when it is needed

 Principle of locality
 When working with a large process execution may be confined to a small section of a program
(subroutine)
 It is better use of memory to load in just a few pages
 If the program references data or branches to an instruction on a page not in main memory, a page
fault is triggered which tells the OS to bring in the desired page

 Advantages:
 More processes can be maintained in memory
 Time is saved because unused pages are not swapped in and out of memory

 Disadvantages:
 When one page is brought in, another page must be thrown out (page replacement)
 If a page is thrown out just before it is about to be used the OS will have to go get the page again
 Thrashing (thảm họa)
 When the processor spends most of its time swapping pages rather than executing instructions
+

Inverted Page
Table Structure
Inverted Page
Table Structure
+

Operation of Paging
and Translation
Lookaside Buffer
(TLB)
TLB and
Cache
Operation
+
Segmentation

 Usually visible to the programmer

 Advantages:
 Provided as a convenience for  Simplifies the handling of
organizing programs and data and
growing data structures
as a means for associating
privilege and protection attributes  Allows programs to be altered
with instructions and data and recompiled independently
without requiring that an entire
 Allows the programmer to view set of programs be re-linked and
memory as consisting of multiple re-loaded
address spaces or segments  Lends itself to sharing among
processes
 Lends itself to protection
 Hardware is essentially the same as that used in the Intel 80386
and 80486 processors
 Includes hardware for both segmentation and paging
 Unsegmented unpaged memory
Pentium II
 Virtual address is the same as the physical address
 Useful in low-complexity, high performance controller applications
 Unsegmented paged memory
 Memory is viewed as a paged linear address space
 Protection and management of memory is done via paging
Memory
 Favored by some operating systems
 Segmented unpaged memory Management
 Memory is viewed as a collection of logical address spaces
 Affords protection down to the level of a single byte
 Guarantees that the translation table needed is on-chip when the
+ segment is in memory
 Results in predictable access times
 Segmented paged memory
 Segmentation is used to define logical memory partitions subject
to access control, and paging is used to manage the allocation of
memory within the partitions
 Operating systems such as UNIX System V favor this view
+ Segmentation
Pentium II
 Each virtual address consists of a 16-bit segment reference and
a 32-bit offset
 Two bits of segment reference deal with the protection mechanism
 14 bits specify segment

 Unsegmented virtual memory is 232 = 4Gbytes

 Segmented virtual memory is 246=64 terabytes (Tbytes)

 Physical address space employs a 32-bit address for a maximum of 4

Gbytes

 Virtual address space is divided into two parts

 One-half is global, shared by all processors
 The remainder is local and is distinct for each process
+
Segment Protection
Pentium II
 Associated with each segment are two forms of protection:
 Privilege level
 Access attribute

 There are four privilege levels

 Most protected (level 0)
 Least protected (level 3)

 Privilege level associated with a data segment is its “classification”

 Privilege level associated with a program segment is its “clearance”

 An executing program may only access data segments for which its clearance
level is lower than or equal to the privilege level of the data segment

 The privilege mechanism also limits the use of certain instructions

+

Pentium Memory
Management
Formats
Table 8.5 Pentium II Memory Management
Parameters (page 1 of 2)
Table 8.5 Pentium II Memory Management
Parameters (page 2 of 2)
+ Paging
Pentium II
 Segmentation may be disabled
 In which case linear address space is used

 Two level page table lookup

 First, page directory
 1024 entries max
 Splits 4 Gbyte linear memory into 1024 page groups of 4 Mbyte
 Each page table has 1024 entries corresponding to 4 Kbyte pages
 Can use one page directory for all processes, one per process or mixture
 Page directory for current process always in memory
 Use TLB holding 32 page table entries
 Two page sizes available, 4k or 4M
+ Pentium II Address Translation
Mechanism
ARM Memory System Overview
+
Virtual Memory Address Translation

 The ARM supports memory access  Sections and supersections are

based on either sections or pages supported to allow mapping of a large
region of memory while using only a
 Supersections (optional)
single entry in the TLB
 Consist of 16-MB blocks of main
memory
 The translation table held in main
 Sections memory has two levels:
 Consist of 1-MB blocks of main  First-level table
memory  Holds section and supersection
translations, and pointers to
 Large pages
second-level table
 Consist of 64-kB blocks of main
memory  Second-level tables
 Hold both large and small page
 Small pages translations
 Consist of 4-kB blocks of main
memory
ARM
Virtual
Memory
Address
Translation for
Small Pages
ARMv6
Memory
Management
Formats
ARM
Virtual
Memory
Address
Translation
for Small
Pages

Table 8.6 ARM Memory-Management Parameters

+ Access Control
 The AP access control bits in each table entry control access to a region of memory by a given
process

 A region of memory can be designated as:

 No access
 Read only
 Read-write

 The region can be privileged access only, reserved for use by the OS and not by applications

 ARM employs the concept of a domain:

 collection of sections and/or pages that have particular access permissions
 The ARM architecture supports 16 domains
 Allows multiple processes to use the same translation tables while maintaining some protection from each other

 Two kinds of domain access are supported:

 Clients
 Users of domains that must observe the access permissions of the individual sections and/or pages that
make up that domain
 Managers
 Control the behavior of the domain and bypass the access permissions for table entries in that domain
+ Summary Operating System
Support
Chapter 8
 Memory management
 Operating system objectives and  Swapping
functions  Partitioning
 Types of operating systems  Paging
 Scheduling  Virtual memory
 Long-term scheduling  Translation lookaside buffer
 Medium-term scheduling  Segmentation
 Short-term scheduling  ARM memory management
 Pentium memory management  Memory system organization
 Address spaces  Virtual memory address
 Segmentation translation
 Paging  Memory-management formats
 Access control