Unit-1:
8086 Architecture – Main features, Pin diagram/ description
8086 microprocessor family
8086 internal architecture, Bus interfacing unit, execution
unit, interrupts and interrupt responses, 8086 system timing,
minimum mode and maximum mode configuration
1
INTRODUCTION TO MICROPROCESSORS
Microprocessor:-
• CPU on a single chip is called as microprocessor.
• A microprocessor is multipurpose programmable, clock driven
electronic device which accepts binary data as inputs , processes it and
gives the results as outputs.
2
Microprocessor Vs Microcontroller
3
Microprocessor Vs Microcontroller
4
Microprocessor & Microcontroller - Applications
5
Microprocessor & Microcontroller - Applications
6
Microprocessor & Microcontroller - Applications
7
Microprocessor & Microcontroller - Applications
8
Microprocessor Generations Fifth Generation Pentium
Fourth Generation
During 1980s
Low power version of HMOS technology
(HCMOS)
Third Generation 32 bit processors
During 1978 Physical memory space 224 bytes = 16 Mb
HMOS technology Faster speed, Higher Virtual memory space 240 bytes = 1 Tb
packing density Floating point hardware
16 bit processors 40/ 48/ 64 pins Supports increased number of addressing
Easier to program modes
Dynamically relatable programs
Processor has multiply/ divide arithmetic Intel 80386
hardware
More powerful interrupt handling
capabilities Second Generation
Flexible I/O port addressing During 1973
NMOS technology Faster speed, Higher
Intel 8086 (16 bit processor) density, Compatible with TTL
4 / 8/ 16 bit processors 40 pins
First Generation Ability to address large memory spaces
Between 1971 – 1973 and I/O ports
PMOS technology, non compatible with TTL Greater number of levels of subroutine
4 bit processors 16 pins nesting
8 and 16 bit processors 40 pins Better interrupt handling capabilities
Due to limitations of pins, signals are 9
multiplexed Intel 8085 (8 bit processor)
Microprocessor Functional blocks
Various conditions of the
Computational Unit;
results are stored as
performs arithmetic and Internal storage of data
status bits called flags in
logic operations
flag register
Register array or Data Bus
internal memory
ALU
Generates the
address of the
Instruction
Flag instructions to be
decoding unit
Register fetched from the
memory and send
through address
bus to the
Timing and memory
control unit PC/ IP
Control Bus Address Bus
Generates control signals for Decodes instructions; sends
internal and external operations information to the timing and
of the microprocessor control unit 10