Introduction to

CMOS VLSI
Design

Introduction
ASHWANI MISHRA

NARAINA COLLEGE OF ENGINEERING & TECHNOLOGY

KANPUR
 Introduction
 Integrated circuits: many transistors on one chip.
 Very Large Scale Integration (VLSI): very many
 Complementary Metal Oxide Semiconductor
– Fast, cheap, low power transistors
 Today: How to build your own simple CMOS chip
– CMOS transistors
– Building logic gates from transistors
– Transistor layout and fabrication
 Rest of the course: How to build a good CMOS chip

0: Introduction CMOS VLSI Design Slide 2

 Silicon Lattice
 Transistors are built on a silicon substrate
 Silicon is a Group IV material
 Forms crystal lattice with bonds to four neighbors

Si Si Si

Si Si Si

Si Si Si

0: Introduction CMOS VLSI Design Slide 3

 Dopants
 Silicon is a semiconductor
 Pure silicon has no free carriers and conducts poorly
 Adding dopants increases the conductivity
 Group V: extra electron (n-type)
 Group III: missing electron, called hole (p-type)

Si Si Si Si Si Si
- +

+ -
Si As Si Si B Si

Si Si Si Si Si Si

0: Introduction CMOS VLSI Design Slide 4

 p-n Junctions
 A junction between p-type and n-type semiconductor
forms a diode.
 Current flows only in one direction

p-type n-type

anode cathode

0: Introduction CMOS VLSI Design Slide 5

 nMOS Transistor
 Four terminals: gate, source, drain, body
 Gate – oxide – body stack looks like a capacitor
– Gate and body are conductors
– SiO2 (oxide) is a very good insulator
– Called metal – oxide – semiconductor (MOS)
capacitor Source Gate Drain
Polysilicon
– Even though gate is SiO2
no longer made of metal
n+ n+

p bulk Si

0: Introduction CMOS VLSI Design Slide 6

 nMOS Operation
 Body is commonly tied to ground (0 V)
 When the gate is at a low voltage:
– P-type body is at low voltage
– Source-body and drain-body diodes are OFF
– No current flows, transistor is OFF
Source Gate Drain
Polysilicon
SiO2

0
n+ n+
S D
p bulk Si

0: Introduction CMOS VLSI Design Slide 7

 pMOS Transistor
 Similar, but doping and voltages reversed
– Body tied to high voltage (VDD)
– Gate low: transistor ON
– Gate high: transistor OFF
– Bubble indicates inverted behavior
Source Gate Drain
Polysilicon
SiO2

p+ p+

n bulk Si

0: Introduction CMOS VLSI Design Slide 8

 Transistors as Switches
 We can view MOS transistors as electrically
controlled switches
 Voltage at gate controls path from source to drain
g=0 g=1

d d d
nMOS g OFF
ON
s s s

d d d

pMOS g OFF
ON
s s s

0: Introduction CMOS VLSI Design Slide 9

 CMOS Inverter

A Y VDD
0
1
A Y

A Y
GND
0: Introduction CMOS VLSI Design Slide 10
 CMOS Inverter

A Y VDD
0
1 0 OFF
A=1 Y=0

ON
A Y
GND
0: Introduction CMOS VLSI Design Slide 11
 CMOS Inverter

A Y VDD
0 1
1 0 ON
A=0 Y=1

OFF
A Y
GND
0: Introduction CMOS VLSI Design Slide 12
 CMOS NAND Gate
A B Y
0 0
0 1 Y
1 0 A
1 1
B

0: Introduction CMOS VLSI Design Slide 13

 CMOS NAND Gate
A B Y
0 0 1 ON ON
0 1 Y=1
A=0
1 0 OFF
1 1
B=0
OFF

0: Introduction CMOS VLSI Design Slide 14

 CMOS NAND Gate
A B Y
0 0 1 OFF ON
0 1 1 Y=1
A=0
1 0 OFF
1 1
B=1
ON

0: Introduction CMOS VLSI Design Slide 15

 CMOS NAND Gate
A B Y
0 0 1 ON OFF
0 1 1 Y=1
A=1
1 0 1 ON
1 1
B=0
OFF

0: Introduction CMOS VLSI Design Slide 16

 CMOS NAND Gate
A B Y
0 0 1 OFF OFF
0 1 1 Y=0
A=1
1 0 1 ON
1 1 0
B=1
ON

0: Introduction CMOS VLSI Design Slide 17

 CMOS NOR Gate
A B Y
0 0 1 A
0 1 0
1 0 0 B
1 1 0 Y

0: Introduction CMOS VLSI Design Slide 18

 CMOS Fabrication
 CMOS transistors are fabricated on silicon wafer
 Lithography process similar to printing press
 On each step, different materials are deposited or
etched
 Easiest to understand by viewing both top and
cross-section of wafer in a simplified manufacturing
process

0: Introduction CMOS VLSI Design Slide 19

 Inverter Cross-section
 Typically use p-type substrate for nMOS transistors
 Requires n-well for body of pMOS transistors
A
GND VDD
Y SiO2

n+ diffusion

p+ diffusion
n+ n+ p+ p+
polysilicon
n well
p substrate
metal1

nMOS transistor pMOS transistor

0: Introduction CMOS VLSI Design Slide 20

 Inverter Mask Set
 Transistors and wires are defined by masks
 Cross-section taken along dashed line

GND VDD

nMOS transistor pMOS transistor

substrate tap well tap

0: Introduction CMOS VLSI Design Slide 21

 Summary
 MOS Transistors are stack of gate, oxide, silicon
 Can be viewed as electrically controlled switches
 Build logic gates out of switches
 Draw masks to specify layout of transistors

 Now you know everything necessary to start

designing schematics and layout for a simple chip!

0: Introduction CMOS VLSI Design Slide 22