Encoder Decoder Mux
Demux
Learning Outcomes
By the end of the class, students
would be able to:
Explain the operation of the
decoders and encoders
Explain the operation of the
multiplexers and demultiplexer
Outline
Decoders
Encoders
Multiplexers
DeMultiplexers
Functional Blocks
Digital systems consists of
many components (blocks)
Useful blocks needed in many
designs
Arithmetic blocks
Decoders
Encoders
Multiplexers
iPhone motherboard (torontophonerepair.com)
Decoder
n inputs
n-to-2
Decoder
.
.
n
2 outputs
Information is represented by binary codes
Decoding - the conversion of an n-bit
input code to an m-bit output code with n
<= m <= 2n such that each valid code
word produces a unique output code
Circuits that perform decoding are called
decoders
A decoder is a minterm generator
Decoder (Uses)
Decode a 3-bit op-codes:
Home automation:
op0
op1
op2
Load a
Add b
Store c
.
.
3-to-8
Decoder
Add
Sub
And
Xor
Not
Load
Store
Jump
C0
C1
2-to-4
Decoder
Light
A/C
Door
Light-A/C
Decoder with Enable
A decoder can have an
additional input signal called
the enable which enables or
disables the output generated
by
the decoder
.
n
n inputs
n-to-2
n
.
Decoder
Enable bit
.
.
2 outputs
2-to-4 Decoder
A 2-to-4 Decoder
2 inputs (A1, A0)
22 = 4 outputs (D3, D2, D1, D0)
2-to-4 Decoder
A 2-to-4 Decoder
2 inputs (A1, A0)
A0
22 = 4 outputs (D3, D2, D1, D0A)1
A1
Truth
D0
D1 Table
D2
D3
2-to-4
Decoder
with Enable
EN
D0
D1
D2
D3
2-to-4 Decoder
A 2-to-4 Decoder
2 inputs (A1, A0)
22 = 4 outputs (D3, D2, D1, D0)
Truth Table
A1
A0
D0
D1
D2
D3
2-to-4 Decoder with Enable
Truth Table
EN
A1
A0
D0
D1
D2
D3
2-to-4 Decoder with Enable
Truth Table
EN
A1
A0
D0
D1
D2
D3
3-to-8 Decoder
A0
A1
A2
3-to-8
Decoder
D0
D1
D2
D3
D4
D5
D6
D7
A2
A1
A0
D0
D1
D2
D3
D4
D5
D6
D7
3-to-8 Decoder
A0
A1
A2
3-to-8
Decoder
D0
D1
D2
D3
D4
D5
D6
D7
A2
A1
A0
D0
D1
D2
D3
D4
D5
D6
D7
3-to-8 Decoder
(using 2 2-to-4 decoders with enable)
A0
A1
A2
3-to-8
Decoder
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
2-to-4
Decoder
E
D0
D1
D2
D3
A2
A0
A1
2-to-4
Decoder
E
D4
D5
D6
D7
Decoder-Based
Combinational Circuits
A Decoder generates all the
minterms
A boolean function can be
expressed as a sum of minterms
Any boolean function can be
implemented using a decoder and
an OR gate.
Note: The Boolean function must be
represented in terms of its
minterms and not its minimized
Decoder-Based Combinational
Circuits (Example)
S = m (1,2,4,7)
C = m (3,5,6,7)
1
0
0
3 inputs and 8 possible
1
0
1
minterms
1
1
0
1 for
1
1
3-to-8 decoder can be used
implementing this circuit
Decoder-Based Combinational
Circuits (Example)
S = m (1,2,4,7)
C = m (3,5,6,7)
3 inputs and 8 possible minterms
3-to-8 decoder can be used for
implementing this circuit
Encoder
inputs
.
.
n
2 -to-n
n outputs
Encoder
Encoding - the opposite of decoding - the
conversion of an m-bit input code to a nbit output code with n m 2n such that
each valid code word produces a unique
output code
Circuits that perform encoding are called
encoders
An encoder has 2n (or fewer) input lines
and n output lines which generate the
binary code corresponding to the input
8-to-3 Encoder
D0
D1
D2
D3
D4
D5
D6
D7
Description:
23 = 8 inputs, 3 outputs
one input =1, others = 0s
Each input generate unique binary
code
8-to-3
Encoder
A0
A1
A2
8-to-3 Encoder (truth table)
D0
D1
D2
D3
D4
D5
D6
D7
8-to-3
Encoder
inputs
A0
A1
A2
outputs
D7
D6
D5
D4
D3
D2
D1
D0
A2
A1
A0
8-to-3 Encoder (truth table)
1
0
0
0
0
0
0
0
D0
D1
D2
D3
D4
D5
D6
D7
8-to-3
Encoder
inputs
A0
A1
A2
0
0
0
outputs
D7
D6
D5
D4
D3
D2
D1
D0
A2
A1
A0
8-to-3 Encoder (truth table)
0
1
0
0
0
0
0
0
D0
D1
D2
D3
D4
D5
D6
D7
8-to-3
Encoder
A0
A1
A2
1
0
0
inputs
outputs
D7
D6
D5
D4
D3
D2
D1
D0
A2
A1
A0
8-to-3 Encoder (truth table)
0
0
0
0
0
1
0
0
D0
D1
D2
D3
D4
D5
D6
D7
8-to-3
Encoder
inputs
A0
A1
A2
1
0
1
outputs
D7
D6
D5
D4
D3
D2
D1
D0
A2
A1
A0
8-to-3 Encoder (truth table)
0
0
0
0
0
0
0
1
D0
D1
D2
D3
D4
D5
D6
D7
8-to-3
Encoder
inputs
A0
A1
A2
1
1
1
outputs
D7
D6
D5
D4
D3
D2
D1
D0
A2
A1
A0
8-to-3 Encoder (equations)
0
0
0
0
0
0
0
1
D0
D1
D2
D3
D4
D5
D6
D7
inputs
A0
8-to-3 A1
Encoder A2
Output equations:
A0 = ?
A1 = ?
A2 = ?
1
1
1
outputs
D7
D6
D5
D4
D3
D2
D1
D0
A2
A1
A0
8-to-3 Encoder (equations)
D0
D1
D2
D3
D4
D5
D6
D7
inputs
A0
8-to-3 A1
Encoder A2
Output equations:
A0 = D 1 + D 3 + D 5 + D 7
A1 = ?
A2 = ?
outputs
D7
D6
D5
D4
D3
D2
D1
D0
A2
A1
A0
8-to-3 Encoder (equations)
D0
D1
D2
D3
D4
D5
D6
D7
A0
8-to-3 A1
Encoder A2
inputs
outputs
D7
D6
D5
D4
D3
D2
D1
D0
A2
A1
A0
Output equations:
A0 = D 1 + D 3 + D 5 + D 7
A1 = D 2 + D 3 + D 6 + D 7
A2 = ?
8-to-3 Encoder (equations)
D0
D1
D2
D3
D4
D5
D6
D7
inputs
A0
8-to-3 A1
Encoder A2
Output equations:
A0 = D 1 + D 3 + D 5 + D 7
A1 = D 2 + D 3 + D 6 + D 7
A2 = D 4 + D 5 + D 6 + D 7
outputs
D7
D6
D5
D4
D3
D2
D1
D0
A2
A1
A0
8-to-3 Encoder (equations)
D0
D1
D2
D3
D4
D5
D6
D7
A0
8-to-3 A1
Encoder A2
Output equations:
A0 = D 1 + D 3 + D 5 + D 7
A1 = D 2 + D 3 + D 6 + D 7
A =D +D +D +D
D1
D3
D5
D
D7
A0
D3
D6
D
D7
A1
D5
D6
D7
A2
Multiplexers
Is a combinational circuit
Has a single output
Directs one of 2n input to the
output
Input to output direction is done
based on a set of n select bits
2n inputs
2n x 1
MUX
n select lines
one output
2x1 MUX
A 2x1 multiplexer (MUX) will have
2 input lines and 1 select line
D0
2x1 MUX
D1
S0
Y=D0 for S0=0, and Y=D1 for S0=1
Minimizing will result in: Y = S0.D0
+ S0.D1
4x1 MUX
A 4x1 MUX will have 4 input lines (D0, D1,
D2, D3) and 1 output Y with 2 Select Lines
(S0, S1)
The output for different select values
D0 is
defined as:
D1
S
S
=
00,
Y
=
D
0 1
0
D2
S0S1 = 01, Y = D1
D3
S0S1 = 10, Y = D2
S0S1 = 11, Y = D3
4x1 MUX
S1 S0
Quad 2x1 MUX
Does multiplexing of two 4-bit numbers.
Has a 4-bit output and a single select line
Is built using four 2x1 MUXes
A0
2x1 MUX
Y0
B0
A1
Y1
B1
S0
A2
2x1 MUX
2x1 MUX
B2
Y2
A3
S0
2x1 MUX
B3
S
Y3
Quad 2x1 MUX
A0
A1
Y = A If S0 = 0
Y = B if S0=1
A2
A3
B0
B1
QUAD
Y0
2X1
Y1
MUX
Y2
Y3
B2
B3
S0
MUX-based Design
A MUX can be used to implement any function expressed
using its minterms
Example: Implement F(A,B,C)=(1,3,5,6) using MUXes
Solution1:
We can use a MUX with the number of select lines equal to
the number of input variables of the function. Since this
function has 3 input variables, it will require 3 select lines,
i.e. an 8x1 MUX
MUX-based Design
(n-Select lines)
F(A,B,C)=(1,3,5,6)
0
D0
D1
D2
1
0
D3
D4
D5
D6
D7
S2
S
S1 0
A B C
Implement F(A,B,C)=(1,2,6,7) using 4x1 MUX
Example: F(x,y,z) = m(1, 2, 6, 7)
38
DeMultiplexer
Performs the inverse of the operation of a MUX
It has one input line, the input from which is
transmitted to one of 2n output lines
The output lines are selected based on the select
inputs
E
1x2
DeMUX
S
D0
D1
1x4 DeMUX
1x4
DeMUX
D0
D1
D2
D3
S0 S1
The circuit has an input E, the outputs are given by:
D0 = E, if S0S1=00
D0 = S1S0 E
D1 = E, if S0S1=01
D1 = S1S0 E
D2 = E, if S0S1=10
D2 = S1S0 E
D3 = E, if S0S1=11
D3 = S1S0 E
Summary
Useful Functional Blocks
Decoders
Encoders
Multiplexers
DeMultiplexers
Can be used to build bigger systems
Implement F=(1,3,5,6,10,13) using both
methods.
MUX
Decoders
Implement the following expression using an
8x1 MUX
Your design must include truth table and
end!
Next Week:
Adders &
Subtractor
THANK
S!
Any
questions?
You can find me at
khadijah.k@kdupg.
edu.my
04-2386330
