The World is Not Just Integers
Programming languages support numbers with fraction
Called floating-point numbers
Examples:
3.14159265 ()
2.71828 (e)
0.000000001 or 1.0 109 (seconds in a nanosecond)
86,400,000,000,000 or 8.64 1013 (nanoseconds in a day)
last number is a large integer that cannot fit in a 32-bit integer
We use a scientific notation to represent
Very small numbers (e.g. 1.0 109)
Very large numbers (e.g. 8.64 1013)
Scientific notation: d . f1f2f3f4 10 e1e2e3
Floating-Point Numbers
Examples of floating-point numbers in base 10
5.341103 , 0.05341105 , 2.013101 , 201.3103
decimal point
Examples of floating-point numbers in base 2
1.00101223 , 0.0100101225 , 1.10110123 , 1101.10126
Exponents are kept in decimal for clarity
binary point
The binary number (1101.101)2 = 23+22+20+21+23 = 13.625
Floating-point numbers should be normalized
Exactly one non-zero digit should appear before the point
In a decimal number, this digit can be from 1 to 9
In a binary number, this digit should be 1
Normalized FP Numbers: 5.341103 and 1.10110123
NOT Normalized: 0.05341105 and 1101.10126
Floating-Point Representation
A floating-point number is represented by the triple
S is the Sign bit (0 is positive and 1 is negative)
Representation is called sign and magnitude
E is the Exponent field (signed)
Very large numbers have large positive exponents
Very small close-to-zero numbers have negative exponents
More bits in exponent field increases range of values
F is the Fraction field (fraction after binary point)
More bits in fraction field improves the precision of FP numbers
S Exponent
Fraction
Value of a floating-point number = (-1)S val(F) 2val(E)
Next . . .
Floating-Point Numbers
IEEE 754 Floating-Point Standard
Floating-Point Addition and Subtraction
Floating-Point Multiplication
MIPS Floating-Point Instructions
IEEE 754 Floating-Point Standard
Found in virtually every computer invented since 1980
Simplified porting of floating-point numbers
Unified the development of floating-point algorithms
Increased the accuracy of floating-point numbers
Single Precision Floating Point Numbers (32 bits)
1-bit sign + 8-bit exponent + 23-bit fraction
S Exponent8
Fraction23
Double Precision Floating Point Numbers (64 bits)
1-bit sign + 11-bit exponent + 52-bit fraction
S
Exponent11
Fraction52
(continued)
Normalized Floating Point Numbers
For a normalized floating point number (S, E, F)
S
F = f1 f2 f 3 f4
Significand is equal to (1.F)2 = (1.f1f2f3f4)2
IEEE 754 assumes hidden 1. (not stored) for normalized numbers
Significand is 1 bit longer than fraction
Value of a Normalized Floating Point Number is
(1)S (1.F)2 2val(E)
(1)S (1.f1f2f3f4 )2 2val(E)
(1)S (1 + f12-1 + f22-2 + f32-3 + f42-4 )2 2val(E)
(1)S is 1 when S is 0 (positive), and 1 when S is 1 (negative)
Biased Exponent Representation
How to represent a signed exponent? Choices are
Sign + magnitude representation for the exponent
Twos complement representation
Biased representation
IEEE 754 uses biased representation for the exponent
Value of exponent = val(E) = E Bias (Bias is a constant)
Recall that exponent field is 8 bits for single precision
E can be in the range 0 to 255
E = 0 and E = 255 are reserved for special use (discussed later)
E = 1 to 254 are used for normalized floating point numbers
Bias = 127 (half of 254), val(E) = E 127
val(E=1) = 126, val(E=127) = 0, val(E=254) = 127
Biased Exponent Contd
For double precision, exponent field is 11 bits
E can be in the range 0 to 2047
E = 0 and E = 2047 are reserved for special use
E = 1 to 2046 are used for normalized floating point numbers
Bias = 1023 (half of 2046), val(E) = E 1023
val(E=1) = 1022, val(E=1023) = 0, val(E=2046) = 1023
Value of a Normalized Floating Point Number is
(1)S (1.F)2 2E Bias
(1)S (1.f1f2f3f4 )2 2E Bias
(1)S (1 + f12-1 + f22-2 + f32-3 + f42-4 )2 2E Bias
Examples of Single Precision Float
What is the decimal value of this Single Precision float?
10111110001000000000000000000000
Solution:
Sign = 1 is negative
Exponent = (01111100)2 = 124, E bias = 124 127 = 3
Significand = (1.0100 0)2 = 1 + 2-2 = 1.25 (1. is implicit)
Value in decimal = 1.25 23 = 0.15625
What is the decimal value of?
01000001001001100000000000000000
Solution:
implicit
Value in decimal = +(1.01001100 0)2 2130127 =
(1.01001100 0)2 23 = (1010.01100 0)2 = 10.375
Examples of Double Precision Float
What is the decimal value of this Double Precision float ?
01000000010100101010000000000000
00000000000000000000000000000000
Solution:
Value of exponent = (10000000101)2 Bias = 1029 1023 = 6
Value of double float = (1.00101010 0)2 26 (1. is implicit) =
(1001010.10 0)2 = 74.5
What is the decimal value of ?
10111111100010000000000000000000
00000000000000000000000000000000
Do it yourself! (answer should be 1.5 27 = 0.01171875)
Converting FP Decimal to Binary
Convert 0.8125 to binary in single and double precision
Solution:
Fraction bits can be obtained using multiplication by 2
0.8125 2 = 1.625
0.625 2 = 1.25
0.8125 = (0.1101)2 = + + 1/16 = 13/16
0.25 2
= 0.5
0.5 2
= 1.0
Stop when fractional part is 0
Fraction = (0.1101)2 = (1.101)2 2 1 (Normalized)
Exponent = 1 + Bias = 126 (single precision) and 1022 (double)
10111111010100000000000000000000
10111111111010100000000000000000
00000000000000000000000000000000
Single
Precision
Double
Precision
Largest Normalized Float
What is the Largest normalized float?
Solution for Single Precision:
01111111011111111111111111111111
Exponent bias = 254 127 = 127 (largest exponent for SP)
Significand = (1.111 1)2 = almost 2
Value in decimal 2 2127 2128 3.4028 1038
Solution for Double Precision:
01111111111011111111111111111111
11111111111111111111111111111111
Value in decimal 2 21023 21024 1.79769 10308
Overflow: exponent is too large to fit in the exponent field
Smallest Normalized Float
What is the smallest (in absolute value) normalized float?
Solution for Single Precision:
00000000100000000000000000000000
Exponent bias = 1 127 = 126 (smallest exponent for SP)
Significand = (1.000 0)2 = 1
Value in decimal = 1 2126 = 1.17549 1038
Solution for Double Precision:
00000000000100000000000000000000
00000000000000000000000000000000
Value in decimal = 1 21022 = 2.22507 10308
Underflow: exponent is too small to fit in exponent field
Zero, Infinity, and NaN
Zero
Exponent field E = 0 and fraction F = 0
+0 and 0 are possible according to sign bit S
Infinity
Infinity is a special value represented with maximum E and F = 0
For single precision with 8-bit exponent: maximum E = 255
For double precision with 11-bit exponent: maximum E = 2047
Infinity can result from overflow or division by zero
+ and are possible according to sign bit S
NaN (Not a Number)
NaN is a special value represented with maximum E and F 0
Result from exceptional situations, such as 0/0 or sqrt(negative)
Operation on a NaN results is NaN: Op(X, NaN) = NaN
Denormalized Numbers
IEEE standard uses denormalized numbers to
Fill the gap between 0 and the smallest normalized float
Provide gradual underflow to zero
Denormalized: exponent field E is 0 and fraction F 0
Implicit 1. before the fraction now becomes 0. (not normalized)
Value of denormalized number ( S, 0, F )
(1) S (0.F)2 2126
(1) S (0.F)2 21022
Single precision:
Double precision:
Negative
Overflow
-
-2128
Negative
Underflow
Normalized (ve)
Positive
Underflow
Denorm
-2126
Denorm
0
2126
Positive
Overflow
Normalized (+ve)
+
2128
Summary of IEEE 754 Encoding
Single-Precision
Exponent = 8
Fraction = 23
Value
1 to 254
Anything
(1.F)2 2E 127
Denormalized Number
nonzero
(0.F)2 2126
Zero
Infinity
255
NaN
255
nonzero
NaN
Exponent = 11
Fraction = 52
Value
1 to 2046
Anything
(1.F)2 2E 1023
Denormalized Number
nonzero
(0.F)2 21022
Zero
Infinity
2047
NaN
2047
nonzero
NaN
Normalized Number
Double-Precision
Normalized Number
Floating-Point Comparison
IEEE 754 floating point numbers are ordered
Because exponent uses a biased representation
Exponent value and its binary representation have same ordering
Placing exponent before the fraction field orders the magnitude
Larger exponent larger magnitude
For equal exponents, Larger fraction larger magnitude
0 < (0.F)2 2Emin < (1.F)2 2EBias < (Emin = 1 Bias)
Because sign bit is most significant quick test of signed <
Integer comparator can compare magnitudes
X = (EX , FX)
Y = (EY , FY)
Integer
X<Y
Magnitude
X=Y
Comparator
X>Y
Next . . .
Floating-Point Numbers
IEEE 754 Floating-Point Standard
Floating-Point Addition and Subtraction
Floating-Point Multiplication
MIPS Floating-Point Instructions
Floating Point Addition Example
Consider Adding (Single-Precision Floating-Point):
+ 1.111001000000000000000102 24
+ 1.100000000000001100001012 22
Cannot add significands Why?
Because exponents are not equal
How to make exponents equal?
Shift the significand of the lesser exponent right
Difference between the two exponents = 4 2 = 2
So, shift right second number by 2 bits and increment exponent
1.100000000000001100001012 22
= 0.01100000000000001100001 012 24
Floating-Point Addition cont'd
Now, ADD the Significands:
+ 1.11100100000000000000010
24
+ 1.10000000000000110000101
22
+ 1.11100100000000000000010
24
+ 0.01100000000000001100001 01 24 (shift right)
+10.01000100000000001100011 01 24 (result)
Addition produces a carry bit, result is NOT normalized
Normalize Result (shift right and increment exponent):
+ 10.01000100000000001100011 01 24
= + 1.00100010000000000110001
101 25
Rounding
Single-precision requires only 23 fraction bits
However, Normalized result can contain additional bits
1.00100010000000000110001 | 1 01 25
Round Bit: R = 1
Sticky Bit: S = 1
Two extra bits are needed for rounding
Round bit: appears just after the normalized result
Sticky bit: appears after the round bit (OR of all additional bits)
Since RS = 11, increment fraction to round to nearest
1.00100010000000000110001 25
+1
1.00100010000000000110010 25 (Rounded)
Floating-Point Subtraction Example
Sometimes, addition is converted into subtraction
If the sign bits of the operands are different
Consider Adding:
+ 1.00000000101100010001101 2-6
1.00000000000000010011010 2-1
+ 0.00001000000001011000100 01101 2-1 (shift right 5 bits)
1.00000000000000010011010
2-1
0 0.00001000000001011000100 01101 2-1
1 0.11111111111111101100110
2-1 (2's complement)
1 1.00001000000001000101010 01101 2-1 (ADD)
- 0.11110111111110111010101 10011 2-1 (2's complement)
2's complement of result is required if result is negative
Floating-Point Subtraction cont'd
+ 1.00000000101100010001101 2-6
1.00000000000000010011010 2-1
- 0.11110111111110111010101 10011 2-1 (result is negative)
Result should be normalized
For subtraction, we can have leading zeros. To normalize, count
the number of leading zeros, then shift result left and decrement
the exponent accordingly. Guard bit
- 0.11110111111110111010101 1 0011 2-1
- 1.11101111111101110101011
0011 2-2 (Normalized)
Guard bit: guards against loss of a fraction bit
Needed for subtraction, when result has a leading zero and
should be normalized.
Floating-Point Subtraction cont'd
Next, normalized result should be rounded
Guard bit
- 0.11110111111110111010101 1 0 011 2-1
- 1.11101111111101110101011
0 011 2-2 (Normalized)
Sticky bit: S = 1
Round bit: R=0
Since R = 0, it is more accurate to truncate the result
even if S = 1. We simply discard the extra bits.
- 1.11101111111101110101011
0 011 2-2 (Normalized)
- 1.11101111111101110101011
2-2 (Rounded to nearest)
IEEE 754 Representation of Result
10111110111101111111101110101011
Rounding to Nearest Even
Normalized result has the form: 1. f1 f2 fl R S
The round bit R appears after the last fraction bit fl
The sticky bit S is the OR of all remaining additional bits
Round to Nearest Even: default rounding mode
Four cases for RS:
RS = 00 Result is Exact, no need for rounding
RS = 01 Truncate result by discarding RS
RS = 11 Increment result: ADD 1 to last fraction bit
RS = 10 Tie Case (either truncate or increment result)
Check Last fraction bit fl (f23 for single-precision or f52 for double)
If fl is 0 then truncate result to keep fraction even
If fl is 1 then increment result to make fraction even
Additional Rounding Modes
IEEE 754 standard specifies four rounding modes:
1. Round to Nearest Even: described in previous slide
2. Round toward +Infinity: result is rounded up
Increment result if sign is positive and R or S = 1
3. Round toward -Infinity: result is rounded down
Increment result if sign is negative and R or S = 1
4. Round toward 0: always truncate result
Rounding or Incrementing result might generate a carry
This occurs when all fraction bits are 1
Re-Normalize after Rounding step is required only in this case
Example on Rounding
Round following result using IEEE 754 rounding modes:
1.11111111111111111111111 1 0 2-7
Round to Nearest Even:
Round Bit
Sticky Bit
Increment result since RS = 10 and f23 = 1
Incremented result: 10.00000000000000000000000 2-7
Renormalize and increment exponent (because of carry)
Final rounded result: 1.00000000000000000000000 2-6
Round towards +: Truncate result since negative
Truncated Result: 1.11111111111111111111111 2-7
Round towards : Increment since negative and R = 1
Final rounded result: 1.00000000000000000000000 2-6
Round towards 0: Truncate always
Floating Point Addition / Subtraction
Start
1. Compare the exponents of the two numbers. Shift the
smaller number to the right until its exponent would match
the larger exponent.
2. Add / Subtract the significands according to the sign bits.
Shift significand right by
d = | EX EY |
Add significands when signs
of X and Y are identical,
Subtract when different
X Y becomes X + (Y)
3. Normalize the sum, either shifting right and incrementing
the exponent or shifting left and decrementing the exponent
4. Round the significand to the appropriate number of bits, and
renormalize if rounding generates a carry
Overflow or
underflow?
no
Done
yes
Exception
Normalization shifts right by 1 if
there is a carry, or shifts left by
the number of leading zeros in
the case of subtraction
Rounding either truncates
fraction, or adds a 1 to least
significant fraction bit
Floating Point Adder Block Diagram
EX
EY
Exponent
Subtractor
sign
0
FX
Swap
d = | EX EY |
SX
add/sub
FY
Shift Right
add / subtract
Sign
Computation
Significand
Adder/Subtractor
sign
SY
max ( EX , EY )
c
z
Inc / Dec
SZ
EZ
Detect carry, or
Count leading 0s
c
Shift Right / Left
z
Rounding Logic
FZ
Next . . .
Floating-Point Numbers
IEEE 754 Floating-Point Standard
Floating-Point Addition and Subtraction
Floating-Point Multiplication
MIPS Floating-Point Instructions
Floating Point Multiplication Example
Consider multiplying:
-1.110 1000 0100 0000 1010 00012 24
1.100 0000 0001 0000 0000 00002 22
Unlike addition, we add the exponents of the operands
Result exponent value = (4) + (2) = 6
Using the biased representation: EZ = EX + EY Bias
EX = (4) + 127 = 123 (Bias = 127 for single precision)
EY = (2) + 127 = 125
EZ = 123 + 125 127 = 121 (value = 6)
Sign bit of product can be computed independently
Sign bit of product = SignX XOR SignY = 1 (negative)
Floating-Point Multiplication, cont'd
Now multiply the significands:
(Multiplicand)
(Multiplier)
1.11010000100000010100001
1.10000000001000000000000
111010000100000010100001
111010000100000010100001
1.11010000100000010100001
10.1011100011111011111100110010100001000000000000
24 bits 24 bits 48 bits (double number of bits)
Multiplicand 0 = 0
Zero rows are eliminated
Multiplicand 1 = Multiplicand (shifted left)
Floating-Point Multiplication, cont'd
Normalize Product:
-10.10111000111110111111001100... 2-6
Shift right and increment exponent because of carry bit
= -1.010111000111110111111001100... 2-5
Round to Nearest Even: (keep only 23 fraction bits)
1.01011100011111011111100 | 1 100... 2-5
Round bit = 1, Sticky bit = 1, so increment fraction
Final result = -1.01011100011111011111101 2-5
IEEE 754 Representation
10111101001011100011111011111101
Floating Point Multiplication
Start
1. Add the biased exponents of the two numbers, subtracting
the bias from the sum to get the new biased exponent
2. Multiply the significands. Set the result sign to positive if
operands have same sign, and negative otherwise
3. Normalize the product if necessary, shifting its significand
right and incrementing the exponent
4. Round the significand to the appropriate number of bits, and
renormalize if rounding generates a carry
Overflow or
underflow?
no
Done
yes
Exception
Biased Exponent Addition
EZ = EX + EY Bias
Result sign SZ = SX xor SY can
be computed independently
Since the operand significands
1.FX and 1.FY are 1 and < 2,
their product is 1 and < 4.
To normalize product, we need
to shift right at most by 1 bit and
increment exponent
Rounding either truncates
fraction, or adds a 1 to least
significant fraction bit
Extra Bits to Maintain Precision
Floating-point numbers are approximations for
Real numbers that they cannot represent
Infinite variety of real numbers exist between 1.0 and 2.0
However, exactly 223 fractions represented in Single Precision
Exactly 252 fractions can be represented in Double Precision
Extra bits are generated in intermediate results when
Shifting and adding/subtracting a p-bit significand
Multiplying two p-bit significands (product is 2p bits)
But when packing result fraction, extra bits are discarded
Few extra bits are needed: guard, round, and sticky bits
Minimize hardware but without compromising accuracy
Advantages of IEEE 754 Standard
Used predominantly by the industry
Encoding of exponent and fraction simplifies comparison
Integer comparator used to compare magnitude of FP numbers
Includes special exceptional values: NaN and
Special rules are used such as:
0/0 is NaN, sqrt(1) is NaN, 1/0 is , and 1/ is 0
Computation may continue in the face of exceptional conditions
Denormalized numbers to fill the gap
Between smallest normalized number 1.0 2Emin and zero
Denormalized numbers , values 0.F 2Emin , are closer to zero
Gradual underflow to zero
Floating Point Complexities
Operations are somewhat more complicated
In addition to overflow we can have underflow
Accuracy can be a big problem
Extra bits to maintain precision: guard, round, and sticky
Four rounding modes
Division by zero yields Infinity
Zero divide by zero yields Not-a-Number
Other complexities
Implementing the standard can be tricky
See text for description of 80x86 and Pentium bug!
Not using the standard can be even worse
Accuracy can be a Big Problem
Value1
Value2
Value3
Value4
Sum
1.0E+30
-1.0E+30
9.5
-2.3
7.2
1.0E+30
9.5
-1.0E+30
-2.3
-2.3
1.0E+30
9.5
-2.3
-1.0E+30
Adding double-precision floating-point numbers (Excel)
Floating-Point addition is NOT associative
Produces different sums for the same data values
Rounding errors when the difference in exponent is large
Next . . .
Floating-Point Numbers
IEEE 754 Floating-Point Standard
Floating-Point Addition and Subtraction
Floating-Point Multiplication
MIPS Floating-Point Instructions
MIPS Floating Point Coprocessor
Called Coprocessor 1 or the Floating Point Unit (FPU)
32 separate floating point registers: $f0, $f1, , $f31
FP registers are 32 bits for single precision numbers
Even-odd register pair form a double precision register
Use the even number for double precision registers
$f0, $f2, $f4, , $f30 are used for double precision
Separate FP instructions for single/double precision
Single precision: add.s, sub.s, mul.s, div.s
(.s extension)
Double precision: add.d, sub.d, mul.d, div.d
(.d extension)
FP instructions are more complex than the integer ones
Take more cycles to execute
FP Arithmetic Instructions
Instruction
add.s
add.d
sub.s
sub.d
mul.s
mul.d
div.s
div.d
sqrt.s
sqrt.d
abs.s
abs.d
neg.s
neg.d
fd, fs, ft
fd, fs, ft
fd, fs, ft
fd, fs, ft
fd, fs, ft
fd, fs, ft
fd, fs, ft
fd, fs, ft
fd, fs
fd, fs
fd, fs
fd, fs
fd, fs
fd, fs
Meaning
(fd) = (fs) + (ft)
(fd) = (fs) + (ft)
(fd) = (fs) (ft)
(fd) = (fs) (ft)
(fd) = (fs) (ft)
(fd) = (fs) (ft)
(fd) = (fs) / (ft)
(fd) = (fs) / (ft)
(fd) = sqrt (fs)
(fd) = sqrt (fs)
(fd) = abs (fs)
(fd) = abs (fs)
(fd) = (fs)
(fd) = (fs)
Format
0x11
0x11
0x11
0x11
0x11
0x11
0x11
0x11
0x11
0x11
0x11
0x11
0x11
0x11
0
1
0
1
0
1
0
1
0
1
0
1
0
1
ft5
ft5
ft5
ft5
ft5
ft5
ft5
ft5
0
0
0
0
0
0
fs5
fs5
fs5
fs5
fs5
fs5
fs5
fs5
fs5
fs5
fs5
fs5
fs5
fs5
fd5
fd5
fd5
fd5
fd5
fd5
fd5
fd5
fd5
fd5
fd5
fd5
fd5
fd5
0
0
1
1
2
2
3
3
4
4
5
5
7
7
FP Load/Store Instructions
Separate floating point load/store instructions
lwc1: load word coprocessor 1
General purpose
register is used as
the base register
ldc1: load double coprocessor 1
swc1: store word coprocessor 1
sdc1: store double coprocessor 1
Instruction
lwc1
ldc1
swc1
sdc1
$f2, 40($t0)
$f2, 40($t0)
$f2, 40($t0)
$f2, 40($t0)
Meaning
Format
($f2) = Mem[($t0)+40]
($f2) = Mem[($t0)+40]
Mem[($t0)+40] = ($f2)
Mem[($t0)+40] = ($f2)
0x31
0x35
0x39
0x3d
$t0
$t0
$t0
$t0
$f2
$f2
$f2
$f2
im16 = 40
im16 = 40
im16 = 40
im16 = 40
Better names can be used for the above instructions
l.s = lwc1 (load FP single),
l.d = ldc1 (load FP double)
s.s = swc1 (store FP single),
s.d = sdc1 (store FP double)
FP Data Movement Instructions
Moving data between general purpose and FP registers
mfc1: move from coprocessor 1
(to general purpose register)
mtc1: move to coprocessor 1
(from general purpose register)
Moving data between FP registers
mov.s: move single precision float
mov.d: move double precision float = even/odd pair of registers
Instruction
Meaning
Format
mfc1
$t0, $f2
($t0) = ($f2)
0x11
$t0
$f2
mtc1
$t0, $f2
($f2) = ($t0)
0x11
$t0
$f2
mov.s $f4, $f2
($f4) = ($f2)
0x11
$f2
$f4
mov.d $f4, $f2
($f4) = ($f2)
0x11
$f2
$f4
FP Convert Instructions
Convert instruction: cvt.x.y
Convert to destination format x from source format y
Supported formats
Single precision float = .s
(single precision float in FP register)
Double precision float = .d
(double float in even-odd FP register)
Signed integer word
Instruction
cvt.s.w
cvt.s.d
cvt.d.w
cvt.d.s
cvt.w.s
cvt.w.d
fd, fs
fd, fs
fd, fs
fd, fs
fd, fs
fd, fs
= .w (signed integer in FP register)
Meaning
to single from integer
to single from double
to double from integer
to double from single
to integer from single
to integer from double
Format
0x11
0x11
0x11
0x11
0x11
0x11
0
1
0
1
0
1
0
0
0
0
0
0
fs5
fs5
fs5
fs5
fs5
fs5
fd5
fd5
fd5
fd5
fd5
fd5
0x20
0x20
0x21
0x21
0x24
0x24
FP Compare and Branch Instructions
FP unit (co-processor 1) has a condition flag
Set to 0 (false) or 1 (true) by any comparison instruction
Three comparisons: equal, less than, less than or equal
Two branch instructions based on the condition flag
Instruction
c.eq.s
c.eq.d
c.lt.s
c.lt.d
c.le.s
c.le.d
bc1f
bc1t
fs, ft
fs, ft
fs, ft
fs, ft
fs, ft
fs, ft
Label
Label
Meaning
cflag = ((fs) == (ft))
cflag = ((fs) == (ft))
cflag = ((fs) <= (ft))
cflag = ((fs) <= (ft))
cflag = ((fs) <= (ft))
cflag = ((fs) <= (ft))
branch if (cflag == 0)
branch if (cflag == 1)
Format
0x11
0x11
0x11
0x11
0x11
0x11
0x11
0x11
0
1
0
1
0
1
8
8
ft5
ft5
ft5
ft5
ft5
ft5
0
1
fs5
fs5
fs5
fs5
fs5
fs5
0
0
0
0
0
0
im16
im16
0x32
0x32
0x3c
0x3c
0x3e
0x3e
Example 1: Area of a Circle
.data
pi:
msg:
.text
main:
ldc1
li
syscall
mul.d
mul.d
la
li
syscall
li
syscall
.double
.asciiz
3.1415926535897924
"Circle Area = "
$f2, pi
$v0, 7
#
#
#
#
#
$f12, $f0, $f0
$f12, $f2, $f12
$a0, msg
$v0, 4
$v0, 3
$f2,3 = pi
read double (radius)
$f0,1 = radius
$f12,13 = radius*radius
$f12,13 = area
# print string (msg)
# print double (area)
# print $f12,13
Example 2: Matrix Multiplication
void mm (int n, double x[n][n], y[n][n], z[n][n]) {
for (int i=0; i!=n; i=i+1)
for (int j=0; j!=n; j=j+1) {
double sum = 0.0;
for (int k=0; k!=n; k=k+1)
sum = sum + y[i][k] * z[k][j];
x[i][j] = sum;
}
}
Matrices x, y, and z are nn double precision float
Matrix size is passed in $a0 = n
Array addresses are passed in $a1, $a2, and $a3
What is the MIPS assembly code for the procedure?
Address Calculation for 2D Arrays
Row-Major Order: 2D arrays are stored as rows
Calculate Address of: X[i][j]
= Address of X + (in+j)8 (8 bytes per element)
row 0
row i-1
row i
n elements per row
n elements per row
j elements
in
elements
X[i][j]
Address of Y[i][k] =
Address of Y + (in+k)8
Address of Z[k][j] =
Address of Z + (kn+j)8
Matrix Multiplication Procedure 1/3
Initialize Loop Variables
mm:
L1:
L2:
addu
addu
addu
sub.d
$t1,
$t2,
$t3,
$f0,
$0, $0
$0, $0
$0, $0
$f0, $f0
#
#
#
#
$t1
$t2
$t3
$f0
=
=
=
=
i =
j =
k =
sum
0; for 1st loop
0; for 2nd loop
0; for 3rd loop
= 0.0
Calculate address of y[i][k] and load it into $f2,$f3
Skip i rows (in) and add k elements
L3:
mul
addu
sll
addu
l.d
$t4,
$t4,
$t4,
$t4,
$f2,
$t1, $a0
$t4, $t3
$t4, 3
$a2, $t4
0($t4)
#
#
#
#
#
$t4
$t4
$t4
$t4
$f2
= i*size(row) = i*n
= i*n + k
=(i*n + k)*8
= address of y[i][k]
= y[i][k]
Matrix Multiplication Procedure 2/3
Similarly, calculate address and load value of z[k][j]
Skip k rows (kn) and add j elements
mul
addu
sll
addu
l.d
$t5,
$t5,
$t5,
$t5,
$f4,
$t3, $a0
$t5, $t2
$t5, 3
$a3, $t5
0($t5)
#
#
#
#
#
$t5
$t5
$t5
$t5
$f4
= k*size(row) = k*n
= k*n + j
=(k*n + j)*8
= address of z[k][j]
= z[k][j]
Now, multiply y[i][k] by z[k][j] and add it to $f0
mul.d
add.d
addiu
bne
$f6,
$f0,
$t3,
$t3,
$f2,
$f0,
$t3,
$a0,
$f4
$f6
1
L3
#
#
#
#
$f6 = y[i][k]*z[k][j]
$f0 = sum
k = k + 1
loop back if (k != n)
Matrix Multiplication Procedure 3/3
Calculate address of x[i][j] and store sum
mul
addu
sll
addu
s.d
$t6,
$t6,
$t6,
$t6,
$f0,
$t1, $a0
$t6, $t2
$t6, 3
$a1, $t6
0($t6)
#
#
#
#
#
$t6 = i*size(row) = i*n
$t6 = i*n + j
$t6 =(i*n + j)*8
$t6 = address of x[i][j]
x[i][j] = sum
Repeat outer loops: L2 (for j = ) and L1 (for i = )
addiu
bne
addiu
bne
$t2,
$t2,
$t1,
$t1,
$t2,
$a0,
$t1,
$a0,
1
L2
1
L1
#
#
#
#
j = j +
loop L2
i = i +
loop L1
Return:
jr
$ra
# return
1
if (j != n)
1
if (i != n)
