Swra 640 H
Swra 640 H
Application Note
CC13xx/CC26xx Hardware Configuration and PCB Design
Considerations
ABSTRACT
This application report provides design guidelines for the CC13xx/CC26xx SimpleLink™ ultra-low-power wireless
MCU platform. There is an overview of the different reference designs followed by RF front-end, schematic,
PCB, and antenna design considerations. The document also covers crystal oscillator tuning, optimum load
impedance as well as a brief explanation of the different power supply configurations. The last section of the
document provides a summary of steps to carry out at board bring-up.
Table of Contents
1 Reference Design................................................................................................................................................................... 2
1.1 Sub-1GHz LaunchPads..................................................................................................................................................... 2
1.2 2.4GHz LaunchPads.......................................................................................................................................................... 3
1.3 Dual-Band LaunchPads..................................................................................................................................................... 3
1.4 Reference Design Overview.............................................................................................................................................. 6
2 Front-End Configurations...................................................................................................................................................... 7
2.1 Overview of Front-end Configurations............................................................................................................................... 7
2.2 Configuring the Front-End Mode........................................................................................................................................8
2.3 CC13xx Single-Ended Mode..............................................................................................................................................9
2.4 CC26xx Single-End Mode................................................................................................................................................10
3 Schematic.............................................................................................................................................................................. 11
3.1 Schematic Overview.........................................................................................................................................................11
3.2 Bootloader Pins................................................................................................................................................................13
3.3 AUX Pins..........................................................................................................................................................................14
3.4 JTAG Pins........................................................................................................................................................................ 15
4 PCB Layout............................................................................................................................................................................15
4.1 Board Stack-Up................................................................................................................................................................15
4.2 Balun - Sub-1GHz............................................................................................................................................................ 16
4.3 Balun - 2.4GHz.................................................................................................................................................................17
4.4 LC Filter............................................................................................................................................................................18
4.5 Decoupling Capacitors..................................................................................................................................................... 19
4.6 Placement of Crystal Load Capacitors.............................................................................................................................19
4.7 Current Return Path......................................................................................................................................................... 19
4.8 DC/DC Regulator............................................................................................................................................................. 20
4.9 Antenna Matching Components.......................................................................................................................................20
4.10 Transmission Lines........................................................................................................................................................ 20
4.11 Electromagnetic Simulation............................................................................................................................................ 20
5 Antenna..................................................................................................................................................................................21
5.1 Single-Band Antenna....................................................................................................................................................... 21
5.2 Dual-Band Antenna..........................................................................................................................................................21
6 Crystal Tuning....................................................................................................................................................................... 25
6.1 CC13xx/CC26xx Crystal Oscillators.................................................................................................................................25
6.2 Crystal Selection.............................................................................................................................................................. 26
6.3 Tuning the LF Crystal Oscillator....................................................................................................................................... 26
6.4 Tuning the HF Oscillator...................................................................................................................................................26
7 TCXO Support....................................................................................................................................................................... 28
7.1 Hardware..........................................................................................................................................................................29
7.2 Software........................................................................................................................................................................... 29
7.3 Example: Usage of TCXO on CC1312R Launchpad....................................................................................................... 29
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1.1.2 LAUNCHXL-CC1312R
Featured device: CC1312R
ISM band: 868MHz and 915MHz
Antenna: Monopole PCB Antenna with Single or Dual Band Option
RF front-end: Differential, external bias
Design files: SimpleLink Sub-1GHz CC1312R Wireless (MCU) LaunchPad Dev Kit 868MHz/915MHz App
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1.2.2 LAUNCHXL-CC26x2R
The LAUNCHXL-CC26x2R is a multi-protocol LaunchPad that operates at 2.4GHz. The RF front end enables up
to +5dBm of output power. LAUNCHXL-CC26x2R can also be used for development with CC2642R.
Featured device: CC2652R
ISM band: 2.4GHz
Antenna: 2.4GHz Inverted F Antenna
RF front end: Differential, internal bias
Design files: CC26x2R LaunchPad Design Files
1.2.3 LP-CC26x1
The LP-CC26x1 is a multi-protocol LaunchPad that operates at 2.4GHz. The LaunchPad comes in two versions:
LP-CC2651R3 which enables up to +5dBm of output power and LP-CC2651P3 which enables up to +20dBm of
output power.
Featured device CC2651R3 and CC2651P3
ISM band 2.4GHz
Antenna 2.4GHz Inverted F Antenna
RF Front End Differential, external bias
Design Files LP-CC26x1 LaunchPad Design Files
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1.3.2 LAUNCHXL-CC1350-4
The LAUNCHXL-CC1350-4 is a dual-band LaunchPad that operates between 433MHz or 2.4GHz. The
sub-1GHz path enables up to +15dBm of output power, and the 2.4GHz path enables up to +9dBm of output
power. Both paths share a dual-band antenna optimized for both frequency bands.
Featured device: CC1350
ISM band: 433MHz and 2.4GHz
Antenna: • Miniature Helical PCB Antenna for 868MHz or 915/920MHz
• 2.4GHz Inverted F Antenna
1.3.3 LAUNCHXL-CC1352R
The LAUNCHXL-CC1352R is a dual-band LaunchPad that operates between 868MHz/915MHz or 2.4GHz. The
sub-1GHz path enables up to +14dBm of output power, and the 2.4GHz path enables up to +5dBm of output
power. The current revision uses a diplexer instead of a switch to allow both frequency bands to share an RF
path, which frees up one DIO pin. Both paths share a dual-band antenna optimized for both frequency bands.
Featured device: CC1352R
ISM band: 868MHz, 915MHz, and 2.4GHz
Antenna: Monopole PCB Antenna with Single or Dual Band Option
RF front-end: Differential, external bias
Design files: CC1352R LaunchPad Design Files
1.3.4 LAUNCHXL-CC1352P1
The LAUNCHXL-CC1352P1 is a dual-band LaunchPad that operates between 868MHz/915MHz or the 2.4GHz.
The sub-1GHz has a high-power PA path enabling up to +20dBm output power, and a regular path with up to
+14dBm output power. The 2.4GHz path enables up to +10dBm output power. All three paths share a dual-band
antenna optimized for both frequency bands.
Featured device: CC1352P
ISM band: 868MHz, 915MHz, and 2.4GHz
Antenna: Monopole PCB Antenna with Single or Dual Band Option
RF front-end: Differential, external bias
Design files: CC1352R LaunchPad Design Files
1.3.5 LAUNCHXL-CC1352P-2
The LAUNCHXL-CC1352P-2 is a dual-band LaunchPad that operates between 868MHz/915MHz or 2.4GHz.
The sub-1GHz path enables up to +14dBm output power. The 2.4GHz output has a high-power PA path enabling
up to +20dBm output power, and a regular path with up to +5dBm output power. All three paths share a
dual-band antenna optimized for both frequency bands.
Featured device: CC1352P
ISM band: 868MHz, 915MHz and 2.4GHz
Antenna: Monopole PCB Antenna with Single or Dual Band Option
RF front-end: Differential, external bias
Design files: LAUNCHXL-CC1352P-2 Design Files
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1.3.6 LAUNCHXL-CC1352P-4
The LAUNCHXL-CC1352P-4 is a dual-band LaunchPad that operates between 433MHz or 2.4GHz. The
sub-1GHz path enables up to +13dBm output power. The 2.4GHz path biases the high-power PA to provide
up to +10dBm output power, and a regular that enables up to +5dBm of output power. All three paths share a
dual-band antenna optimized for both frequency bands.
Featured device: CC1352P
ISM band: 433MHz and 2.4GHz
Antenna: Monopole PCB Antenna with Single or Dual Band Option
RF front-end: Differential, external bias
Design files: LAUNCHXL-CC1352P-4 Design Files
1.3.7 LP-CC1352P7-1
The LP-CC1352P7-1 is a dual-band LaunchPad that operates between 868MHz/915MHz or 2.4GHz. The sub-1
GHz output has a high-power PA path enabling up to +20dBm output power or a regular path with up to +14dBm
output power. The 2.4GHz path enables up to +5dBm output power. All three paths share a dual-band antenna
optimized for both frequency bands.
Featured device: CC1352P7-1
ISM band: 868MHz, 915MHz and 2.4GHz
Antenna: Monopole PCB Antenna with Single or Dual Band Option
RF front-end: Differential, external bias
Design files: LAUNCHXL-CC1352P7-1 Design Files
1.3.8 LP-CC1352P7-4
The LP-CC1352P7-4 is a dual-band LaunchPad that operates between 433MHz or 2.4GHz. The sub-1 GHz
output has a high-power PA path enabling up to +20dBm output power, and a regular path with up to +14dBm
output power. The 2.4GHz path enables up to +5dBm output power. All three paths share a dual-band antenna
optimized for both frequency bands.
Featured device: CC1352P7-4
ISM band: 433MHz and 2.4GHz
Antenna: Monopole PCB Antenna with Single or Dual Band Option
RF front-end: Differential, external bias
Design files: LAUNCHXL-CC1352P7-4 Design Files
1.3.9 LP-EM-CC1354P10-6
The LP-EM-CC1354P10-6 is a dual-band LaunchPad that operates between 868MHz/915MHz or 2.4GH. The
sub-1 GHz path enables up to +14dBm output power. The 2.4GHz high-power PA path can be configured up to
+10dBm or +20dBm, and the regular path enables +5dBm of output power. All three paths share a dual-band
antenna optimized for both frequency bands.
Please note that this LaunchPad requires an LP-XDS110 debugger.
Featured device: CC1354P
ISM band: 868MHz, 915MHz, and 2.4GHz
Antenna: Monopole PCB Antenna with Single or Dual Band Option
RF front end: Differential, external bias
Design files: LP-EM-CC1354P10-6 Design Files
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2 Front-End Configurations
2.1 Overview of Front-end Configurations
CC13xx and CC26xx have the following front-end configuration:
• Single ended: Either the RF_P pin or the RF_N pin is used as the RF path.
• Differential: Both RF_P and RF_N are used as a differential RF interface.
• Internal or external bias of the LNA: The LNA can be biased by an internal or external inductor. Both types of
biasing can be selected for single-ended and differential configuration.
Figure 2-1 shows the front-end configuration. Components and connections highlighted in red color are not
required if an internal bias is used. The component values depend on the frequency band of operation.
Figure 2-1. CC13xx/CC26xx Front-End Configuration (red = Required if an External Bias is Used)
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Figure 2-2 summarizes the pros and cons of the different solutions. All numbers in the figure are compared to a
differential front-end and external biasing.
where, x = 1 configures the PA output on RFP and x = 2 configures the PA output on RFN.
For single-ended operation, the pin set by CMD_RADIO_SETUP Config.frontEndMode will be used in RX and
the pin set by the ADI_HALFREG_OVERRIDE override will be used in TX.
The LNA biasing is set in the CMD_RADIO_SETUP command:
• config.biasMode = 0: Internal bias
• config.biasMode = 1: External bias
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3 Schematic
3.1 Schematic Overview
Figure 3-1 shows the RF section and components discussed.
VDDS
nRESET U1A
13
VDDS2 C11
22
JTAG_TMS 24 VDDS3 44 3.6pF
C351 JTAG_TCK 25 JTAG_TMSC VDDS 34
35 JTAG_TCKC VDDS_DCDC 45 1 2
0.1uF RESET_N VDDR 48
DCDC_SW 33 VDDR_RF 1 L12 L13 L14 C15
DCDC_SW 1 7.5nH
RF_P L11 1 2 1 2
4 2
Y1 5 X32K_Q1 RF_N 3 27nH
C22 6.8nH 6.8nH
X32K_Q2 RX_TX
2 C12 C13 C14 100pF
23 46
32.768kHz 49 DCOUPL X48M_N 47 1 2.7pF 6.2pF 3pF
C41 C51 EGP X48M_P
C231
12pF 12pF L21 3.6pF
1uF CC1312R1F3RGZ
7.5nH
2
Y2 C21
48MHz 100pF
1 3
C473 2 4 C461
7.5pF 7.5pF
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3.1.3 Balun
A balun is a network that transforms from a balanced (differential) to an unbalanced (single-ended) signal. The
design is a lumped, lattice-type LC that has a ±90° phase shift implemented by using a low-pass filter and a
high-pass filter. It is important to keep the balun as symmetrical as possible. If only one of the RF pins is used for
RF output/input, no balun is required. In this case a filter is required between the chip and the antenna. For more
details, see Section 2.3.
3.1.4 Filter
An LC filter is placed between the balun and the antenna. The filter has two functions: attenuate harmonics
and perform an impedance transformation to 50Ω. The latter is important since measuring equipment, such
as spectrum analyzers and RF signal generators, have a port impedance of 50Ω. The word "filter balun" is
sometimes used to describe all the components necessary to implement a balun, filter and to ensure proper
impedance matching between the radio and the antenna.
3.1.5 RX_TX Pin
This pin is not present on all CC26x0/CC13x0 and CC26x2/CC13x2 devices. This pin provides a ground
connection in RX mode. This is referred to an external bias and improves sensitivity by approximately 1dB
compared to internally biasing of the LNA.
3.1.6 Decoupling Capacitors
In the reference design there are several decoupling capacitors. The schematic indicates which supply pin the
decoupling capacitor needs to be placed close to.
VDD_EB VDDS VDDS Decoupling Capacitors VDDR VDDR Decoupling Capacitors
FL1 L331
Pin 13 Pin 22 Pin 44 Pin 34 DCDC_SW Pin 45 Pin 48
BLM18HE152SN1 6.8uH
C1 C131 C221 C441 C341 C342 C331 C451 C481
22uF 0.1uF 0.1uF 0.1uF 22uF 0.1uF 22uF 0.1uF 0.1uF
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4 PCB Layout
4.1 Board Stack-Up
It is important that the distance from the top layer to the ground layer matches the reference design. Deviating
from the recommended board stack-up can change the parasitics and can in some cases lead to a re-design of
the filter balun.
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Option A
A fully enclosed shield is generally the lower cost option to help used to reduce harmonics, but all traces must
either be contained with the shield or routed out to different layer using vias. Consequentially, the RF path has
to be routed on a different layer using transition vias which must follow the reference design closely to maintain
maximum output power and minimum harmonics.
Option B
A custom, fully-enclosed shield with a single opening for the RF trace can also be used to achieve the same
performance. This option allows the RF trace to be routed on the same layer without the need for transition vias.
Note
We highly recommend EM simulations to characterize your shield cavity as variations in performance
can occur depending component density and placements.
4.4 LC Filter
The LC filter should be laid out so that crosstalk between the shunt components is minimized. Figure 4-4
shows three different layouts from worse to best. The advantage with the layout to the right is that the parasitic
inductance in the PCB track (in black) between the shunt capacitor and the series inductor is in series with the
inductor. In the middle figure, the parasitic inductance is in series with the shunt capacitor forming a series LC
circuit. The placement of C12, L13, C13, L14, and C14 in Figure 4-2 shows good design practice.
If the design cannot use the reference design as-is (for example, use of a different component size) the filter
balun will most likely have to be re-tuned. Simulate both the TI reference design and the custom design using an
electromagnetic simulator. The two designs should have the same S21/S22.
Worse Best
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The right side of Figure 4-5 that uses separate vias to ground has less noise coupling.
4.6 Placement of Crystal Load Capacitors
The main oscillation loop current is flowing between the crystal and the load capacitors. Keep this signal path
(crystal to CL1 to CL2 to crystal) as short as possible and use a symmetrical layout. Hence, both the capacitors'
ground connections should always be as close as possible. Never route the ground connection between the
capacitors or all around the crystal, because this long ground trace is sensitive to crosstalk and EMI.
4.7 Current Return Path
There needs to be a solid ground plane from the capacitor ground pad back to the chip. Figure 4-6 illustrates
this. In the bad example, notice the break in ground plane on layer 2 causing a longer return path while the
good example has no breaks. Failure to follow this can lead to reduced RF performance and higher spurious
emissions.
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5 Antenna
5.1 Single-Band Antenna
The existing antenna documentation available at TI is mainly orientated towards antennas that operate at
a single frequency. Two antenna selection guides are available: the Antenna Selection Quick Guide and a
comprehensive Antenna Selection Guide. In addition to the documentation, there is a CC-Antenna-DK2 and
Antenna Measurements Summary available on ti.com, as well, with complete documentation. All antenna
documentation that is available from TI can be accessed from the Antenna Selection Quick Guide since it
contains hyperlinks to all antenna documentation, antenna measurement reports, and all antenna reference
designs.
It is always advised to include an antenna matching network to tune and to reduce the mismatch losses of
the antenna. For a single-band antenna, the recommendation is to always include a pi-match network prior to
the antenna, see Figure 5-1. Only two of the three footprints/components are required. The impedance of the
antenna will determine if footprint/component ANT1 or ANT3 is used. ANT2 will always be used and even if the
antenna is perfectly matched, then this can just be set as a 0Ω resistor.
Antenna
ANT2
Radio
ANT1 ANT3
Lhigh Clow
Radio
Chigh Llow
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5.2.1 Dual-Band Antenna Match Example: 863-928 MHz and 2.4 GHz
This example is based on LaunchPad-CC1352P1.
• Assemble LHIGH: 0Ω and CLOW : 0Ω; CHIGH: NC and LLOW : NC
• Measure initial impedance with a network analyzer (VNA) at the low-band (868MHz) and high-band
(2440MHz)
– 868MHz: 54 + j30, VSWR: 1.78:1
– 2.44GHz: 14 - j32, VSWR: 5.05:1 (This is not required at this stage but included for documentation
purposes to note the delta).
• Match the low-band with only the CLOW and LLOW components
– CLOW: 5.6pF and LLOW: NC; see Figure 5-3
Figure 5-3. Matching the Low-Band With CLOW: 5.6pF and LLOW: NC
• Confirm the low-band is matched by measuring the impedance again:
– 868MHz: 42 + j2, VSWR: 1.18:1. Good match at the low-band
– 2.44GHz: 16+j34, VSWR: 5.38:1
• Match the high-band with only the CHIGH and LHIGH components
– LHIGH : 2.2nH and CHIGH: NC; see Figure 5-4
Figure 5-4. Matching the High-Band With an Ideal Value of LHIGH: 2.2nH and CHIGH: NC
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• LHIGH : 2.2nH was not sufficient when measured and a value of 3.3nH was used instead. The antenna
match components are based on ideal components with no parasitics. The match is not ideal but the CHIGH
component could not be used due to the impedance position in the Smith chart.
• Measure final impedance with a network analyzer (VNA) at the low-band (868MHz) and high-band
(2440MHz),
– 868MHz: 37 + j8, VSWR: 1.36:1 Good match at the low-band
– 2.44GHz: 16+j8, VSWR: 3.18:1 Reasonable match at the high-band but would prefer VSWR < 2.00:1; see
Figure 5-5 and Figure 5-6.
Figure 5-5. Smith Chart With Final Match Values of LHIGH: 3.3nH and CLOW: 5.6pF
Figure 5-6. VSWR Chart With Final Match Values of LHIGH: 3.3nH and CLOW: 5.6pF
• With the matching components, the antenna match was improved by:
– 868MHz: VSWR: 1.78:1 –> 1.36:1
– 2.44GHz: VSWR: 5.05:1 –> 3.18:1
The example shown above used a low-band of 868MHz but a main requirement of the LaunchPad-CC1352P-1
was for good operation for the complete 863 – 928MHz band since it was important to cover both ETSI
(863-870MHz) and FCC bands (902-928MHz). The antenna length on CC1352P1 has a natural resonance of
approximately 900MHz with no matching components.
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If the performance at 2.44GHz is more important than supporting both 868MHz and 915MHz ISM bands, then
the length of the antenna can be increased so the natural resonance will be around 813MHz (2440MHz/3). This
would give very good performance at 868 MHz and 2.4GHz but the 915MHz band would suffer. A common
antenna match for dual-bands is a compromise of performance between the high-band and low-band.
5.2.2 Dual-Band Antenna Match: 433-510MHz and 2.4GHz
This antenna design is based on LaunchPad-CC1352P-4 that uses the 433MHz to 930MHz and 2.4GHz BOM
Tunable PCB Antenna. This BOM Tunable Antenna is fully documented 433 to 930-MHz and 2.4-GHz BOM
Tunable PCB Antenna, application note.
In order to cover the frequency band 433 – 510MHz, an external component (LANT) is added to the antenna
structure normally used for 863-928MHz and 2.4GHz. This is required to keep the antenna relatively small and
to maintain a high efficiency. The LANT component extends the length of the antenna structure with the extra
inductance added. It is difficult to cover the entire frequency band of 433 – 510MHz with just one BOM due to the
wide bandwidth so the frequency range is divided up into the several regions. An additional antenna structure
has also been added that also extends the length of the standard antenna, see Figure 5-7.
Value of LANT component for 433-510MHz operation:
• 51nH: 433MHz
• 39nH: 470MHz
• 33nH: 490MHz
Figure 5-7. Recommended Antenna Match Network for Dual-Band Antennas (433-510MHz and 2.4GHz)
Once the LANT component has been chosen then the matching procedure is similar as shown in the previous
example. After the antenna matching process, the final values of the antenna match components can be fixed.
As can be seen in Figure 5-8, the matching of 490MHz and 2.4GHz are both below VSWR 1.90 :1, which are
good results.
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Figure 5-8. VSWR Chart with Final Match Values of LANT: 33nH LHIGH: 3.9nH and CLOW: 0 Ω
Matching the antenna should be performed in the final casing of the product including all surrounding
components such as batteries, displays, and so forth. Casing can affect the antenna’s resonance even if the
material choice is plastic. The positioning of the antenna or body effects will also affect the antenna’s resonance.
The antenna is always detuned by a shift downwards in frequency. Therefore, if there are two different
environments for the antenna such as handheld and stand-alone on a wooden desk, then it is preferable to
have the stand-alone resonance slightly higher so the antenna’s bandwidth can be utilized when detuned by
body effects/metal objects, and so forth.
6 Crystal Tuning
6.1 CC13xx/CC26xx Crystal Oscillators
The CC13xx/CC26xx devices have two crystal oscillators as shown in Figure 6-1. The high frequency crystal
oscillator (HFXOSC), running at 24MHz for CC13x0/CC26x0 and 48MHz for CC13x2/CC26x2, is mandatory to
operate the radio. The low frequency crystal oscillator (LFXOSC) is used for RTC timing and only required when
accurate RTC timing is necessary, for example for synchronous protocols such as Bluetooth Low Energy. For
more details, please see The Crystal Selection Guide.
U1A
13
VDDS2 22
24 VDDS3 44
25 JTAG_TMSC VDDS 34
35 JTAG_TCKC VDDS_DCDC 45
RESET_N VDDR 48
33 VDDR_RF
DCDC_SW 1
4 RF_P 2
Y1 5 X32K_Q1 RF_N 3
X32K_Q2 RX_TX
23 46
32.768kHz 49 DCOUPL X48M_N 47
C41 C51 EGP X48M_P Y2
12pF 12pF 48MHz
CC1312R1F3RGZ
1 3
2 4
Both crystal oscillators are pierce type oscillators are shown in Figure 6-2. In this type of oscillator, the crystal
and the load capacitors form a pi-filter providing a 180° phase shift to the internal amplifier keeping the oscillator
locked at the specified frequency. For this frequency to be correct, the load capacitance must be dimensioned
properly based on the crystal´s capacitive load (CL) parameter.
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U1
R1
CL1 CL2
A key difference between the oscillators is that the high frequency oscillator has internal variable load
capacitance inside the IC and does in most cases not require external load capacitors. For details on when
it is required to use external capacitors instead of the internal variable load capacitance, see Section 3.1.1. The
low frequency oscillator on the other hand needs to have external capacitors to operate properly.
6.2 Crystal Selection
When selecting a crystal part, it is important to look at the device-specific CC13xx/CC26xx data sheets that lists
requirements for the crystal parameters. All of these requirements must be fulfilled to ensure proper operation of
the oscillator(s) and proper operation of the device.
6.3 Tuning the LF Crystal Oscillator
The frequency of the 32kHz crystal oscillator is set by properly dimensioning the load capacitors relative to the
crystal´s wanted load capacitance, CL. From the crystal´s point of view, the two capacitors are placed in series,
which means that the “resistor parallel” equation to calculate the resulting total capacitance must be used. Also
keep in mind that the PCB traces and the pads add some parasitic capacitance. Equation 2 shows how to
calculate the right load capacitance value.
#include <driverlib/aon_ioc.h>
IOCPortConfigureSet(IOIDn, IOC_PORT_AON_CLK32K, IOC_STD_OUTPUT);
AONIOC32kHzOutputEnable();
#ifndef SET_CCFG_MODE_CONF_XOSC_CAP_MOD
// #define SET_CCFG_MODE_CONF_XOSC_CAP_MOD 0x0 // Apply cap-array delta
#define SET_CCFG_MODE_CONF_XOSC_CAP_MOD 0x1 // Don't apply cap-array delta
#endif
#ifndef SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA
#define SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA 0xFF // Signed 8-bit value, directly
modifying trimmed XOSC cap-array value
#endif
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The SET_CCFG_MODE_CONF_XOSC_CAP_MOD defines tells the system whether it should use the default
value or use an offset from the default value set by SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA.
The default cap-array values are 9pF for CC13x0/CC26x0 QFN, 5pF for CC2640R2F WCSP, and 6.7pF for
CC13x2/CC26x2.
The cap-array delta value is an offset from the default value that can be either negative or positive. Table 6-1
shows the resulting total capacitance measured on an evaluation board versus cap-array delta values. Note that
the resulting capacitance value includes parasitic capacitances, which is why the lowest setting is not 0pF. Using
a delta value equal to or lower than the most negative value in the table completely disables the internal load
capacitor array.
The best way to measure the accuracy of the HF crystal oscillator is to output an unmodulated carrier wave from
the radio and measuring the frequency offset from the wanted frequency using a spectrum analyzer. The relative
offset of crystal frequency, typically stated in Parts per Million (ppm), is the same as the relative offset of the RF
carrier.
For testing purposes cap-array delta values can be adjusted in SmartRF™ Studio. This simplifies tuning greatly
by allowing on-the-fly updates of the load capacitance. The optimum value found in SmartRF Studio can then be
entered into CCFG in the applicable software project.
Table 6-1. Cap-Array Delta
Measured
CCFG Delta Value CCFG Delta Value CCFG Delta Value CCFG Delta Value CCFG Delta Value
Capacitance on
for CC13x0/CC26x0 for CC2640R2F for CC13x1/CC26x1 for CC13x2/CC26x2 for CC13x4/CC26x4
Reference Board
QFN WCSP QFN QFN QFN
(pF)
2.1 < -55 < -28 < -40 < -40 < -40
2.1 -55 -28 -40 -40 -40
2.2 -54 -27 -39 -39 -39
2.3 -53 -26 -38 -38 -38
2.4 -52 -25 -37 -37 -37
2.5 -51 -24 -36 -36 -36
2.6 -50 -23 -35 -35 -35
2.7 -49 -22 -34 -34 -34
2.7 -48 -21 -33 -33 -33
2.8 -47 -20 -32 -32 -32
2.9 -46 -19 -31 -31 -31
3.0 -45 -18 -30 -30 -30
3.1 -44 -17 -29 -29 -29
3.2 -43 -16 -28 -28 -28
3.3 -42 -15 -27 -27 -27
3.4 -41 -14 -26 -26 -26
3.4 -40 -13 -25 -25 -25
3.6 -38 -12 -24 -24 -24
3.7 -37 -11 -23 -23 -23
3.8 -36 -10 -22 -22 -22
3.9 -35 -9 -21 -21 -21
4.0 -34 -8 -20 -20 -20
4.1 -33 -7 -19 -19 -19
4.3 -32 -6 -18 -18 -18
4.4 -31 -5 -17 -17 -17
4.5 -30 -4 -16 -16 -16
4.6 -29 -3 -15 -15 -15
4.7 -28 -2 -14 -14 -14
4.8 -27 -1 -13 -13 -13
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7 TCXO Support
CC13x0 and CC26x0 do not support a TCXO as clock source. The CC13x2 family of devices has support for
TCXO. Two types of TCXO are supported: clipped sine wave and CMOS output. The TCXO output should be
connected to the X48M_P input. If a clipped sine wave type is used, a series cap is required since internal
common mode bias is used in this case. The data sheet for the selected TCXO should be checked for the
recommended value for the series cap.
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7.1 Hardware
For reference design, see the design files for the CC1312R Launchpad. It is important that the TCXO comply
with the requirements in the data sheet. Note the maximum output voltage.
7.2 Software
SDK version 4.10 or newer has to be used. TCXO usage is enabled in syscfg. Under TI Devices → Device
Configuration, select External 48MHz TCXO as HF Clock source. When TCXO is selected as source, select the
TCXO type and the TCXO Max Startup Time. It is important that this time is set correctly. If a too short time
is set, the chip could attempt to switch to the TCXO before this is stable, which again could cause the chip to
malfunction.
When a TCXO is used, the internal load capacitors have to be reduced to avoid loading the TCXO. The required
setting will be dependent on the selected TCXO. Turning off the capacitor array could cause the output swing to
be too large from some TCXOs. In these cases, the capacitor in the capacitor array will help reducing the voltage
swing. The capacitor array should be set to a value where the swing on the X48M_P is within the value set in the
CC13x2 data sheet, both for minimum and maximum swing. Care has to be taken when doing the measurement
to avoid that the measurement does not increase the load on this node, which will impact the measurement
result.
In syscfg go to TI Devices → Device Configuration and tick the box next to “Enable XOSC Cap array
modification” and set the wanted value.
The power driver contains a function hook PowerCC26X2_Config.enableTCXOFxn that has to be added to the
code. If this function is not defined, the code will compile but it will hang when the system requests the radio to
turn on. The function hook makes it possible to power the TCXO from a DIO and turn off the TCXO when the
CC13x2 is in standby and turn it on again in time for a RF operation.
The following code snippet show how this function can look when the TCXO is powered by a DIO:
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in addition to the requested gain and IB setting.Based on the readout from the temperature sensor and the
temperature coefficient setting the IB is adjusted. IB is adjusted based on Equation 3.
A custom TX power table should be generated by the following method (to obtain constant Tx power over
temperature for a certain Tx parameter value):
1. Room temp setting: Adjust the gain and IB setting to get the requested output power level at room
temperature with temperature compensation disabled. This setting will be the Ib_requested.
2. Low temp setting: Use the same gain setting and adjust the IB setting to get the closest output power level
from step 1 at low temperature. This setting will be the Ib_low_temp.
3. High temp setting: Use the same gain setting and adjust the IB setting to get the closest output power level
from step 1 at high temperature. This setting will be the Ib_high_temp.
4. Calculate temp coefficient. Use the IB settings from the low and high temperature measurements to
calculate the temperature coefficients. The temp coefficient is based on a linear approximation between
the two temperature extremes and calculated as shown in Equation 4.
Ib_ℎigℎ_temp − Ib_low_temp
temp_coeff = 256 · ℎigℎ_temp − low_temp (6)
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Note
The VDDS_DCDC pin is not present on all devices.
Maximum efficiency is obtained by using the internal DC/DC converter, and it requires an external inductor
(LDCDC) and capacitor (CDCDC). The components should be placed as close as possible to the CC13xx/
CC26xx device and it is important to have a short current return path for from the CDCDC ground to the
pad on the chip (see Section 4.8). In addition, the bulk capacitor on VDDS should be placed close to the
VDDS_DCDC-pin. The actual value of LDCDC, CDCDC and CBULK vary from device to device. For the actual
values, see the device-specific reference design.
When operating in DC/DC mode, the power system dynamically switches between the Global LDO and DC/DC
converter depending on the required load to achieve maximum efficiency. If VDDS drops below 2.0V, the DC/DC
converter will be less efficient than the LDO and the device will run in global LDO mode. For systems operating
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with VDDS less than 2.0V, consider either global LDO or external regulator mode to save component cost and
board area.
The software setup required to use the DCDC converter or the GLDO operation is done in the Customer
Configuration (CCFG) register bank.
For devices that use SDK up to version 5.x (CC2640R2), the settings below must be made to the file ccfg.c.
#ifndef SET_CCFG_MODE_CONF_DCDC_RECHARGE
#define SET_CCFG_MODE_CONF_DCDC_RECHARGE 0x0 // Use the DC/DC during recharge in powerdown
// #define SET_CCFG_MODE_CONF_DCDC_RECHARGE 0x1 // Do not use the DC/DC during recharge in
powerdown
#endif
#ifndef SET_CCFG_MODE_CONF_DCDC_ACTIVE
#define SET_CCFG_MODE_CONF_DCDC_ACTIVE 0x0 // Use the DC/DC during active mode
// #define SET_CCFG_MODE_CONF_DCDC_ACTIVE 0x1 // Do not use the DC/DC during active mode
#endif
For devices that use SDK version 6.x and above, this is set up in the section TI DEVICES followed by Device
Configuration of the Sysconfig file as indicated in the following image.
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Note
The VDDS_DCDC pin is not present on all devices.
To save cost and PCB area the DC/DC inductor can be removed and VDDR can be supplied from the Global
LDO at the cost of higher power consumption. In this mode a bulk capacitor on VDDR is still required and should
be placed close to the VDDR pin. The VDDS_DCDC-pin must be connected to VDDS and the DCDC_SW
should be left floating to avoid short circuiting VDDS if the DC/DC converter is mistakenly enabled from software.
The VDDS bulk capacitor does not need to be close to the VDDS_DCDC pin and should rather be placed close
to the VDDS pin.
The software setup required to use the DCDC converter or the GLDO operation is done in the Customer
Configuration (CCFG) register bank.
For devices that use SDK up to version 5.x (CC2640R2), the settings below must be made to the file ccfg.c.
#ifndef SET_CCFG_MODE_CONF_DCDC_RECHARGE
// #define SET_CCFG_MODE_CONF_DCDC_RECHARGE 0x0 // Use the DC/DC during recharge in powerdown
#define SET_CCFG_MODE_CONF_DCDC_RECHARGE 0x1 // Do not use the DC/DC during recharge in
powerdown
#endif
#ifndef SET_CCFG_MODE_CONF_DCDC_ACTIVE
// #define SET_CCFG_MODE_CONF_DCDC_ACTIVE 0x0 // Use the DC/DC during active mode
#define SET_CCFG_MODE_CONF_DCDC_ACTIVE 0x1 // Do not use the DC/DC during active mode
#endif
For devices that use SDK version 6.x and above, this is set up in the section TI DEVICES followed by Device
Configuration of the Sysconfig file as indicated in the following image.
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VDDS3
CDEC
IOs
VDDS_DCD
C
AON_VD
DCDC_SW
MCU_VD
DC/DC Converter
VDDR
CDEC
CDEC VDDR_RF
Oscillators
RF LDOs
CDEC/BULK DCOUPL
~1.28 V
In external regulator mode, neither the Global LDO nor the DC/DC is active and both VDDS and VDDR must
be powered from the same rail. The regulators are disabled by connecting VDDS_DCDC to ground. Note that
the maximum voltage level on the external regulator is limited by VDDR and should not exceed the absolute
maximum rating defined in the device-specific data sheet. To achieve maximum output power for the sub-1GHz
PA, the supply voltage should be set to 1.95V.
Note
External Regulator Mode is only supported on CC26x0 devices.
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12 Board Bring-Up
Before starting to develop software or doing range testing, It is recommended to do conducted measurements
to verify that the board has the expected performance. Typically, the sensitivity, output power, harmonics, and
current consumption should be measured to verify the hardware design.
The required measurements depend on the type of board and application. If it is a design with 10m range
requirement the checkout does not need to be as detailed as for a design with a range extender. For the latter,
and other designs that require high performance, having access to a spectrum analyzer and a signal generator
with the option to send RF packets is highly recommended.
Different measurement methods are discussed in the following sections. It is up to the reader to select the
methods applicable for their board.
12.1 Power On
When powering on the board for the first time, check that the voltages on the following pins are as expected.
CC13xx and CC26xx
• VDDR = 1.68 V for CCFG_FORCE_VDDR_HH = 0
• VDDR = 1.95 V for CCFG_FORCE_VDDR_HH = 1
• DCOUPL = 1.27 V
Do NOT measure directly on the X24M_P and X24M_N nor X48M_P and X48M_N pins since this could brick the
device.
12.2 RF Test: SmartRF Studio
In order to use SmartRF Studio for testing, the board needs a connector that enables a debugger to be
connected directly to the RF chip:
• For the CC13xx and CC26xx, an XDS100v3, XDS110 or XDS200 should be used.
The required pins in cJTAG-mode are VDDS, GND, RESET, TCK and TMS.
1. Connect a debugger to the board. Open SmartRF Studio and verify that the device is visible in the list of
connected devices.
2. Place two good known boards with 2m distance. In this context “good known boards“ are EM’s or
LaunchPads from TI. Use a predefined PHY setting in SmartRF Studio that is a closest match to the PHY
that will be used in the final product
3. Set one board to PacketRX and the other to PacketTX and transmit 100 packets. Confirm that the packets
are received and note the RSSI for the received packets.
4. Replace the board used in TX with the device under test (DUT). Repeat the test described in 3.
5. Replace the board used in RX with the DUT. Replace the board used in TX with a good known board.
Repeat the test described in 3.
6. If possible, the measurements should be done with a good known antenna first and then repeated with the
antenna that is going to be used in the final design later. A poorly tuned antenna could cause a significant
loss in sensitivity/output power.
7. If the results are satisfactory, change the settings from the predefined setting to the RF settings planned to
be used in the final product. Repeat the tests described in 3 to 5 with the wanted RF settings.
If the RSSI deviates from the reference, the schematic and layout should be reviewed. Note that if the network
between the RF ports and the antenna on the customer board is different from the TI evaluation board, the
losses due to SAW filters and switches must be to be taken into consideration.
12.3 RF Test: Conducted Measurements
For high performance designs it is highly recommended to perform conducted measurements to verify the
performance before setting up an RF link.
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12.3.1 Sensitivity
1. Disconnect the antenna and perform conducted measurements at the SMA connector or solder a semi rigid
coax cable at the 50Ω point.
2. Configure the board under test and use the PacketRX option in SmartRF Studio similar to the test described
in Section 12.2. In PacketRX mode, you can set an expected packet count.
3. Preferred: Use a signal generator that is capable of transmitting data packets. Remember to set up the sync
word and CRC correctly.
4. If a signal generator is not available, use an EM/LaunchPad as a transmitter. Use coax cables and
attenuation between the EM/LauncPad SMA connector and the 50Ω point on the custom board. It is difficult
to get an accurate number using this method since the exact values of output power and attenuation
are normally not known. Some energy will also travel over the air from the EM to the DUT. In addition,
background noise could impact the results. To get more accurate results, the receiver should be placed in a
shielded box.
5. SmartRF Studio will calculate the packet error rate (PER) and bit error rate (BER).
If the wanted RF settings are different from the predefined setting, PER vs level should be run in addition. The
input power level should be increased in 1- 2dB steps from the sensitivity limit to around 0 dBm. For each power
level, transmit at least 100 packets and record the PER. If the AGC settings are not optimal it is common that the
PER for some of the steps will be above 0 (residual PER) and if that is the case the AGC settings have to be
reviewed.
If the conducted sensitivity is poor:
• Are the settings the same as the recommended values from SmartRF Studio? If the sensitivity is good when
using SmartRF Studio and not with the settings used for the project the settings have to be reviewed.
• What is the frequency difference between the DUT and the signal source? Frequency offset can be measured
by transmitting an un-modulated continuous wave
• Is the schematic, including all component values, in accordance with the reference design?
• Is the layout in accordance with the reference design?
12.3.2 Output Power
1. Disconnect the antenna and perform conducted measurements at the SMA connector or solder a semi-rigid
coax cable at the 50Ω point.
2. Preferred: Use a spectrum analyzer (SA). Use 1MHz RBW for measuring output power.
3. If an SA is not available use an EM or Launchpad with a SMA connection point. Use coax cables and
attenuation between the EM/LaunchPad SMA connector and the 50Ω point on the custom board. Use
SmartRF Studio and set the EM/Launchpad in continuous RX and read the RSSI. Note that the RSSI has a
given tolerance so the measurement will not be as accurate as the preferred method.
12.4 Software Bring-Up
For CC13xx:
Basic examples for RF and other drivers can be found under TI Drivers under software -> Examples ->
Development Tools -> <Development board in question> at http://dev.ti.com/tirex/#/. Before starting to write own
software it is recommended to run the RF examples that are closest to the wanted application unmodified and
verify that they work. Then, if required, change the RF settings to the wanted data rate, and so forth.
For CC26xx and Bluetooth Low Energy:
For more information, see Initial Board Bring Up on recommended software images to run initially.
Basic examples for RF and other drivers can be found under TI Drivers under software -> Examples ->
Development Tools -> <Development board in question> at https://dev.ti.com/tirex/#/.
12.5 Hardware Troubleshooting
This section covers some of the common causes for poor performance.
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For FSK the signal bandwidth can be approximated as data rate + 2*frequency deviation (Carson’s rule).
For CC13x0: For low data rates, the bit repetition patch CC13x0 Low Data Rate Operation should be used. If this
patch is not used, the frequency offset tolerance could be under 10 ppm, which could cause loss of link with a
normal crystal tolerance.
12.5.3 Poor Link: Antenna
An antenna needs a matching network in order to tune and reduce the mismatch losses of the antenna. If the
antenna is not tuned, energy will be lost both in TX and RX and the link budget will be lower. For more details,
see Section 5.
12.5.4 Bluetooth Low Energy: Device Does Advertising But Cannot Connect
If using the 32kHz crystal oscillator as RTC source:
• Incorrect load capacitors for the 32.768kHz crystal – causes frequency offset
• 32kHz crystal does not start up (incorrect load capacitors, crystal missing, soldering issues) – the device
defaults to run the RTC from the 48MHz RC oscillator at 31.25kHz. For more information, see the PRCM
chapter in the CC13x0, CC26x0 SimpleLink™ Wireless MCU and C13x2, CC26x2 SimpleLink™ Wireless
MCU technical reference manuals.
If using the 32kHz RC oscillator as RTC source:
• Calibration is not configured correctly. For more information, see the Bluetooth Low Energy Stack User's
Guide that is provided with the SDK.
Incorrect RTC frequency will lead to the device missing the connection events and thus breaking the link with the
central device.
To debug this problem, the 32kHz clock can be output on an I/O pin and measured with a frequency counter.
For more information on how to do this, see the I/O chapter in the CC13x0, CC26x0 SimpleLink™ Wireless MCU
and C13x2, CC26x2 SimpleLink™ Wireless MCU technical reference manuals. By outputting the clock on a pin,
you will always measure the _selected_ RTC clock source, as well as be able to measure without affecting the
clock source (which probing the crystal for example will do).
If using a 32.768kHz crystal make sure the crystal part is within the requirements outlined in the device-specific
CC13xx/CC26xx data sheets. Also make sure that the load capacitors are dimensioned properly as shown in
Section 6.3.
Verify that the BLE-Stack has been configured with the correct Sleep Clock Accuracy. The default setting is
40ppm and can be adjusted with the HCI_EXT_SetSCACmd API, see hci.h or the TI Vendor Specific API Guide
included in the SDK.
12.5.5 Poor Sensitivity: DCDC Layout
It is highly recommended to follow the reference design when it comes to the components connected to the
DCDC_SW pin. The shunt capacitor following the series inductor from the DCDC_SW pin has to have a short
return path to chip ground from the ground pad (see Section 4.8). A poor DCDC layout could cause more than
5dB loss in sensitivity. To check if the sensitivity is limited by the DCDC, turn off the DCDC in the CCFG.c file.
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References www.ti.com
• Texas Instruments, C13x2, CC26x2 SimpleLink™ Wireless MCU Technical Reference Manual
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14 Revision History
Changes from Revision G (September 2022) to Revision H (May 2024) Page
• Updated the numbering format for tables, figures, and cross-references throughout the document ................ 1
• Added LP-CC26x1 .............................................................................................................................................3
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