COMPUTER ORGANIZATION AND DESIGN
RISC-V
Edition
The Hardware/Software Interface
Chapter 1
Computer Abstractions
and Technology
§1.6 Performance
1.6 Defining Performance
Which airplane has the best performance?
Boeing 777 Boeing 777
Boeing 747 Boeing 747
BAC/ Sud BAC/ Sud
Concorde Concorde
Douglas Douglas DC-
DC-8-50 8-50
0 100 200 300 400 500 0 2000 4000 6000 8000 10000
Passenger Capacity Cruising Range (miles)
Boeing 777 Boeing 777
Boeing 747 Boeing 747
BAC/ Sud BAC/ Sud
Concorde Concorde
Douglas Douglas DC-
DC-8-50 8-50
0 500 1000 1500 0 100000 200000 300000 400000
Cruising Speed (mph) Passengers x mph
Chapter 1 — Computer Abstractions and Technology — 2
1.6 Response time & throughput
Response time
How long it takes to do a task
Throughput
Total work done per unit time
e.g., tasks/transactions/… per hour
How are response time and throughput affected
by
Replacing the processor with a faster version?
Adding more processors?
We’ll focus on response time for now…
Chapter 1 — Computer Abstractions and Technology — 3
1.6 Relative Performance
Define Performance = 1/Execution Time
“X is n time faster than Y”
Performance X /Performance Y
Execution time Y /Execution time X =n
Example: time taken to run a program
10s on A, 15s on B
Execution TimeB / Execution TimeA
= 15s / 10s = 1.5
So A is 1.5 times faster than B
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1.6 Measuring Execution Time
Elapsed time
Total response time, including all aspects
Processing, I/O, OS overhead, idle time
Determines system performance
CPU time
Time spent processing a given job
Discounts I/O time, other jobs’ shares
Comprises user CPU time and system CPU
time
Different programs are affected differently by
CPU and system performance
Chapter 1 — Computer Abstractions and Technology — 5
1.6 CPU Clocking
Operation of digital hardware governed by a
constant-rate clock
Clock period
Clock (cycles)
Data transfer
and computation
Update state
Clock period: duration of a clock cycle
e.g., 250ps = 0.25ns = 250×10–12s
Clock frequency (rate): cycles per second
e.g., 4.0GHz = 4000MHz = 4.0×109Hz
Chapter 1 — Computer Abstractions and Technology — 6
1.6 CPU Time
CPU Time=CPU Clock Cycles×Clock Cycle Time
CPU Clock Cycles
¿
Clock Rate
Performance improved by
Reducing number of clock cycles
Increasing clock rate
Hardware designer must often trade off clock
rate against cycle count
Chapter 1 — Computer Abstractions and Technology — 7
1.6 CPU Time Example
Computer A: 2GHz clock, 10s CPU time
Designing Computer B
Aim for 6s CPU time
Can do faster clock, but causes 1.2 × clock cycles
How fast must Computer B clock be?
Clock Cycles B 1 .2×Clock Cycles A
Clock Rate B = =
CPU Time B 6s
Clock Cycles A =CPU Time A ×Clock Rate A
10s×2GHz=20×10 9
1. 2×20×109 24×10 9
Clock Rate B = = =4GHz
6s 6s
Chapter 1 — Computer Abstractions and Technology — 8
1.6 Instruction Count and CPI
Clock Cycles=Instruction Count ×Cycles per Instruction
CPU Time=Instruction Count ×CPI×Clock Cycle Time
Instruction Count ×CPI
¿
Clock Rate
Instruction Count for a program
Determined by program, ISA and compiler
Average cycles per instruction
Determined by CPU hardware
If different instructions have different CPI
Average CPI affected by instruction mix
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1.6 CPI Example
Computer A: Cycle Time = 250ps, CPI = 2.0
Computer B: Cycle Time = 500ps, CPI = 1.2
Same ISA
Which is faster, and by how much?
CPU Time A=Instruction Count×CPI A ×Cycle Time A
=I×2 . 0×250ps =I×500ps A is faster…
CPU Time B=Instruction Count×CPI B×Cycle Time B
=I×1 .2×500ps=I ×600ps
CPU Time B I×600ps
= =1. 2 …by this much
CPU Time A I×500ps
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1.6 CPI in More Detail
If different instruction classes take different
numbers of cycles
n
Clock Cycles=∑ (CPI i ×Instruction Count i )
i= 1
Weighted average CPI
( )
n
Clock Cycles Instruction Count i
CPI= =∑ CPI i ×
Instruction Count i=1 Instruction Count
Relative frequency
Chapter 1 — Computer Abstractions and Technology — 11
1.6 CPI Example
Alternative compiled code sequences using
instructions in classes A, B, C
Class A B C
CPI for class 1 2 3
IC in sequence 1 2 1 2
IC in sequence 2 4 1 1
Sequence 1: IC = 5 Sequence 2: IC = 6
Clock Cycles Clock Cycles
= 2×1 + 1×2 + 2×3 = 4×1 + 1×2 + 1×3
= 10 =9
Avg. CPI = 10/5 = 2.0 Avg. CPI = 9/6 = 1.5
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1.6 Performance Summary
The BIG Picture
Instructions Clock cycles Seconds
CPU Time= × ×
Program Instruction Clock cycle
Performance depends on
Algorithm: affects IC, possibly CPI
Programming language: affects IC, CPI
Compiler: affects IC, CPI
Instruction set architecture: affects IC, CPI, T c
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§1.7 The Power Wall
1.7 Power Trends
In CMOS IC technology
2
Power=Capacitive load×Voltage ×Frequency
×30 5V → 1V ×1000
Chapter 1 — Computer Abstractions and Technology — 14
1.7 Reducing Power
Suppose a new CPU has
85% of capacitive load of old CPU
15% voltage and 15% frequency reduction
2
P new C old×0 . 85×(V old ×0 . 85 ) ×F old×0 . 85
= =0 . 85 4 =0 .52
P old Cold ×V old ×F old
2
The power wall
We can’t reduce voltage further
We can’t remove more heat
How else can we improve performance?
Chapter 1 — Computer Abstractions and Technology — 15
§1.8 The Sea Change: The Switch to Multiprocessors
1.8 Uni-processor perform.
Constrained by power, instruction-level parallelism,
memory latency
Chapter 1 — Computer Abstractions and Technology — 16
1.8 Multiprocessors
Multicore microprocessors
More than one processor per chip
Requires explicitly parallel programming
Compare with instruction level parallelism
Hardware executes multiple instructions at once
Hidden from the programmer
Hard to do
Programming for performance
Load balancing
Optimizing communication and synchronization
Chapter 1 — Computer Abstractions and Technology — 17
§1.10 Fallacies and Pitfalls
Pitfall: Amdahl’s Law
Improving an aspect of a computer and
expecting a proportional improvement in
overall performance
T affected
T improved= +T unaffected
improvement factor
Example: multiply accounts for 80s/100s
How much improvement in multiply performance to
get 5× overall?
80 Can’t be done!
20= +20
n
Corollary: make the common case fast
Chapter 1 — Computer Abstractions and Technology — 18
Fallacy: Low Power at Idle
Look back at i7 power benchmark
At 100% load: 258W
At 50% load: 170W (66%)
At 10% load: 121W (47%)
Google data center
Mostly operates at 10% – 50% load
At 100% load less than 1% of the time
Consider designing processors to make
power proportional to load
Chapter 1 — Computer Abstractions and Technology — 19
Pitfall: MIPS as a Performance Metric
MIPS: Millions of Instructions Per Second
Doesn’t account for
Differences in ISAs between computers
Differences in complexity between instructions
Instruction count
MIPS=
Execution time×10 6
Instruction count Clock rate
=
Instruction count ×CPI 6 CPI×10 6
×10
Clock rate
CPI varies between programs on a given CPU
Chapter 1 — Computer Abstractions and Technology — 20
§1.11 Concluding Remarks
Concluding Remarks
Cost/performance is improving
Due to underlying technology development
Hierarchical layers of abstraction
In both hardware and software
Instruction set architecture
The hardware/software interface
Execution time: the best performance
measure
Power is a limiting factor
Use parallelism to improve performance
Chapter 1 — Computer Abstractions and Technology — 21
