Data Transfer & Manipulation

Computer provides an extensive set of instructions to give the user the flexibility to
carryout various computational task. Most computer instruction can be classified into
three categories.
(1) Data transfer instruction
(2) Data manipulation instruction
(3) Program control instruction

Data transfer instruction cause transferred data from one location to another without
changing the binary instruction content. Data manipulation instructions are those that
perform arithmetic logic, and shift operations. Program control instructions provide
decision-making capabilities and change the path taken by the program when
executed in the computer.
(1) Data Transfer Instruction
Data transfer instruction move data from one place in the computer to another
without changing the data content. The most common transfers are between memory
and processes registers, between processes register & input or output, and between
processes register themselves
(Typical data transfer instruction)

(2) Data Manipulation Instruction

It performs operations on data and provides the computational capabilities for the
computer. The data manipulation instructions in a typical computer are usually
divided into three basic types.
(a) Arithmetic Instruction
(b) Logical bit manipulation Instruction
(c) Shift Instruction.
(a) Arithmetic Instruction

Name Mnemonic
Increment INC
Decrement DEC
Add Add

Subtract Sub
Multiply MUL
Divide DIV
Add with Carry ADDC
Subtract with Basses SUBB
Negate (2’s Complement) NEG

(b) Logical & Bit Manipulation Instruction

(c) Shift Instruction

Instructions to shift the content of an operand are quite useful and one often provided
in several variations. Shifts are operation in which the bits of a word are moved to the
left or right. The bit-shifted in at the and of the word determines the type of shift used.
Shift instruction may specify either logical shift, arithmetic shifts, or rotate type shifts.
Introduction About Program Control:-

A program that enhances an operating system by creating an environment in which

you can run other programs. Control programs generally provide a graphical
interface and enable you to run several programs at once in different windows.
Control programs are also called operating environments.
The program control functions are used when a series of conditional or
unconditional jump and return instruction are required. These instructions allow the
program to execute only certain sections of the control logic if a fixed set of logic
conditions are met. The most common instructions for the program control available
in most controllers are described in this section.

Introduction About status bit register:-

A status register, flag register, or condition code register is a collection of
status flag bits for a processor. An example is the FLAGS register of the computer
architecture. The flags might be part of a larger register, such as a program status
word (PSW) register.

The status register is a hardware register which contains information about the
state of the processor. Individual bits are implicitly or explicitly read and/or written
by the machine code instructions executing on the processor. The status register in a
traditional processor design includes at least three central flags: Zero, Carry, and
Overflow, which are set or cleared automatically as effects of arithmetic and bit
manipulation operations. One or more of the flags may then be read by a subsequent
conditional jump instruction (including conditional calls, returns, etc. in some
machines) or by some arithmetic, shift/rotate or bitwise operation, typically using the
carry flag as input in addition to any explicitly given operands. There are also
processors where other classes of instructions may read or write the fundamental
zero, carry or overflow flags, such as block-, string- or dedicated input/output
instructions, for instance.
Some CPU architectures, such as the MIPS and Alpha, do not use a dedicated flag
register. Others do not implicitly set and/or read flags. Such machines either do not
pass implicit status information between instructions at all, or do they pass it in a
explicitly selected general purpose register.

A status register may often have other fields as well, such as more specialized
flags, interrupt enable bits, and similar types of information. During an interrupt, the
status of the thread currently executing can be preserved (and later recalled) by
storing the current value of the status register along with the program counter and
other active registers into the machine stack or some other reserved area of memory.

Common flags:-

This is a list of the most common CPU status register flags, implemented in almost all
modern processors.
Introduction About Conditional branch instruction:-
Conditional branch instruction:-

Conditional branch instruction is the branch instruction bit and BR instruction is the
Program control instruction.

The conditional Branch Instructions are listed as Bellow:-

Unsigned Compare(A-B):-
Signed Compare(A-B):

Introduction About program interrupt:-

When a Process is executed by the CPU and when a user Request for another Process
then this will create disturbance for the Running Process. This is also called as
the Interrupt.

Interrupts can be generated by User, Some Error Conditions and also by

Software’s and the hardware’s. But CPU will handle all the Interrupts very carefully
because when Interrupts are generated then the CPU must handle all the Interrupts
Very carefully means the CPU will also Provide Response to the Various Interrupts
those are generated. So that When an interrupt has Occurred then the CPU will handle
by using the Fetch, decode and Execute Operations.

Interrupts allow the operating system to take notice of an external event, such
as a mouse click. Software interrupts, better known as exceptions, allow the OS to
handle unusual events like divide-by-zero errors coming from code execution.

The sequence of events is usually like this:

Hardware signals an interrupt to the processor

The processor notices the interrupt and suspends the currently running software
The processor jumps to the matching interrupt handler function in the OS
The interrupt handler runs its course and returns from the interrupt
The processor resumes where it left off in the previously running software
The most important interrupt for the operating system is the timer tick interrupt. The
timer tic interrupt allows the OS to periodically regain control from the currently
running user process. The OS can then decide to schedule another process, return back
to the same process, do housekeeping, etc. The timer tick interrupt provides the
foundation for the concept of preemptive multitasking.
TYPES OF INTERRUPTS

Generally there are three types of Interrupts those are Occurred For Example
1) Internal Interrupt
2) External Interrupt.
3) Software Interrupt.

1.Internal Interrupt:
• When the hardware detects that the program is doing something wrong, it will
usually generate an interrupt usually generate an interrupt.
– Arithmetic error - Invalid Instruction
– Addressing error - Hardware malfunction
– Page fault – Debugging

• A Page Fault interrupt is not the result of a program error, but it does require the
operating system to get control.

The Internal Interrupts are those which are occurred due to Some Problem in
the Execution For Example When a user performing any Operation which contains any
Error and which contains any type of Error. So that Internal Interrupts are those
which are occurred by the Some Operations or by Some Instructions and the
Operations those are not Possible but a user is trying for that Operation. And The
Software Interrupts are those which are made some call to the System for Example
while we are Processing Some Instructions and when we wants to Execute one more
Application Programs.

2.External Interrupt:

• I/O devices tell the CPU that an I/O request has completed by sending an interrupt
signal to the processor.
• I/O errors may also generate an interrupt.
• Most computers have a timer which interrupts the CPU every so many interrupts the
CPU every so many milliseconds.

The External Interrupt occurs when any Input and Output Device request for any
Operation and the CPU will Execute that instructions first For Example When a
Program is executed and when we move the Mouse on the Screen then the CPU will
handle this External interrupt first and after that he will resume with his Operation.

3.Software interrupts:

These types if interrupts can occur only during the execution of an instruction. They
can be used by a programmer to cause interrupts if need be. The primary purpose of
such interrupts is to switch from user mode to supervisor mode.

A software interrupt occurs when the processor executes an INT instruction.

Written in the program, typically used to invoke a system service. A processor
interrupt is caused by an electrical signal on a processor pin. Typically used by devices
to tell a driver that they require attention. The clock tick interrupt is very common; it
wakes up the processor from a halt state and allows the scheduler to pick other work
to perform.
A processor fault like access violation is triggered by the processor itself when it
encounters a condition that prevents it from executing code. Typically when it tries to
read or write from unmapped memory or encounters an invalid instruction.

CISC Characteristics

A computer with large number of instructions is called complex instruction set

computer or CISC. Complex instruction set computer is mostly used in scientific
computing applications requiring lots of floating point arithmetic.

 A large number of instructions - typically from 100 to 250 instructions.

 Some instructions that perform specialized tasks and are used infrequently.
 A large variety of addressing modes - typically 5 to 20 different modes.
 Variable-length instruction formats
 Instructions that manipulate operands in memory.

RISC Characteristics

A computer with few instructions and simple construction is called reduced

instruction set computer or RISC. RISC architecture is simple and efficient. The major
characteristics of RISC architecture are,

 Relatively few instructions

 Relatively few addressing modes
 Memory access limited to load and store instructions
 All operations are done within the registers of the CPU
 Fixed-length and easily-decoded instruction format.
 Single cycle instruction execution
 Hardwired and micro programmed control

Example of RISC & CISC

Examples of CISC instruction set architectures are PDP-11, VAX, Motorola 68k,
and your desktop PCs on intel’s x86 architecture based too .
Examples of RISC families include DEC Alpha, AMD 29k, ARC, Atmel AVR,
Blackfin, Intel i860 and i960, MIPS, Motorola 88000, PA-RISC, Power (including PowerPC),
SuperH, SPARC and ARM too.

Which one is better ?

We cannot differentiate RISC and CISC technology because both are suitable at its specific
application. What counts is how fast a chip can execute the instructions it is given and how well it
runs existing software. Today, both RISC and CISC manufacturers are doing everything to get an
edge on the competition

Computer Registers

Data Register(DR) : hold the operand(Data) read from memory

Accumulator Register(AC) : general purpose processing register

Instruction Register(IR) : hold the instruction read from memory

Temporary Register(TR) : hold a temporary data during processing

Address Register(AR) : hold a memory address, 12 bit width

Program Counter(PC) :

»hold the address of the next instruction to be read from memory

after the current instruction is executed

»Instruction words are read and executed in sequence unless a branch

instruction is encountered

»A branch instruction calls for a transfer to a nonconsecutive

instruction in the program

»The address part of a branch instruction is transferred to PC to become

the address of the next instruction

Input Register(INPR) : receive an 8-bit character from an input device

Output Register(OUTR) : hold an 8-bit character for an

output device

The following registers are used in Mano‟s example computer.

Computer Instructions:

The basic computer has 16 bit instruction register (IR) which can denote either
memory reference or register reference or input-output instruction.
1. Memory Reference – These instructions refer to memory address as an
operand. The other operand is always accumulator. Specifies 12 bit
address, 3 bit opcode (other than 111) and 1 bit addressing mode for direct
and indirect addressing.
Example –
IR register contains = 0001XXXXXXXXXXXX, i.e. ADD after fetching
and decoding of instruction we find out that it is a memory reference
instruction for ADD operation.
Hence, DR <- M[AR]
AC <- AC+ DR, SC <- 0
2. Register Reference – These instructions perform operations on registers
rather than memory addresses. The IR(14-12) is 111 (differentiates it from
memory reference) and IR(15) is 0 (differentiates it from input/output
instructions). The rest 12 bits specify register operation.
Example –
IR register contains = 0111001000000000, i.e. CMA after fetch and decode
cycle we find out that it is a register reference instruction for complement
accumulator.
Hence, AC <- ~AC

3. Input/Output – These instructions are for communication between

computer and outside environment. The IR(14-12) is 111 (differentiates it
from memory reference) and IR(15) is 1 (differentiates it from register
reference instructions). The rest 12 bits specify I/O operation.
Example –
IR register contains = 1111100000000000, i.e. INP after fetch and decode
cycle we find out that it is an input/output instruction for inputing
character. Hence, INPUT character from peripheral device.

Computer Registers
Registers are a type of computer memory used to quickly accept, store, and transfer data and
instructions that are being used immediately by the CPU. The registers used by the CPU are often
termed as Processor registers.
A processor register may hold an instruction, a storage address, or any data (such as bit sequence or
individual characters).
The computer needs processor registers for manipulating data and a register for holding a memory
address. The register holding the memory location is used to calculate the address of the next
instruction after the execution of the current instruction is completed.
Following is the list of some of the most common registers used in a basic computer:

The following image shows the register and memory configuration for a basic computer.
The Memory unit has a capacity of 4096 words, and each word contains 16 bits.
• The Data Register (DR) contains 16 bits which hold the operand read from the memory
location.
• The Memory Address Register (MAR) contains 12 bits which hold the address for the
memory location.
• The Program Counter (PC) also contains 12 bits which hold the address of the next
instruction to be read from memory after the current instruction is executed.
• The Accumulator (AC) register is a general purpose processing register.
• The instruction read from memory is placed in the Instruction register (IR).
• The Temporary Register (TR) is used for holding the temporary data during the processing.
• The Input Registers (IR) holds the input characters given by the user.
• The Output Registers (OR) holds the output after processing the input data.

Types of Register in Computer Organization

In Computer Organisation, the register is utilized to acknowledge, store, move information and
directions that are being utilized quickly by the CPU. There are different kinds of registers utilized
for different reasons. Some of the commonly used registers are:
• AC ( accumulator )
• DR ( Data registers )
• AR ( Address registers )
• PC ( Program counter )
• MDR ( Memory data registers )
• IR ( index registers )
• MBR ( Memory buffer registers )
These registers are utilized for playing out the different operations. When we perform some
operations, the CPU utilizes these registers to perform the operations. When we provide input to the
system for a certain operation, the provided information or the input gets stored in the registers.
Once the ALU arithmetic and logical unit process the output, the processed data is again provided to
us by the registers.
The sole reason for having a register is the quick recovery of information that the CPU will later
process. The CPU can use RAM over the hard disk to retrieve the memory, which is comparatively
a much faster option, but the speed retrieved from RAM is still not enough. Therefore, we have
catch memory, which is faster than registers. These registers work with CPU memory like catch and
RAM to complete the task quickly.

Operation Performed by Registers

Following major operations performed by registers, such as:
 Fetch: The fetch operation is utilized for taking the directions by the client. The instructions
that are stored away into the main memory for later processing are fetched by registers.
• Decode: This operation is utilized for deciphering the instructions implies the instructions
are decoded the CPU will discover which operation is to be performed on the instructions.
• Execute: The CPU performs this operation. Also, results delivered by the CPU are then
stored in the memory, and after that, they are shown on the client Screen.
Stack Organization

Stack is the storage method of the items in which the last item included is the first one
to be removed/taken from the stack. Generally a stack in the computer is
a memory unit with an address register and the register holding the address of the
stack is known as the Stack Pointer (SP). A stack performs Insertion and Deletion
operation, were the operation of inserting an item is known as Push and operation of
deleting an item is known as Pop. Both Push and Pop operation results in
incrementing and decrementing the stack pointer respectively.

Register Stack

Register or memory words can be organized to form a stack. The stack pointer is
a register that holds the memory address of the top of the stack. When an item need
to be deleted from the stack, item on the top of the stack is deleted and the stack
pointer is decremented. Similarly, when an item needs to be added, the stack pointer is
incremented and writing the word at the position indicated by the stack pointer. There
are two 1 bit register; FULL and EMTY that are used for describing the
stack overflow and underflow conditions. Following micro-operations are performed
during inserting and deleting an item in/from the stack.

Insert:
SP <- SP + 1 // Increment the stack pointer to point the next higher address//
M[SP] <- DR // Write the item on the top of the stack//
If (SP = 0) then (Full <- 1) // Check overflow condition //
EMTY <- 0 // Mark that the stack is not empty //

Delete:
DR <- M[SP] //Read an item from the top of the stack//
SP <- SP 1 //Decrement the stack pointer //
If (SP = 0) then (EMTY <- 1) //Check underflow condition //
FULL <- 0 //Mark that the stack is not full //

Get all the resource regarding the homework help and assignment help at
Transtutors.com. With our team of experts, we are capable of providing homework
help and assignment help for all levels. With us you can be rest assured the all the
content provided for homework help and assignment help will be original and
plagiarism free.

Register Stack:-

A stack can be placed in a portion of a large memory as it can be organized as a

collection of a finite number of memory words as register.
In a 64- word stack, the stack pointer contains 6 bits because 26 = 64.
The one bit register FULL is set to 1 when the stack is full, and the one-bit register
EMTY is set to 1 when the stack is empty. DR is the data register that holes the binary
data to be written into on read out of the stack. Initially, SP is decide to O, EMTY is set
to 1, FULL = 0, so that SP points to the word at address O and the stack is masked
empty and not full.

PUSH

SP ® SP + 1 increment stack pointer

M [SP] ® DR unit item on top of the Stack
It (SP = 0) then (FULL ® 1) check it stack is full
EMTY ® 0 mask the stack not empty.

POP

DR ® [SP] read item trans the top of stack

SP ® SP –1 decrement SP
It (SP = 0) then (EMTY ® 1) check it stack is empty
FULL ® 0 mark the stack not full.

A stack can be placed in a portion of a large memory or it can be organized as

a collection of a finite number of memory words or registers. Figure X shows the
organization of a 64-word register stack. The stack pointer register SP contains a
binary number whose value is equal to the address of the word that is currently on
top of the stack.

Three items are placed in the stack: A, B, and C in the order. item C is
on the top of the stack so that the content of sp is now 3. To remove the top item, the
stack is popped by reading the memory word at address 3 and decrementing the
content of SP. Item B is now on top of the stack since SP holds address 2. To insert a
new item, the stack is pushed by incrementing SP and writing a word in the next
higher location in the stack. Note that item C has read out but not physically removed.
This does not matter because when the stack is pushed, a new item is written in its
place.

In a 64-word stack, the stack pointer contains 6 bits because 26=64. since SP
has only six bits, it cannot exceed a number greater than 63(111111 in binary). When
63 is incremented by 1, the result is 0 since 111111 + 1 =1000000 in binary, but SP
can accommodate only the six least significant bits. Similarly, when 000000 is
decremented by 1, the result is 111111. The one bit register Full is set to 1 when the
stack is full, and the one-bit register EMTY is set to 1 when the stack is empty of
items. DR is the data register that holds the binary data to be written in to or read out
of the stack.

Initially, SP is cleared to 0, Emty is set to 1, and Full is cleared to 0, so that SP

points to the word at address o and the stack is marked empty and not full. if the stack
is not full , a new item is inserted with a push operation. the push operation is
implemented with the following sequence of micro-operation.

SP ←SP + 1 (Increment stack pointer)

M(SP) ← DR (Write item on top of the stack)
if (sp=0) then (Full ← 1) (Check if stack is full)
Emty ← 0 ( Marked the stack not empty)
The stack pointer is incremented so that it points to the address of the next-higher
word. A memory write operation inserts the word from DR into the top of the stack.
Note that SP holds the address of the top of the stack and that M(SP) denotes the
memory word specified by the address presently available in SP, the first item stored
in the stack is at address 1. The last item is stored at address 0, if SP reaches 0, the
stack is full of item, so FULLL is set to 1.

This condition is reached if the top item prior to the last push was in location 63
and after increment SP, the last item stored in location 0. Once an item is stored in
location 0, there are no more empty register in the stack. If an item is written in the
stack, obviously the stack cannot be empty, so EMTY is cleared to 0.

DR← M[SP] Read item from the top of stack

SP ← SP-1 Decrement stack Pointer
if( SP=0) then (Emty ← 1) Check if stack is empty
FULL ← 0 Mark the stack not full

The top item is read from the stack into DR. The stack pointer is then decremented. if
its value reaches zero, the stack is empty, so Empty is set to 1. This condition is
reached if the item read was in location 1. Once this item is read out, SP is
decremented and reaches the value 0, which is the initial value of SP. Note that if a
pop operation reads the item from location 0 and then SP is decremented, SP changes
to 111111, which is equal to decimal 63. In this configuration, the word in address 0
receives the last item in the stack. Note also that an erroneous operation will result if
the stack is pushed when FULL=1 or popped when EMTY =1.

Memory Stack :

A stack can exist as a stand-alone unit as in figure 4 or can be implemented in

a random access memory attached to CPU. The implementation of a stack in the CPU
is done by assigning a portion of memory to a stack operation and using a processor
register as a stack pointer. Figure shows a portion of computer memory partitioned in
to three segment program, data and stack. The program counter PC points at the
address of the next instruction in the program. The address register AR points at an
array of data. The stack pointer SP points at the top of the stack. The three register
are connected to a common address bus, and either one can provide an address for
memory. PC is used during the fetch phase to read an instruction. AR is used during
the execute phase to read an operand. SP is used to push or POP items into or from
the stack.

As show in figure :4 the initial value of SP is 4001 and the stack grows with
decreasing addresses. Thus the first item stored in the stack is at address 4000, the
second item is stored at address 3999, and the last address hat can be used for the
stack is 3000. No previous are available for stack limit checks.
We assume that the items in the stack communicate with a data register DR. A new
item is inserted with the push operation as follows.

SP← SP-1
M[SP] ← DR
The stack pointer is decremented so that it points at the address of the next word. A
Memory write operation insertion the word from DR into the top of the stack. A new
item is deleted with a pop operation as follows.

DR← M[SP]
SP←SP + 1

The top item is read from the stack in to DR. The stack pointer is then incremented to
point at the next item in the stack. Most computers do not provide hardware to check
for stack overflow (FULL) or underflow (Empty). The stack limit can be checked by
using two processor register: one to hold upper limit and other hold the lower limit.
After the pop or push operation SP is compared with lower or upper limit register.