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1. Which of the following statements is always true? (c) X = 0 0, Y = 1 0

(a) A complied program uses more memory than an interpreted (d) X = 0 0, Y = 0 0
program.
(b) A compiled converts a program to a lower level language for
execution. 10. Consider 4-bit gray code representation of a numbers. Let
(c) A compliner for a high level language takes less memory than ℎ3 ℎ2 ℎ1 ℎ0 be the gray representation of a number n and
its interpreter 𝑔3 𝑔2𝑔1 𝑔0 be the gray code representation of the
(d) Compiled programs take more time to execute than number( 𝑛 + 1) modulo 15. Which of the following
interpreted programs. functions is correct?
(Computer Organization NIMCET 2008) (a) 𝑔0(ℎ3 ℎ2 ℎ1 ℎ0 ) = ∑(1,2,3,6,10,13,14,15)
2. A switching circuit that produces one in a set of input bits as an output (b) 𝑔1 (ℎ3 ℎ2 ℎ1ℎ0 ) = ∑(4,9,10,11,12,13,14 ,15
based on the control value of control bits is termed as (c) 𝑔2(ℎ3 ℎ2 ℎ1 ℎ0) = ∑( 2,4,5,6,7,12,13,15)
(a)Full Adder (b)Inverter
(d) 𝑔3 (ℎ3 ℎ2ℎ1 ℎ0 ) = ∑(0,1,6,7,10,11,12,13)
(c)Multiplexer (d)Converter
(Computer Organization NIMCET 2015)
(Computer Organization NIMCET 2009)
11. Consider a hard disk with 16 recording surfaces (0-15)
3. A CPU has a 12 bit address for memory addressing. If the
having 16384 cylinders (0- 16383) and each cylinder
memory has a total capacity of 16 KB, what is the word
contains 64 sectors (0-63). Data storage capacity in each
length of the memory.
(a) 2 bytes (b) 4 bytes sector is 512 bytes. Data are oraganized cylinder- wise and
(c) 8 bytes (d) 16 bytes the addressing format is < cylinder no. , surface no., sector
(Computer Organization NIMCET 2010) no.>. A file of size 42797 KB is stored in the disk and the
4. The ASCII code of A is starting disk location of the file is <1200, 9,40>. What is
(a)66D (b) 41H the cylinder number of the last sector of the file, if it is
(c) 01000010 (d) 01100011 stored in a continuous manner?
(Computer Organization NIMCET 2011) (a)1284 (b)1282
(c)1286 (d)1288
5. An eight bit byte is capable of representing how many different (Computer Organization NIMCET 2016)
characters? 12. In order to store floating numbers in computers using the
(a) 64 (b) 128 normalized representation and 32- bit single precision,
(c) 256 (d) 512
the number of bits used for exponent and and fraction
(Computer Organization NIMCET 2011)
are_______,______ respectively.
6. Which of the following units is used to supervise each instruction
(a)11,21 (b)16,15
in the CPU?
(a) Control unit
(c)16,16 (d)8,23
(b) Accumulator (Computer Organization NIMCET 2017)
(c) ALU 13. What type of error are not detected by assemblers?
(d) Control Register (a)Syntax error (b)Run-time error
(Computer Organization NIMCET 2012) (c)Logical error (d)All of these
7. All digital circuits can be realized by using only (Comptuer Organization NIMCET 2017)
(a)Exclusive OR gates (b)Half adders
14. In IEEE single precision floating point representation,
(c)Multiplexers (d)OR gate
exponent is represented in……
(Computer Organization NIMCET 2013) (a) 8 bit sign-magnitude representation
8. Which of the following circuit is used as a memory device in (b) 8 bit 2's complement representation
computers? (c) Biases exponent representation with a bias value 127
(a)Flip-Flop (b)Rectifier
(d) Biases exponent representation with a bias value 128
(c)Comparator (d)All of these
(Computer Organization NIMCET 2019)
(Computer Organization NIMCET 2013)
15. The time required for fetching and execution of one simple
9. Consider the values A= 20 x 1030, B = –20 x 1030 C= 10 machine instruction is known as
x1030. Assume that the floating point numbers are (a) Delay time (b)CPU cycle
represented with 32 bits. What are the values of X and Y, (c) Real time (d)Seek Time
when the following sequence of operations are executed (Computer Organization NIMCET 2020)
on a computer?
(Computer Organization NIMCET 2014) 16. The process when processor fetch or decode another
X=A+B Y=A+C instruction during the execution of current instruction is called
X=X+C Y=Y+B (a)Supercomputing (b)Pipelining
(a) X = 1 0, Y = 1 0 (c)Cloud computing (d)Grid computing
(b) X = 1 0, Y = 0 0 (Computer Organization NIMCET 2021)

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17. Which of the following is the fastest means of memory access (Computer Organization NIMCET 2023)
for CPU? 28. Suppose we have a 10- bit computer that uses 10-bit floating-
(a)Registers (b)cache point computational unit (Float number uses IEEE floating- point
(c)Main memory (d)Stack arithmetic where a floating point number has 1 sign bit, 5
(Computer Organization NIMCET 2021) exponent bits, and 4 fraction bits). The representation for +∞
18. To fetch data from the secondary memory which one of the (plus infinity) is
following register is used? (a)0111110000 (b)1111110000
(a)MAR (b)PC (c)IR (d)MBR (c)0000001111 (d)011111 1111
(Computer Organization NIMCET 2021) (Computer Organization NIMCET 2023)
19. 6
Consider a computer system with speed of 10 instructions per 29. Which of the following interfaces perform the transfer of data
second. A program P, having 2n2 steps is run on this system, between the memory and the I/O peripheral without involving
where n is the input size. If n =10000, what is the execution time the CPU?
for P? (a) DMA (b) Serial Interface
(a)1.2 (b)20s (c)100s (d)200s (c) branch interface (d) DDA
(Computer Organization NIMCET 2021) (Computer Organization NIMCET 2024)
30. A CPU generates 32 bits virtual addresses. The page size is 4 KB.
20. To access the I/O devices, the status flag is continuously checked
The processor has a translation look-aside buffer (TLB) which can
in
hold a total of 128-page table entires and is 4- way set associate.
(a) Program controlled I/O (b) Memory mapped I/O
The minimum size of the TLB tag is
(c) I/O mapped (d) None of these
(a) 11 bits (b) 20 bits
(Computer Organization NIMCET 2021) (c) 13 bit (d) 15 bit
21. Suppose the largest n bit number reqires, ‘d’ digits in decimal (Computer Organization NIMCET 2024)
representation. Which of the following relations between ‘n’ and ‘d’
31. Consider the program below which uses six temporary
approximately correct?
(a)d = 2n (b)n = 2d (c)d < 𝑛 log10 2 (d)d >nlog10 2 variables a, b, c, d, e, and f.
𝑎 = 10
(Computer Organization NIMCET 2022) 𝑏 = 20
22. ‘Floating point representation ‘ is used to represent 𝑐 = 30
(a)Integers (b)Real number 𝑑 = 𝑎+𝑐
(c)Boolean values (d)Whole numbers 𝑒 =𝑏+𝑑
𝑓 =𝑐+𝑒
(Computer Organization NIMCET 2022)
𝑏 = 𝑐+𝑒
23. If a processor clock is rated as 2500 million cycles per second, then its 𝑒 =𝑏+𝑓
clock period is 𝑑 = 5+𝑒
(a)2.50×10-10sec (b)4.00× 10-10sec 𝑟𝑒𝑡𝑢𝑟𝑛 𝑑 + 𝑓
-10
(c)1.00× 10 sec (d)None of these Assuming that all the above operations take their operands
(Computer Organization NIMCET 2022) from registers, the minimum number of registers needed to
execute this program without spilling is
24. A wrong sentence related to FAT 32 and NTFS file system is
(a) 6 (b) 4
(a) FAT 32 has lower disk utilization compared to NTFC
(c) 5 (d) 3
(b) Read and write speeds of NTFS are faster than that of FAT 32
(Computer Orgnization NIMCET 2024)
(c) FAT 32 store individual files of size up to 32 GB
(d) NTFS stands for New Technology File System 32. Consider an arbitrary number system with independent
(Computer Organization NIMCET 2023) digits as 0,1 and A. If we generate first few numbers in
25. If a processor clock is rated as 2500 million cycles per second, sequence as 00,01, 0A, 10, 11, 1A and if this process is
then its clock period is continued to generate the numbers, then the position of
A. 2.50× 10−10sec B. 4.00× 10−10sec 10A is ______
C. 1.00× 10 sec
−10
D. 5.00× 10−10sec (a) 15 (b) 10
(c) 12 (d) 9
(Computer Organization NIMCET 2023)
(Computer Organization NIMCET 2024)

(a) D (b) C (c) A (d) B 33. Which of the following components is not a part of an
26. Which of the following registers is used to keep track of address instruction formation in CPU processing?
of the memory location where the next instruction is located? (a) Opcode (b) Register file
(a)Program Counter (b)Memory Data Register (c) Source operand (d) Destination operand
(c)Instruction counters (d)Memory Address Register (Computer Organization NIMCET 2024)
(Computer Organization NIMCET 2023) 34. The range of the exponent E in the IEEE754 double
27. A CPU generates 32-bit virtual addresses. The page size is 4KB. precision (Binary 64) format is _____
The processor has a translation look-aside buffer (TLB) which can (a) -1023 < E < 1022
(b) -1022 < E < 1022
hold a total of 128 page table entries and is 4-way set associative. (c) -1022 < E < 1023
The minimum size of the TLB tag is (d) -1023 < E < 1023
(a)13 bits (b)20 bits (c)11 bits (d)15 bits (Computer Organization NIMCET 2024)

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ANSWER 11. (a)

1 b 2 c 3 b 4 b 5 c 42797 KB will take 85512 sectors (42797*1024 bytes/512 bytes)
Since, there are 64 sectors per surface 85512/64 = 1337.406
6 a 7 b 8 a 9 a 10 b
sectors are required, so we take 1338 sectors. These sectors are
11 a 12 d 13 c 14 c 15 b distributed among 16 surfaces, so 1338/16= 8358 cylinders will
16 b 17 a 18 a 19 d 20 a be required. So the final answer will be 84 + 1200 = 1284.
21 d 22 b 23 b 24 c 25 d One more fact to be noted is that the file occupies 83.58
26 a 27 d 28 a 29 a 30 d cylinders, but the 0.58 cannot be accommodated in the first one
31 d 32 c 33 b 34 c (the files storage starts from < 1200, 9, 40 >)
Hence, the file will be extended to 194 855 – 85400) more bytes
of cylinder 1284.
SOLUTION 12. (d)
1. (b) The IEEE 754 standard specifies a binary 32 bit as having:
A compiler converts a high level program into low level language Sign bit : 1 bit
(Machine language) for execution. Exponent width : 8 bits
2. (c) Multiplexer.
Significant precision : 24 bits (23 explicitly stored)
3. (b) The bits are laid out as follows:
4. (b)
The ASCII
Code of Ain decimal system is 65. Which can be written as 41 in The real value assumed by a given 32-bit binary 32 data with a
hexadecimal system given biased sign, exponent e (the 8-bits unsigned integer) and
16 65 1 a 23-bit fraction.
4 13. (c)
 (65)10 = (41)16 = 41H Logical error.

5. (c)
14. (c)
We know that, n bit byte can represent (2)n different characters.
In IEEE single precision floating point representation, exponent
Hence 8 bit byte can represent (2)8 = 256 characters.
is represented in Biases exponent representation. The biased
6. (a) exponent is used for representation of negative exponents.
Control unit is used to supervise each instruction in the The biased exponent (E) of single precision number can be
CPU. obtained as
E = e + 127
7. (b)
All digital circuits can be realized by using only half adders. A half 15. (b)
adder consists of an XOR gate and an AND gate. The time required for the fetching and execution of one simple
8. (a) machine instruction is CPU cycle.
The flip-flop0 circuit is used as a memory device in computers. The speed of a computer processor or CPU, is determined by the
9. (a) clock cycle, which is the amount of time between two pulses of an
10. (b) oscillator. The higher number of pulses per second, the faster the
Binary h 𝒉𝟑 𝒉𝟐 𝒉𝟏𝒉𝟎 (𝒏 + 𝟏) 𝒈𝟑 𝒈𝟐 𝒈𝟏 𝒈𝟎 computer processor will be able to process information.
𝐦𝐨𝐝𝟏𝟔
0000 0 0000 1 0001
0001 1 0001 2 0011 16. (b)
0010 2 0011 3 0010 Pipe-lining in the process of improving the performance of the
0011 3 0010 4 0110 system by processing different instructions at the same time,
0100 4 0110 5 0111 with only one instruction performing one specific operation.
0101 5 0111 6 0101 17. (a)
0110 6 0101 7 0100 Registers are fastest means of access for CPU.
0111 7 0100 8 1100 Registers are the small memory locations which are present closet
1000 8 1100 9 1101 to the CPU.
1001 9 1101 10 1111 18. (a)
1010 10 1111 11 1110 To fetch data from the secondary memory, MAR (Memory
1011 11 1110 12 1010 Address Register) is used. MAR is a CPU register that either stores
1100 12 1010 13 1011 the memory address from which data will be fetched to the CPU
1101 13 1011 14 1001 or the address to which data will be sent and stored.
1110 14 1001 15 1000 19. (d)
1111 15 1000 0 0000 Number of steps = 2n2
This gives the solution option (b). Speed of computer = 106 per second
𝑔1 (ℎ3 ℎ2 ℎ1 ℎ0 ) = Σ(4,9,10,11,12,13,14,15) For n = 10000(104)
𝑁𝑢𝑚𝑏𝑒𝑟 𝑜𝑓 𝑆𝑡𝑒𝑝𝑠
∵ 𝑇𝑖𝑚𝑒 = 𝑆𝑝𝑒𝑒𝑑 𝑜𝑓 𝐶𝑜𝑚𝑝𝑢𝑡𝑒𝑟

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=
2𝑛2
=
2×(104)2
=
2×108 Given:
106 106 106
2 CPU generates 32 -bit virtual addresses. TLB can hold a total of
= 2 x 10 = 200 sec.
128 page table entries. The TLB is 4-way set associative.
20. (a)
Page size is 4 KB.
To access the I/O devices, the status flag is continuously checked
To calculate the TLB tag size, we can use the formula: Tag size =
in program controlled I/O. In this method, the processor
Address size - Index size - Offset size First, we need to find the
constantly checks the status flags and when it finds that the flag
index size. Since, the TLB is 4-way set associative and can hold
is set it performs the appropriate operation.
128 page table entries, the number of sets is 128/4 = 32 .
21. (d) 𝑛 bits binary number requires 𝑑-decimal digits
So, Therefore, the index size is log 2 (32) = 5 bits.
10𝑑 > 2𝑛 n Next, we calculate the offset size. The page size is 4 KB, which is
Take log on both side equivalent to (2∧ 12) bytes. So, the offset size is log 2 (2∧12) = 12
log10 10𝑑 > log10 2𝑛 bits.
𝑑 > 𝑛log10 2 Now, we can calculate the tag size: Tag size = 32 bits -5 bits -12
22. (b) Floating point representation is used to represent real bits = 15 bits Therefore, the minimum size of the TLB tag is 15
numbers. This representation does not reserve a specific number bits.
of bits for the integer part or the fractional part.
The floating number representation of a number has two part : 28. (a) The correct representation for +∞ (plus infinity) in the given
the first part represents a signed fixed point number called 10 -bit floating point format using IEEE floating-point arithmetic
Mantissa and the second part of designates the position of the would be:
decimal point and is called the exponent. 0111110000
23. (b) We know that, frequency is defined as the number of cycles in In this representation, the sign bit is 0 (indicating a positive
one second. value), the exponent bits are all 1s (11111), and the fraction bits
Number of cycle in 1sec = 2500 million are all 0s (0000) . This follows the IEEE 754 standard for
Frequency = 2500MHz representing infinity in floating-point arithmetic.
We know that time period is the inverse of frequency and is 29. (a) DMA
defined as the time taken by one cycle. 30. (d)
 𝑇 = 1/𝐹 32 bit
1
= 2500×106 Total memory = 232
100
= 2500×106×100 = 25×1010
100 Page size = 4 KB = 212 bit
100 232
= × 10−10 = 4 × 10−10 sec Total page = 212 = 220
25
27
1 Entry = 128 page  1 set (for tag) =22= 25 page
24. (c) In general, NTFS (New Technology File System) tends to 220
Total Entry = = 215 page
provide faster read and write speeds compared to FAT32 (File 25
Allocation Table). NTFS incorporates various improvements over Tag bit = 15 bit Ans.
FAT32, including better file organisation, enhanced security Option (d) is correct answer.
features, and improved performance. 31. (d)
25. (d) To find the clock period of a processor given its clock rate, 𝑎 = 10
we can use the formula: 𝑏 = 20
Clock Period = 1 Clock Rate 𝑐 = 30
𝑑 =𝑎+𝑐
In this case, the processor clock rate is 2500 million cycles per
𝑒 = 𝑏+𝑑
second, or 2500MHz. 𝑓 =𝑐+𝑒
Converting MHz to Hz : 𝑏 =𝑐+𝑒
2500MHz = 2500 ∗ 10∧ 6 Hz 𝑒 = 𝑏+𝑓
Now, we can calculate the clock period 𝑑 =5+𝑒
1
Clock Period = (2500∗ ∧ 𝑟𝑒𝑡𝑢𝑟𝑛 𝑑 + 𝑓
10 6 Hz)
Clock Period = 0.0000004 seconds or 400 nanoseconds d replace a
Therefore, the clock period of the processor is 400 nanoseconds f replace b
or 4.00∗ 10∧ − 10sec. a=a+c
26. (a) The Program Counter (PC) is a register used in computer a=b+a
architecture to keep track of the address of the memory location b = c + a  3 variable us.
where the next instruction to be fetched is located. It is also d=b+b
sometimes referred to as the Instruction Pointer (IP) in certain Option (d) 3
computer architectures. The PC is automatically incremented 32. (c)
after each instruction is fetched, allowing the processor to fetch Solution
the next instruction from the sequential memory location.
00, 01, 0A, 10, 11, 1A, A0, A1, AA, 100, 101, 10A
10A = 12th Position
27. (d) To determine the minimum size of the TLB tag, we need to
33. (b) Register file
consider the number of page table entries the TLB can hold and
34. (c) – 1022 < E < 1023
the page size.

ADDRESS: 117/466, O Block, Geeta Nagar, Sharda Nagar, NEAR: ANURAG HOSPITAL Kanpur, Uttar Pradesh 208025
website: www.maarula.in 9935985550 9554548576