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Gujarat Technological University

This document is an examination paper for the Digital Logic Design subject from Gujarat Technological University, dated June 1, 2019. It includes various questions related to digital logic concepts such as Karnaugh maps, complement methods, universal gates, encoders, multiplexers, and flip-flops. The exam consists of five questions, each with sub-questions, and is structured to assess students' understanding of digital logic design principles.

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29 views1 page

Gujarat Technological University

This document is an examination paper for the Digital Logic Design subject from Gujarat Technological University, dated June 1, 2019. It includes various questions related to digital logic concepts such as Karnaugh maps, complement methods, universal gates, encoders, multiplexers, and flip-flops. The exam consists of five questions, each with sub-questions, and is structured to assess students' understanding of digital logic design principles.

Uploaded by

mancee2468
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Seat No.: ________ Enrolment No.

___________

GUJARAT TECHNOLOGICAL UNIVERSITY


BE - SEMESTER– III(OLD) EXAMINATION – SUMMER 2019
Subject Code: 130701 Date: 01/06/2019
Subject Name: Digital Logic Design
Time: 02:30 PM TO 05:00 PM Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.

Q.1 (a) (ADD)16= ( )10= ( )8 =( )4=( )2= ( ) binary =( )gray 07


(b) What is the significance of a Karnaugh map for solving combinational circuits? 07
Solve f(a,b,c,d) = (5,7,12,13,14,15) using a K map

Q.2 (a) Explain the (r-1)’s complement method of operation using example 07
(b) Discuss canonical and standard form of representation. 07
OR
(b) What is positive and negative logic? Give one example of each. 07

Q.3 (a) Use NOR gate as a universal gate and construct all basic gates from it. 07
(b) Construct a Full Adder from a Half Adder. 07
OR
Q.3 (a) Use NAND gate as a universal gate and construct all basic gates from it. 07
(b) Implement a binary to Gray converter. State its significance. 07

Q.4 (a) How does an encoder circuit work? Explain in terms of symbol, block diagram 07
and truth table.
(b) Write a short note on Arithmetic, Logic and Shift operations. 07
OR
Q.4 (a) How does a multiplexer circuit work? Explain in terms of symbol, block 07
diagram and truth table.
(b) Show the working of Shift Register using symbol, block diagram and truth table. 07

Q.5 (a) What is a PLA circuit? Explain in details about it. 07


(b) Explain about any one Flip Flop circuit using its symbol, block diagram, truth 07
table and characteristics equation.
OR
Q.5 (a) Explain about a synchronous counter using 3 bits. 07
(b) Classify memories. Describe in details about any one type. 07

*************

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