System Verilog and Constraints

‘Constraint’ name implies to satisfy conditions and range of values for

randomization purpose. We will give limit the variables how much range it should
be randomize.
We have several types of constraints.
I. Soft constraint: whenever we mention constraint of variable is soft, it is
override by other constraint. Soft keyword. In the below code, constraint
inside the class, it is a soft constraint. A should be 5 to 10, but within
initial block 11-15 is overridden. Without soft, both will conflict and
randomize will fail. By using soft keyword, we can randomize the range
of variable what we want.
class soft_constraint;
rand bit [3:0] a;
constraint c1 {soft a inside {[5:10]};}
endclass
module tb;
initial
begin
soft_constraint s1;
s1 = new;
repeat(5)
begin
[Link] with { a inside {[11:15]};};
$display("randomized data is %p", s1.a);
end
end
endmodule
II. Distribution constraint: assign weightage to values of variable how much
it should be generate by using dist keyword
class distr_const;
rand bit [3:0] a;
constraint c1 { a dist { 7:=7, [8:15]:/8 } ;}
endclass
module tb;
initial
begin
distr_const d1;
d1 = new;
repeat(10)
begin
[Link];
$display("randomized data : %p", d1.a);
 end
end
endmodule
III. Inline constraint: by using randomize with { }, we can write inline within
initial block
IV. If-else/conditional constraint
V. Static constraint: for one variable, normal constraint, another variable we
will write constraint by using static keyword. Then we will create two objects
and two randomizations before and after disable the static constraint and
see the difference. Before disable static constraint, for one object we called
randomize method, it will generate a=1, b=2 and another object called
randomize method, it will also generate values of a is different and values
of b is static across all instances. a=3, b=2
class static_const;
rand bit [2:0] a;
rand bit [2:0] b;
constraint c1 { a inside {[2:4]};}
static constraint c2 { b inside { [6:7]};}

endclass
module tb;
initial
begin
static_const s1;
static_const s2;
s1= new;
s2 = new;
[Link];
[Link];
$display("s1: a = %0d, b = %0d", s1.a, s1.b);
$display("s2: a = %0d, b = %0d", s2.a, s2.b);
$display("after disabled constraint");
s2.c2.constraint_mode(0);
[Link];
[Link];
$display("s1: a = %0d, b = %0d", s1.a, s1.b);
$display("s2: a = %0d, b = %0d", s2.a, s2.b);
end
endmodule
VI. Unique constraint: this will generate unique values
VII. Extern constraint: only constraint will specify inside the class using extern
keyword and body of constraint outside the class.
class extern_const;
 rand bit [2:0] a;
extern constraint c1;
endclass
constraint extern_const:: c1 { a < 6;};
module tb;
initial
begin
extern_const e1;
e1 = new;
repeat(5)
begin
[Link];
$display("randomized data : %p", e1.a);
end
end
endmodule
1) Constraint for power of 9 or power of 3 or multiples of any number?

class power9;
rand int a [];
constraint c1 {[Link] == 10;}
constraint c2 {foreach(a[i])
a[i] == (9**i);}
//a[i] == (3**i);
a[i] == i*3;}
endclass
module power_9;
initial
begin
power9 p_h;
p_h = new;
p_h.randomize;
$display("randomized data : %p", p_h.a);
end
endmodule
2) Constraint for 11110000

Class pattern;
rand int a[];
constraint c1 {[Link] == 8;}
constraint c2 {foreach(a[i])
if(i<4)
a[i] == 1;
 else
a[j] ==0;}
endclass
module power_3;
initial begin
pattern p_h;
p_h = new;
p_h.randomize;
$display("randomized data : %p", p_h.a);
end
endmodule
3) constraint for {1000, 0100, 0010, 0001} diagonal

class matrix;
rand int a[4][4];
constraint c1 {foreach(a[i,j])
if(i==j)
a[i][j] == 1;
else
a[i][j] == 0;}
endclass
module diagonal_matrix;
initial
begin
matrix m_h;
m_h = new;
m_h.randomize;
$display("randomized data : %p", m_h.a);
end
endmodule
4) constraint for {1111, 1110, 1100, 1000}
class matrix;
rand int a[4][4];
constraint c1 {foreach(a[i,j])
if(i==0)
if(j<4)
a[i][j] ==1;
else
a[i][j]==0;
else if(i==1)
if(j<3)
a[i][j] ==1;
else
 a[i][j]==0;
else if(i==2)
if(j<2)
a[i][j] ==1;
else
a[i][j]==0;
else
if(j<1)
a[i][j]==1;
else
a[i][j]==0;}
endclass
module diagonal_matrix;
initial
begin
matrix m_h;
m_h = new;
m_h.randomize;
$display("randomized data : %p", m_h.a);
end
endmodule
5) constraint for {1010,0101,1100,0011}

class matrix;
rand int a[4][4];
constraint c1 {foreach(a[i,j])
if(i==0)
if(j%2==0)
a[i][j] ==1;
else
a[i][j]==0;
else if(i==1)
if(j%2==0)
a[i][j] ==0;
else
a[i][j]==1;
else if(i==2)
if(j<2)
a[i][j] ==1;
else
a[i][j]==0;
else
if(j==3)
a[i][j]==1;
 else
a[i][j]==0;}
endclass
module diagonal_matrix;
initial
begin
matrix m_h;
m_h = new;
m_h.randomize;
$display("randomized data : %p", m_h.a);
end
endmodule
6) constraint for pattern 123404321 or palindrome
class pattern;
rand int a[];
constraint c1 { [Link]==9;}
constraint c2 {foreach(a[i])
if(i<4)
a[i] ==i+1;
else if(i==4)
a[i] ==0;
else if(i>4)
a[i] == 9-i;}
endclass
module patterns;
initial
begin
pattern p1;
p1 = new;
[Link];
$display("randomized data : %p", p1.a);
end
endmodule
7) constraint for {0001, 0010,0100,1000}

class reverse_diagonal;
rand int a[4][4];
constraint c1 {foreach(a[i,j])
if(i==0 && j==3 || i==1 && j==2 || i==2 && j==1 || i==3 && j==0)
a[i][j]==1;
else
a[i][j]==0;}
endclass
module tb;
initial
begin
reverse_diagonal p1;
p1 = new;
[Link];
$display("randomized data : %p", p1.a);
end
endmodule
8) constraint for {1234,2341,3412,4123}
class matrix;
rand int a[4][4];
constraint c1 {foreach(a[i,j])
if(i==0)
a[i][j] == 1+j;
else if(i==1)
if(j%2==0)
a[i][j] == 2+j;
else
a[i][j] == 4-j;
else if(i==2)
if(j%2==0)
a[i][j] ==3-j;
else
a[i][j] == 5-j;
else if(i==3)
if(j==0)
a[i][j] == 4;
else if(j>0 && j<4)
a[i][j] ==j;
}
endclass
module matrice;
initial
begin
matrix m1;
m1 = new;
[Link];
$display("randomized data : %p", m1.a);
end
endmodule
9) constraint for bandi 9966637002
class number;
 rand int a[];
constraint c1 {[Link] == 10;}
constraint c2 {foreach(a[i])
if(i<2)
a[i] == 9;
else if(i>1 && i<5)
a[i] ==6;
else if(i%5==0)
a[i] == 3;
else if(i%4==2)
a[i] == 7;
else if ( i==7 || i==8)
a[i] ==0;
else if (i==9)
a[i] == 2;
}
endclass
module matrice;
initial
begin
number m1;
m1 = new;
[Link];
$display("randomized data : %p", m1.a);
end
endmodule
10) constraint for Fibonacci series
class fibonacci;
rand int a[];
constraint c1 {[Link] == 10;}
constraint c2 { a[0] == 0; a[1] ==1;}
Constraint c3 {foreach(a[i])
If(i>=2)
a[i] = a[i-1]+a[i-2];}
endclass
module matrice;
initial
begin
fibonacci m1;
m1 = new;
[Link];
$display("randomized data : %p", m1.a);
end
endmodule
11) constraint for reverse Fibonacci series
class fibonacci;
rand int a[];
constraint c1 {[Link] == 10;}
constraint c2 { a[0] == 34;
a[1] == 21;}
constraint c3 {foreach(a[i])
if(i>1)
a[i] == a[i-2] - a[i-1];}
endclass
module matrice;
initial
begin
fibonacci m1;
m1 = new;
[Link];
$display("randomized data : %p", m1.a);
end
endmodule
12) constraint for two 4-bit variables such that in “a” variable, lsb bit should
not equal to b variable lsb.
class ab;
rand bit [3:0] a;
rand bit [3:0] b;
constraint c1 { a[3:1] == b[3:1];}
endclass
module matrice;
initial
begin
ab m1;
m1 = new;
//repeat(10)
[Link];
//repeat(10)
$display("randomized data : %b", m1.a);
$display("randomized data : %b", m1.b);
end
endmodule
13) constraint for '{'{2, 4, 6, 8}, '{1, 3, 5, 7}, '{2, 3, 4, 5}, '{1, 2, 2, 1}}
class matrix;
rand int a[4][4];
constraint c1 {foreach(a[i,j])
 if(i==0)
// if(j%2==0)
a[i][j] == 2+(j*2);
else if(i==1)
a[i][j] == 1+(j*2);
else if(i==2)
a[i][j] == i+j;
else
if(i==3 && j<=1)
a[i][j] == 1+j;
else if(i==3 && j==2 || i==3 && j==3)
a[i][j] == 4-j;
}
endclass
module matrice;
initial
begin
matrix m1;
m1 = new;
[Link];
$display("randomized data : %p", m1.a);
end
endmodule
14) constraints for '{'{'{1, 2, 3, 4}, '{2, 3, 4, 1}, '{3, 4, 1, 2}, '{4, 1, 2, 3}}, '{'{2, 4, 6,
8}, '{1, 3, 5, 7}, '{2, 3, 4, 5}, '{1, 2, 2, 1}}}
class matrix;
rand int a[2][4][4];
constraint c1 {foreach(a[i,j,k])
if(i==0)
if(j==0)
a[i][j][k] == 1+k;
else if(j==1)
if(k%2==0)
a[i][j][k] == 2+k;
else
a[i][j][k] == 4-k;
else if(j==2)
if(k%2==0)
a[i][j][k] ==3-k;
else
a[i][j][k] == 5-k;
else if(j==3)
if(k==0)
 a[i][j][k] == 4;
else if(k>0 && k<4)
a[i][j][k] ==k;}
constraint c2 {foreach(a[i,j,k])
if(i==1)
if(j==0)
a[i][j][k] == 2+(k*2);
else if(j==1)
a[i][j][k] == 1+(k*2);
else if(j==2)
a[i][j][k] == j+k;
else
if(j==3 && k<=1)
a[i][j][k] == 1+k;
else if(j==3 && k==2 || j==3 && k==3)
a[i][j][k] == 4-k;
}
endclass
module matrice;
initial
begin
matrix m1;
m1 = new;
[Link];
$display("randomized data : %p", m1.a);
end
endmodule
15) constraint for '{2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}
class series;
rand int a[];
constraint c1 {[Link] ==14;}
constraint c2 {foreach(a[i])
a[i] ==2+i;}
endclass
module pattern;
initial
begin
series s1;
s1 = new;
[Link];
$display("randomized data : %p", s1.a);
end
endmodule
16) {{1,0,2,0}, {0,3,0,4}, {5,0,6,0}, {0,7,0,8}

// Code your testbench here

// or browse
class matrix;
rand int a[4][4];
constraint c1 {foreach(a[i,j])
if(i==0)
if(j%2==0)
a[i][j] ==(j+2)/2;
else
a[i][j]==0;
else if(i==1)
if(j%2==0)
a[i][j] ==0;
else
a[i][j]== (6+j)/2;
else if(i==2)
if(j%2==1)
a[i][j] ==0;
else
a[i][j]==(10+j)/2;
else
if(j%2==0)
a[i][j]==0;
else
a[i][j]==(14+j)/2;
}
endclass
module diagonal_matrix;
initial
begin
matrix m_h;
m_h = new;
m_h.randomize;
$display("randomized data : %p", m_h.a);
end
endmodule
17) constraint for 001122334455
class pattern;
rand int a[];
constraint c1 {[Link] == 12;}
constraint c2 { foreach(a[i])
 a[i] == i/2;}
endclass
module tb;
initial
begin
pattern p1;
p1 = new;
[Link];
$display("randomize data : %p", p1.a);
end
endmodule
18) constraint for 5*5 matrix such that last column is sum of previous columns
class matrix;
rand int a[5][5];
constraint c2 { foreach(a[i,j])
a[i][j] inside {[1:10]};}
constraint c1 { foreach(a[i,j])
if(j==4)
a[i][4] == a[i][0]+a[i][1]+a[i][2]+a[i][3];
/* else if(i==1)
a[i][4] == a[i][0]+a[i][1]+a[i][2]+a[i][3];
else if(i==2)
a[i][4] == a[i][0]+a[i][1]+a[i][2]+a[i][3];
else if(i==3)
a[i][4] == a[i][0]+a[i][1]+a[i][2]+a[i][3];
else
a[i][4] == a[i][0]+a[i][1]+a[i][2]+a[i][3];*/
}
endclass
module matrice;
initial
begin
matrix m1;
m1 = new;
[Link];
$display("randomized data : %p", m1.a);
end
endmodule
19) constraint for 1.45 to 7.43
class pattern;
rand int a;
real b;
constraint c1 { a inside {[145:743]};}
 function void post_randomize();
b = a/100.0;
$display("random value : %f", b);
endfunction
endclass
module tb;
initial
begin
pattern p1;
repeat(30)
begin
p1 = new;
[Link]();
end
end
endmodule
20) constraint for pattern 8888877777666665555444443333222221111100000
class pattern;
rand int a[];
constraint c1 {[Link]==45;}
constraint c2 {foreach(a[i])
a[i] == 8 - (i/5);}
endclass
module tb;
initial
begin
pattern p1;
p1 =new;
[Link];
$display("a = %p", p1.a);
end
endmodule
21) constraint for pattern 9, 19, 29, 39,49,59,69
class packet;
rand int a[8];
constraint c {foreach(a[i])
a[i] == (i*10)+9;}
endclass
module tb;
packet p;
initial begin
p = new();
[Link]();
 $display( "pattern : %p",p.a);
end
endmodule
22) constraint for Armstrong number
class armstrong;
rand int a;
constraint c1 {a inside { 153, 370, 371, 407 };}
function void post_randomize();
int r, temp, sum;
temp = a;
while(a >0)
begin
r = a % 10;
sum = (r**3)+sum;
a = a/10;
end
if(temp == sum)
$display("it is armstrong number is %0d", temp);
else
$display("it is not a armstrong number is %0d", temp);
endfunction
endclass
module tb;
initial
begin
armstrong a_h;
a_h = new;
a_h.randomize;
end
endmodule
23) constraint for mobile number such that first 4 numbers are 8919
class mobile;
rand int a[];
constraint c1 { [Link] == 10;}
constraint c2 {foreach(a[i]) a[i] inside {[0:9]};}
constraint c3 {foreach(a[i])
if(i==1 || i==3)
a[i] == 9;
else if( i== 0)
a[i] == 8;
else if(i==2)
a[i] == 1;}
endclass
module tb;
initial
begin
mobile m;
repeat(10)
begin
m = new;
[Link];
$display("mobile number : %p", m.a);
end
end
endmodule
24) pattern 1010110101
class pattern;
rand int a[10];
constraint c1 { foreach(a[i])
if(i<5)
if(i%2==0)
a[i] == 1;
else
a[i] == 0; }
constraint c2 { foreach(a[i])
if(i>4)
if(i%2==0)
a[i] == 0;
else
a[i] == 1;
}
endclass
module tb;
initial
begin
pattern p_h;
p_h = new;
p_h.randomize;
$display("randomized data : %p", p_h.a);
end
endmodule
25) pattern 11101110
class pattern;
rand int a[8];
constraint c1 { foreach(a[i])
if(i<3 || i>3 && i<7)
 a[i] == 1;
else
a[i] ==0;
}
endclass
module tb;
initial
begin
pattern p_h;
p_h = new;
p_h.randomize;
$display("randomized data : %p", p_h.a);
end
endmodule
26) 9,99,999,9999,99999
class pattern;
rand int a[9];
constraint c1 { foreach(a[i])
if(i==0)
a[i] ==9;
else
a[i] == 9 + 10 * a[i-1] ; }
endclass
module tb;
initial
begin
pattern p1;
p1 = new;
[Link];
$display(" %p", p1.a);
end
endmodule
27) palindrome
class palindrome;
rand int a;
constraint c1 {a inside { [100:999]};}
function void post_randomize();
int r, temp, sum;
temp = a;
while(a >0)
begin
r = a % 10;
sum = sum*10+r;
 a = a/10;
end
if(temp == sum)
$display("it is palindrome number is %0d", temp);
else
$display("it is not a palindrome number is %0d", temp);
endfunction
endclass
module tb;
initial
begin
palindrome a_h;
a_h = new;
repeat(600)
begin
a_h.randomize;
end
end
endmodule
28) 000111222333
class pattern;
rand int a[12];
constraint c1 { foreach(a[i])
a[i] == i/3; }
endclass
module tb;
initial
begin
pattern p1;
p1 = new;
[Link];
$display("randomize data : %p", p1.a);
end
endmodule
29) constraint with unique keyword
class unique_ex;
rand bit [3:0] a[10];
constraint c2 { unique {a};}
endclass
module tb;
initial
begin
unique_ex u_h;
 u_h = new;
u_h.randomize;
$display("unique random data : %p", u_h.a);
end
endmodule
30) constraint without unique keyword
class unique_array_example;
rand bit [7:0] a[];
constraint c2 {[Link]==10;}
constraint addr_unique_values{
foreach(a[i,j])
if(i!=j)
a[i] !=a[j]; }
endclass
module abc();
unique_array_example uaeg;
initial
begin
uaeg =new;
[Link]();
$display("the value of a is %p",uaeg.a);
end
endmodule
31) constraint for odd numbers in even locations and even numbers in odd
location
class odd_even;
rand int a[10];
constraint c2 { foreach(a[i]) a[i] inside {[10:20]};}
constraint c1 { foreach(a[i])
if(i%2==0)
a[i]%2==1;
else
a[i]%2==0;}
endclass
module tb;
initial
begin
odd_even o_h;
o_h = new;
o_h.randomize;
$display("randomized data : %p", o_h.a);
end
endmodule
32) 25,27,30,36,40,45
class pattern;
rand int a[7];
constraint c1 { foreach(a[i]) a[i]>24;}
constraint c3 { foreach(a[i]) a[i]<46;}
constraint c2 { foreach(a[i])
(a[i]%9==0) || (a[i]%5==0);}
constraint c4 { foreach(a[i]) a[i]!=35;}
endclass
module tb;
initial
begin
pattern p1;
p1 = new;
[Link];
$display("a = %p", p1.a);
end
endmodule
33) 123123123123
class patt_gen;
rand int a[];
constraint c1 { [Link]==12;}
constraint c2 { foreach(a[i])
a[i] == (i%3)+1;
}
endclass
module tb;
initial
begin
patt_gen p1;
p1 = new;
[Link];
$display("a=%p", p1.a);
end
endmodule
34) 11001100110011001100
class pattern;
rand int a[20];
constraint c1 { foreach(a[i])
if((i/2)%2==0)
a[i] == 1;
else
a[i] == 0;}
endclass
module tb;
initial
begin
pattern p1;
p1 = new;
[Link];
$display("randomize data : %p", p1.a);
end
endmodule
35) Constraint for 0011001100110011
class pattern;
rand int a[20];
constraint c1 { foreach(a[i])
if((i/2)%2==0)
a[i] == 0;
else
a[i] == 1;}
endclass
module tb;
initial
begin
pattern p1;
p1 = new;
[Link];
$display("randomize data : %p", p1.a);
end
endmodule
36) 1,22,3,33,5,44,7,55
class pattern;
rand int a[8];
constraint c1 { foreach(a[i])
if(i%2==0)
a[i] == i+1;
else
a[i] == 11*(i+3)/2;
}
endclass
module tb;
initial
begin
pattern p1;
p1 = new;
 [Link];
$display("a = %p", p1.a);
end
endmodule
37) 1,11,3,22,5,33,7,44,9,55
class pattern;
rand int a[10];
constraint c1 { foreach(a[i])
if(i%2==0)
a[i] == i+1;
else
a[i] == 11*(i+1)/2;
}
endclass
module tb;
initial
begin
pattern p1;
p1 = new;
[Link];
$display("a = %p", p1.a);
end
endmodule
38) 1,22,3,44,5,66,7,88,7,66,5,44,3,22,1
class pattern;
rand int a[15];
constraint c1 { foreach(a[i])
if(i%2==0 && i<8)
a[i] == i+1;
else if(i%2==1 && i<8)
a[i] == 11*(i+1);
else
a[i] == a[14-i];
}
endclass
module tb;
initial
begin
pattern p1;
p1 = new;
[Link];
$display("a = %p", p1.a);
end
endmodule
39) Constraint, question will be there in comments
class example;
rand bit [2:0] p_arr[];
//child arrays
rand bit [2:0] c1_arr[], c2_arr[], c3_arr[];

//1.p_arr must be size of 5

//unique of p_arr
constraint p_size {p_arr.size == 5;}
constraint p_unique {unique{p_arr}; }

//2.c1,c2,c3 sizes are smaller than p_arr

//child arrrays must be contains atleast one element
//child arrays sizes must be equal to p_arr
constraint c2 {c1_arr.size < p_arr.size;c2_arr.size < p_arr.size;
c3_arr.size < p_arr.size;}
constraint c1 { c1_arr.size>0;c2_arr.size >0;c3_arr.size>0;}
constraint c { c1_arr.size + c2_arr.size + c3_arr.size == p_arr.size;}

//[Link] also uniques

//child elements contains from p_arr
constraint c_unique { unique{c1_arr};unique{c2_arr};unique{c3_arr};}
constraint c1_ar { foreach(c1_arr[i])
c1_arr[i] inside {p_arr};}
constraint c2_ar { foreach(c2_arr[i])
c2_arr[i] inside {p_arr};}
constraint c3_ar { foreach(c3_arr[i])
c3_arr[i] inside {p_arr};}

// elements should not same in each child arrays

constraint c4 { foreach(c1_arr[i])
!(c1_arr[i] inside {c2_arr});}
constraint c6 { foreach(c1_arr[i])
!(c1_arr[i] inside {c3_arr});}
constraint c5 { foreach(c2_arr[i])
!(c2_arr[i] inside {c3_arr});}
endclass
module tb;
initial
begin
example e1;
e1 = new;
 repeat(5)
begin
[Link]();
$display("p_arr=%0p, c1_arr=%0p, c2_arr=%0p, c3_arr=%0p", e1.p_arr,
e1.c1_arr, e1.c2_arr, e1.c3_arr);
end
end
endmodule
40) Constraint for 01002000300004
class example;
/*rand int a[];
constraint c1 {[Link]==20;}
constraint c2 { foreach(a[i])
if(i==1 || i==4 || i==8 || i==13 || i==19)
a[i] == ((4+i)/4) * 1;
else a[i]==0;}*/
//alternate method this will reusable constraint
rand int b[]; //1,4,8,13 index size array
rand int c[]; //01002000300004 array elements
constraint c1 { [Link]== 6;}
constraint c3 { [Link] == 27;}
constraint c2 { b[0] ==1; foreach(b[i])
if(i>0)
b[i]==b[i-1] + i + 2;}
function void post_randomize();
foreach(c[i])
c[i]=0;
foreach(b[i])
c[b[i]] = i+1;
endfunction
endclass
module tb;
initial
begin
example e;
e = new;
[Link];
//$display("randomizes : %p", e.a);
$display("randomized data :%p", e.b);
$display("randomized data :%p", e.c);
end
endmodule
41) Constraint for matrix 121
 222
121
class matrix;
rand int a[3][3];

constraint c1 {foreach(a[i,j])
if(i==1 && (j==0 || j==1 || j==2))
a[i][j] ==2;
else if( (i==0 || i==2) && j==1)
a[i][j] ==2;
else
a[i][j] ==1;}
endclass
module tb;
initial
begin
matrix m1;
m1 = new;
if(![Link])
$display("randomized failed: %p", m1.a);
else
$display("randomization pass: %p", m1.a);
end
endmodule

System Verilog Concepts

Polymorphism: means many forms means derived classes extend from base
class.
By using base class handle, we can override the method of child class. For
that, we must achieve polymorphism, we need to follow three rules:
1. base class must be virtual
2. method name of base class and derived class should be same
3. base class handle = derived class handle
class polymorphism;
virtual function void display();
 $display("it is PARENT");
endfunction
endclass
class extended extends polymorphism;
function void display();
$display("it is CHILD");
endfunction
endclass
module tb;
initial
begin
polymorphism p1;
extended e1 = new;
p1 = e1;
[Link]();
end
endmodule
inheritance: derived class contains new properties and methods and also
inherits the existing properties and methods of base class. Through
inheritance, more reusability we achieve.
class base_class;
bit [2:0] a;
endclass
class extend_class1 extends base_class;
bit [3:0] b;
int c;
endclass
module tb;
initial
begin
base_class b=new;
extend_class1 e1=new;
b.c=2; // illegal access
e1.a= 3'd4;
e1.b=4'd5;
e1.c= 1;
$display("randomized data :%p, randomized data :%p, randomized data :%p",
e1.a,e1.b,e1.c);
end
endmodule
Associative array: non- continuous memory allocation, array of any data type.
Whenever we want to write a data into a particular location then we will use
associative array. Array of index of any type  it is either int or string.
module associative;
int a[int];
int c[string];
string b[string];
initial
begin
a = '{ 1 : 2025,
5 : 34};
c = '{ "age" : 10,
"salary" : 16000};
b = '{"fruits" : "pomegranate",
"vegetables" : "Tomato"};
$display("a = %p ", a);
$display("c = %p", c);
$display("b = %p", b);
end
endmodule
associate array with methods
module associative();
int a[int];
int id;
initial
begin
a[3]=5;
a[1]= 2;
a[25] = 24;
a[3000] =1;
if([Link](25))
$display("entry exists in mem, whose value is %d", a[25]);
else
$display("no entry");
if([Link](id))
$display("previous entry %d is made in address %d", a[id], id);
else
$display("no entry");
if([Link](id))
$display("first entry %d is made in address %d", a[id], id);
else
$display("no entry");
if([Link](id))
$display("last entry %d is made in address %d", a[id], id);
else
$display("no entry");
 $display("number of entries in array is %0d", [Link]);
end
endmodule
dynamic array with methods
module dyn_example;
int a[];
initial
begin
a = new[10];
a = '{10,20,30,40,50,60,70,80,90,100};
foreach(a[i])
$display("a[%0d] = %0d", i, a[i]);
$display("size of array = %0d", [Link]);
a = new[25] (a);
foreach(a[i])
$display("a[%0d] = %0d", i, a[i]);
$display("size of array = %0d", [Link]);
a= new[20];
foreach(a[i])
$display("a[%0d] = %0d", i, a[i]);
$display("size of array = %0d", [Link]);
end
endmodule

pass by ref: inside the function of pass by reference, arguments of the

function we can change any variable, it will affect outside the function also.
module argument_passing;
int x,y,z;
//function to add two integer numbers.
function automatic int sum(ref int x,y);
x = x+y;
return x+y;
endfunction
initial begin
x = 20; y = 30;
z = sum(x,y);
$display("--------------------------------------------------------");
$display("\tValue of x = %0d",x);
$display("\tValue of y = %0d",y);
$display("\tValue of z = %0d",z);
 $display("--------------------------------------------------------");
end
endmodule
logical gates
`timescale 1ns/1ns
module example();
reg [3:0] a;
reg [3:0] b;
initial
begin
a=4'b0011; b=4'b1101;
$display ("a = %0b,\n b = %0b ,\na&&b=%0b, \na||b=%0b , \na&b=%0b
,\na|b=%0b ", a, b, a&&b, a||b, a&b, a|b);
$dumpfile(); $dumpfile("[Link]");
end
// $display ("a = %0b and b = %0b", a, b, a&&b, a||b, a&b, a|b);
Endmodule
Static casting: converts from one data type to other data type.
module static_casting();
real r;
int a;
initial
begin
r = (1.8*3.2);
a = int'(r);
$display(" r = %f", r);
$display(" a = %d", a);
end
endmodule
shallow copy: it will copy only main class properties not sub class properties. After
performed shallow copy, if we modify the value of property by using another handle,
it will be pointing to same memory (static memory). Only handles will copied.
class dummy;
int a;
endclass
class main;
dummy d_h = new();
int d;
endclass
module tb;
initial
begin
main m1, m2;
 m1 = new;
m1.d = 10;
m1.d_h.a=11;
$display("a = %0d, d = %0d", m1.d, m1.d_h.a);
//shallow copy
m2 = new m1;
$display("a = %0d, d = %0d", m2.d, m2.d_h.a);
$display("modification");
m2.d_h.a =20;
$display("a = %0d, d = %0d", m1.d, m1.d_h.a);
$display("a = %0d, d = %0d", m2.d, m2.d_h.a);
end
endmodule
deep copy: both main class and sub class properties are copied. After
performed deep copy, if we modify using another handle, it will not effect on
first handle. It allocates separate memory
class dummy;
int a;
function dummy copy();
copy = new();
copy.a = this.a;
return copy;
endfunction
endclass
class main;
dummy d_h = new();
int d;
function main copy();
copy = new;
copy.d = this.d;
copy.d_h = this.d_h.copy;
return copy;
endfunction
endclass
module tb;
initial
begin
main m1, m2;
m1 = new;
m1.d = 10;
m1.d_h.a=11;
$display("a = %0d, d = %0d", m1.d, m1.d_h.a);
//deep copy
 m2 = [Link]();
$display("a = %0d, d = %0d", m2.d, m2.d_h.a);
$display("modification");
m2.d_h.a =20;
$display("a = %0d, d = %0d", m1.d, m1.d_h.a);
$display("a = %0d, d = %0d", m2.d, m2.d_h.a);
end
endmodule
SV semaphore: used to control access to shared resources, preventing race
conditions.
Semaphores are used when multiple resources are there, we can use
semaphore to control access by creating keys using new() method, by default
one key is only and put and get methods.
module tb();
semaphore sem;
task display();
[Link](1);
#5;
$display("process 1",$time);
[Link](1);
endtask
task display1();
[Link](1);
#4
$display("process 2",$time);
[Link](1);
endtask
task display2();
[Link](1);
#2
$display("process 3",$time);
[Link](1);
endtask
initial
begin
sem = new(1);
fork
display();
display1();
display2();
join
end
endmodule
SV Mailbox: SV mailbox is a two-way communication between two processes or two
components. i.e. one component put data into mailbox and one component will
retrieve the data from mailbox. It acts as a FIFO ( first in first out)
We have methods to send and retrieve the data from/to mailbox.
Methods:
Put ()  put data into mailbox -blocking
Get ()  get data from mailbox- blocking
Try_peek() put data into mailbox if available space is there or not, it will not care, it
just returns data non-blocking
Try_get() get the data from mailbox if available space is there or not, it will not care,
it just returns data non-blocking
Syntax for mailbox:
Mailbox mb; //mb is name of mailbox
[Link](data);
[Link](data);

SV interface: SV provides interface that consists of bundle of signals that

communicate with design and testbench. This is called physical interface. Here,
design and this interface is static and we cannot connect with class based testbench
which is dynamic i.e. objects will create during run time. That’s why we need to use
virtual interface is discussed in below.
It has more reusability than Verilog.
Syntax:
Interface interfacename;
//bundle of signals  this interface will directly instantiate in top module. When we
see this, it will be more reuse and readability also easily understandable interface.
Endinterface
SV Modport  modport will declare inside the interface. Modport will give direction
of signals.
Syntax: modport modportname (input , ouput);
SV Clocking blocks  clocking blocks are used to synchronization and timing
requirements. Testbench contains multiple clocking blocks but one clocking block per
cycle. It can declare inside interface, module and program blocks.
Clocking blocks avoid race conditions by driving signals at right time.
Clocking block can drive the signals at rising edge or falling edge of the clock.
Syntax:
Clocking clockingname ( @posege clk);
Default input #1 ouput #2;
Endclocking
Virtual interface
virtual interface is a handle or pointer to pointed to physical interface is called virtual
interface. By using virtual keyword, we can connect static design with dynamic
testbenches which is SVTB and UVM TB.
Syntax:
Virtual interfacename vif; // we can use this driver or monitor to access signals from
physical interface.
Vif.a = if.a;

SVA
Assertions: to check trueness of the design [Link] validate the
behavior of design according to specification. They will help to debug
more errors
1) Immediate assertions-> inside procedural statements
2) Concurrent assertions -> depends on clock signal

module assertion();
logic clk;
bit req;
bit ack;
bit done;
initial
begin
clk = 0;
forever #5 clk = ~clk;
end
initial
begin
req =0;
repeat(1)
@(posedge clk);
req =1;
 end
initial
begin
ack =0;
repeat(2)
@(posedge clk);
ack =1;
end

initial
begin
done =0;
repeat(3)
@(posedge clk);
done =1;
end
//assertion
property p1;
@(posedge clk) $rose(req) |=> ack ##1 done;
endproperty

assert property(p1)
$display($time, "assertion passed");
else
$display($time, "assertion failed");
initial
begin
$dumpfile("[Link]");
$dumpvars(1,assertion);
end
initial
begin
#100;
$finish;
end
endmodule
 Functional coverage
Functional coverage: this will do by verification engineers. it
defines how much design functionality has been covered in
percentage.
It checks quality of design functionality (DV)
Covergroup cg;
// Variables

Coverpoint: also called as variables that are interested to cover.

Cross: cross variables are nothing but we will cover how many
bins that multiply both coverpoints.

Coverpoint a // implicit bins auto bins will be created

Coverpoint b //implicit bins auto bins will be created
Cross aXb
Endcoverage

Code coverage: checks the quality of testcases. Types of

coverage
1) Branch
2) Fsm
3) Toggle
4) Statement
We will cover all types of coverage to achieve 100% in code
coverage. This is done in a RTL design.