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Chapter 6 3 Arithmetic Addition Subtraction Negation

The document outlines various arithmetic instructions including INC, DEC, ADD, SUB, and NEG, detailing their syntax, functionality, and examples. INC and DEC adjust a single operand by 1, while ADD and SUB perform addition and subtraction between operands of matching sizes. Additionally, it explains the status flags affected by these operations, such as the Carry Flag, Zero Flag, and Overflow Flag.
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0% found this document useful (0 votes)
7 views12 pages

Chapter 6 3 Arithmetic Addition Subtraction Negation

The document outlines various arithmetic instructions including INC, DEC, ADD, SUB, and NEG, detailing their syntax, functionality, and examples. INC and DEC adjust a single operand by 1, while ADD and SUB perform addition and subtraction between operands of matching sizes. Additionally, it explains the status flags affected by these operations, such as the Carry Flag, Zero Flag, and Overflow Flag.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Arithmetic Instructions

• Inc
• Dec
• Add
• Sub
• Neg
INC and DEC instruction

• The INC and DEC instructions add 1 to or subtract 1 from a single


operand, respectively.
• Syntax:
– INC destination
– DEC destination
• Destination may be an 8 or 16 bit register or memory operand.
• INC and DEC are faster than the ADD and SUB instructions, so they
should be used where practical
• All status flags are affected except the Carry Flag.
INC and DEC instruction

• Example:
– inc al ; increment an 8-bit register
– dec bx ; decrement of a 16-bit register
– inc membyte ; increment memory operand
ADD instruction

• The ADD instructions adds an 8-bit or 16-bit source operand to a


destination operand of the same size.
• Syntax:
– ADD destination, source
• Source is unchanged by the operation
• The sizes of the operands must match, & only one memory operand
may be used.
• A segment register may not be the destination.
• All status flags are affected.
ADD instruction

• Examples:
– Add al, 1 ; add immediate value to 8-bit register.
– Add cl, al ; add 8 bit register to register.
– Add bx, 1000h ; add immediate value
– Add var1, ax ; add 16-bit register to memory
– Add var1, 10 ; add immediate value to memory
SUB instruction

• The SUB instructions subtracts a source operand from a destination


operand.
• Syntax:
– SUB destination, source
• The sizes of the two operands must match, & only one may be a
memory operand.
• A segment register may not be the destination operand.
• All status flags are affected.
SUB instruction

• Examples:
– Sub al, 1 ; subtract immediate value from 8-bit register
– Sub cl, al ; subtract 8-bit register from register
– Sub bx, 1000h ; subtract immediate value from 16-bit register
memory
– Sub var1, 10 ; subtract immediate value from memory
Flags Affected by ADD and SUB

• If the result of an addition operation is too large for the destination


operand, the Carry Flag is set:
– Mov al, FA
Add al, 32; Carry Flag set
(the result is 300 (12C), too large to fit into AL)
• If the source is larger than the destination, a subtraction operation
requires a borrow, the Carry Flag is set:
– Mov al, 5
sub al, 10 ; Carry Flag set
Flags Affected by ADD and SUB
• If the result of an arithmetic operation is zero, the Zero flag is set:
– Mov bl, 0
mov al, 0
add al, bl ; Zero Flag is set
mov al, 10
sub al, 10 ; Zero Flag is set
• When an addition operation generates a result exactly 1 too large for the
destination, it sets the Zero Flag.
– Mov bl, FF
add bl, 1 ; Zero Flag set, & BL= 0h.
Flags Affected by ADD and SUB

• The Overflow Flag is set when an addition operation generates a signed


number that is out of range.
• Range of a signed 8-bit value is -128 to +127 & a singed 16-bit value is
limited to -32768 to +32767 because of the highest bit is reserved for the
sign
– Mov cl, 7F
add cl, 2 ; Overflow flag set & CL = 80
NEG instruction

• The NEG instructions performs 1st and 2nd complement to the


destination operand.
• Actually, it reverses each bit of the operand and then adds 1 to it.
• The execution on NEG instruction to a +ve number will result in a –ve
number, and –ve number will result in a +ve number.
• Syntax:
– NEG destination
• The destination operand can be a register or memory operand.
• All status flags are affected (CF, ZF, SF, OF, PF and AF).
NEG instruction

• Examples:
– MOV BL, 100 ; BX = 0064h
– NEG BL ; BX = 009Ch

*SF = 1,C= 1, PF = 1, ZF = 0, OF = 0, AF = 0

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