Arithmetic circuits are fundamental blocks in digital systems and are used for

arithmetic operations such as addition, subtraction, multiplication and division. These

circuits constitute the major stream of computation in different applications such as
processors, digital signal processing units, and calculators. Arithmetic circuits involve
logic gates that deal with binary data which in turn enables it to perform calculations
with great precision. In this article, the various categories of arithmetic circuits and
how they operate will be discussed as well as their uses.

What is Arithmetic Circuit?

Arithmetic circuits are fundamental blocks in digital systems and are used
for arithmetic operations such as addition, subtraction, multiplication and division.
Arithmetic circuits can perform seven different arithmetic operations using a single
composite circuit.
It uses a full adder (FA) to perform these operations. A multiplexer (MUX) is used to
provide different inputs to the circuit in order to obtain different arithmetic
operations as outputs.

4-Bit Arithmetic Circuit

Consider the following 4-bit Arithmetic circuit with inputs A and B. It can perform
seven different arithmetic operations by varying the inputs of the multiplexer and the
carry (C0).
Truth Table for the above Arithmetic Circuit
S0 S1 C0 MUX Output Full Adder Output

0 0 0 B A+B

0 0 1 B A+B+1

0 1 0 B' A + B'

0 1 1 B' A + B' + 1 = A - B

1 0 0 0 A

1 0 1 0 A+1

1 1 0 1 A–1

1 1 1 1 A-1+1=A

Hence, the different operations for the inputs A and B are -

1. A + B (adder)
2. A + B + 1
3. A + B'
4. A - B (subtracter)
5. A
6. A + 1 (incrementor)
7. A - 1 (decremental)

What is Adder Circuit?

Adder circuits are basic arithmetic circuits which are used for binary addition. They
come in various types based on their complexity and function. They come in various
types based on their complexity and function:
1. Half Adder
A Half adder is the basic type of the adder circuit, which is used in many digital
designs. It performs addition of two one-bit binary numbers and generates an output
in terms of sum and carry. The half adder consists of two logic gates: an XOR
gate for the sum and an AND gate for the carry.

2. Full Adder
A Full adder is an improvement of the half adder since it performs addition of three
binary numbers (two inputs and a carry from the previous addition). It produces a
sum and a carry; it is made of two half adders and an OR gate for the carry.
3. Ripple Carry Adder
This kind of adder is made up of more than one full adder cascaded together in a
serial manner. The carry output of each full adder is passed to the next; the circuit is
simple but carries propagation delay makes it relatively slow.

4. Carry Look-Ahead Adder

Due to the delay issue in ripple carry adders, carry look-ahead adders are built in
order to produce carry signals at a faster rate due to increased complexity. They
enhance the speed of addition to a very large extent and thus are suitable where high
speed processors are required.

What is Subtractor Circuit?

Subtractor circuits perform binary subtraction and come in two primary types:
Subtractor circuits perform binary subtraction and come in two primary types

1. Half Subtractor
The half subtractor is used to carry out subtraction with two single bit binary
numbers. It produces a difference and a borrow. As in the half adder, the difference
is produced using an XOR gate while the borrow is produced using an AND gate with
an inverted input.

2. Full Subtractor
A full subtractor extends the half subtractor to handle three inputs: Two binary
numbers and borrow from the foregoing stage. And it produces both a difference
and a borrow and the circuit diagram consists of two half subtractors and an OR
gate for the borrow transfer.

What is Multiplier Circuit?

Arithmetic circuits include the multiplier circuits which are used to multiply binary
numbers. They can be classified into various types based on complexity and speed.
They can be classified into various types based on complexity and speed:

1. Array Multiplier
An array multiplier employs several adders in an array structure to multiply two
binary numbers. They are obtained with the help of AND gates and added
subsequent to by using adders.

2. Booth Multiplier
Booth’s algorithm is used in multiplication of binary numbers that are positive and
also negative values. It minimizes the number of partial products and therefore the
multiplication is faster than that of the array multiplier.

What is Divider Circuit?

Divider circuits perform binary division, and they come in two types Divider circuits
perform binary division, and they come in two types:
1. Restoring Divider
The restoring division algorithm works by subtracting the divisor from the remainder
and then taking the remainder and continuing the process until the division process
is complete. It is less complex than non-restoring division but takes more time than
the latter one.

2. Non-Restoring Divider
The new algorithm outperforms the restoring division method in that there is no
need to restore the remainder at each iteration thus making division faster. Non-
restoring dividers are suited best for high speed operation.
Arithmetic circuits are circuits that are used in performing arithmetic operations
such as addition subtraction multiplication and division.

Advantages of Arithmetic Circuits

 Speed: Arithmetic circuits are capable of doing sophisticated arithmetic
operations at very high rates, thus, they are well appropriate for real time use.
 Automation: They are involved in performing arithmetic operations whereby they
minimize human error in computations.
 Scalability: Arithmetic circuits are highly expandable, meaning that it is possible
to add more components to the existing ones in order to perform arithmetic
operations on more significant numbers.

Disadvantages of Arithmetic Circuits

 Complexity: The use of high-performance arithmetic circuits often involves
many problems such as carry propagation delay and the like.
 Power Consumption: Some of the advanced arithmetic circuits that operate at
very high speeds are known to draw large currents hence large power in large-
scale processors.
 Cost: In more complex circuits, it will require more gates and resources, and that
will make the manufacturing to be expensive.

Applications of Arithmetic Circuits

 Microprocessors: Arithmetic circuits are very important for
the microprocessors since they facilitate the computation in the circuits.
 Digital Signal Processing (DSP): Arithmetic circuits are employed in DSP units
for operations such as image and audio processing.
 Calculators: The simplest operations of calculator involve the use of arithmetic
circuits and these include addition, subtraction, multiplication as well as division.
 Computer Graphics: In rendering and manipulating of graphical data, arithmetic
circuits are very essential.

Conclusion
Arithmetic circuits are essential to today’s computing as it deals with basic
arithmetic operations that are essential in a range of digital systems. There are
adder-subtractor circuits, multiplier divider circuits and many more; they provide a
fast way of processing binary data in various applications.
Carry Look-Ahead Adder

The adder produce carry propagation delay while performing other arithmetic
operations like multiplication and divisions as it uses several additions or subtraction
steps. This is a major problem for the adder and hence improving the speed of addition
will improve the speed of all other arithmetic operations. Hence reducing the carry
propagation delay of adders is of great importance. There are different logic design
approaches that have been employed to overcome the carry propagation problem.
One widely used approach is to employ a carry look-ahead which solves this problem
by calculating the carry signals in advance, based on the input signals. This type of
adder circuit is called a carry look-ahead adder.
Here a carry signal will be generated in two cases:
1. Input bits A and B are 1
2. When one of the two bits is 1 and the carry-in is 1.

In ripple carry adders, for each adder block, the two bits that are to be added are
available instantly. However, each adder block waits for the carry to arrive from its
previous block. So, it is not possible to generate the sum and carry of any block until
the input carry is known. The ith ith block waits for the i−1th i−1th block to
produce its carry. So there will be a considerable time delay which is carry propagation
delay.

Consider the above 4-bit ripple carry adder. The sum S3 is produced by the
corresponding full adder as soon as the input signals are applied to it. But the carry
input C4 is not available on its final steady-state value until carry C3 is available at its
steady-state value. Similarly C3 depends on C2 and C2 on C1.Therefore, though the
carry must propagate to all the stages in order that output S3 and carry C4 settle their
final steady-state value.

The propagation time is equal to the propagation delay of each adder block, multiplied
by the number of adder blocks in the circuit. For example, if each full adder stage has a
propagation delay of 20 nanoseconds, then S3 will reach its final correct value after 60
(20 × 3) nanoseconds. The situation gets worse, if we extend the number of stages for
adding more number of bits.

Carry Look-ahead Adder:

A carry look-ahead adder reduces the propagation delay by introducing more complex
hardware. In this design, the ripple carry design is suitably transformed such that the
carry logic over fixed groups of bits of the adder is reduced to two-level logic. Let us
discuss the design in detail.

Consider the full adder circuit shown above with corresponding truth table. We define
two variables as 'carry generate' Gi and 'carry propagate' Pi then,
Pi =Ai ⊕ Bi
Gi =Ai Bi Pi =Ai ⊕ Bi
Gi =Ai Bi

The sum output and carry output can be expressed in terms of carry generate Gi Gi
and carry propagate Pi Pi as

Si=Pi⊕Ci
Ci+1=Gi+PiCi

where Gi produces the carry when both Ai , Bi are 1 regardless of the input carry. Pi is
associated with the propagation of carry from Ci to Ci+1 .

The carry output Boolean function of each stage in a 4 stage carry look-ahead adder
can be expressed as

C1=G0+P0Cin
C2=G1+P1C1=G1+P1G0+P1P0Cin
C3=G2+P2C2=G2+P2G1+P2P1G0+P2P1P0Cin
C4=G3+P3C3=G3+P3G2+P3P2G1+P3P2P1G0+P3P2P1P0Cin

From the above Boolean equations we can observe that C4 does not have to wait
for C3 and C2 to propagate but actually C4 is propagated at the same time
as C3 and C2 . Since the Boolean expression for each carry output is the sum of
products so these can be implemented with one level of AND gates followed by an OR
gate.

The implementation of three Boolean functions for each carry output

(C2 , C3 and C4) for a carry look-ahead carry generator shown in below figure.

Advantages and Disadvantages of Carry Look-Ahead Adder :

Advantages -

 The propagation delay is reduced.

 It provides the fastest addition logic.
Disadvantages -

 The Carry Look-ahead adder circuit gets complicated as the number of variables
increase.
 The circuit is costlier as it involves more number of hardware.

An array multiplier is a digital combinational circuit used for multiplying two binary
numbers by employing an array of full adders and half adders. This array is used for
the nearly simultaneous addition of the various product terms involved. To form the
various product terms, an array of AND gates is used before the Adder array.
Checking the bits of the multiplier one at a time and forming partial products is a
sequential operation that requires a sequence of add and shift micro-operations.

The multiplication of two binary numbers can be done with one micro-operation by
means of a combinational circuit that forms the product bits all at once. This is a fast
way of multiplying two numbers since all it takes is the time for the signals to
propagate through the gates that form the multiplication array. However, an array
multiplier requires a large number of gates, and for this reason it was not economical
until the development of integrated circuits. For implementation of array multiplier
with a combinational circuit, consider the multiplication of two 2-bit numbers as
shown in figure. The multiplicand bits are b1 and b0, the multiplier bits are a1 and a0,
and the product is

Assuming A = a 1a0 and B= b1b0, the various bits of the final product term P can be
written as:-
1. P(0)= a0b0
2. P(1) =a1b0 + b1a0
3. P(2) = a1b1 + c1 where c1 is the carry generated during the addition for the P (1) term.
4. P(3) = c2 where c2 is the carry generated during the addition for the P(2) term.

For the above multiplication, an array of four AND gates is required to form the
various product terms like a0b0 etc. and then an adder array is required to calculate
the sums involving the various product terms and carry combinations mentioned in
the above equations in order to get the final Product bits.

1. The first partial product is formed by multiplying a 0 by b1, b0. The multiplication of
two bits such as a0 and b0 produces a 1 if both bits are 1; otherwise, it produces
 0. This is identical to an AND operation and can be implemented with an AND
gate.
2. The first partial product is formed by means of two AND gates.
3. The second partial product is formed by multiplying a1 by b1b0 and is shifted one
position to the left.
4. The above two partial products are added with two half-adder(HA) circuits.
Usually there are more bits in the partial products and it will be necessary to use
full-adders to produce the sum.
5. Note that the least significant bit of the product does not have to go through an
adder since it is formed by the output of the first AND gate.

A combinational circuit binary multiplier with more bits can be constructed in similar
fashion. A bit of the multiplier is ANDed with each bit of the multiplicand in as many
levels as there are bits in the multiplier. The binary output in each level of AND gates
is added in parallel with the partial product of the previous level to form a new partial
product. The last level produces the product. For j multiplier bits and k multiplicand
we need j*k AND gates and (j-1) k-bit adders to produce a product of j+k bits.