MODULE 6 – ARM PROGRAMMING WITH EMBEDDED C
2-MARK QUESTIONS
Explain GPIO of ARM.
GPIO (General Purpose Input/Output) pins are used for digital input and output in ARM-based
controllers like LPC2148. Each port has 32 pins configurable as input/output using the IODIR
register. IOSET and IOCLR set/clear pins, while IOPIN reads pin values.
Explain the function of IODIR, IOSET, IOPIN, IOCLR registers.
These registers control GPIO operations:
What is the use of the PINSEL register in ARM?
PINSEL (Pin Function Select) registers define alternate functions for each pin. PINSEL0 configures
P0.0–P0.15, PINSEL1 for P0.16–P0.31, and PINSEL2 for P1.16–P1.31.
What are Match Registers (MR0–MR3)?
They hold match values for the timer counter. When T0TC matches MRx, an action like interrupt,
reset, or stop is triggered via T0MCR.
What is the function of the CPSR register?
CPSR (Current Program Status Register) stores condition flags (N, Z, C, V), mode bits, and
interrupt status. During exceptions, CPSR is copied to SPSR to save state.
What are the different memory management units in ARM?
ARM supports three types: No Extension (no protection), MPU (Memory Protection Unit) for
region-level access control, and MMU (Memory Management Unit) for virtual memory mapping.
Register Full Form Function / Use
IODIR Input Output Direction Register Sets pin as Input (0) or Output (1).
IOSET Output Set Register Sets pin High (1).
IOCLR Output Clear Register Sets pin Low (0).
IOPIN Pin Value Register Reads/Writes current pin state.
5-MARK QUESTIONS
Explain Timer Unit of ARM.
The Timer Unit includes two 32-bit timers (Timer0 and Timer1). They function as timers (count
PCLK) or counters (external input). Registers include T0TC (Counter), T0MR0–T0MR3 (Match),
T0MCR (Match Control), and T0TCR (Control). When T0TC = MRx, it triggers an interrupt, reset, or
stop as configured.
Explain Exception Handling in ARM.
Exceptions interrupt normal execution to handle events (interrupts or faults). ARM saves CPSR to
SPSR and PC to R14, then jumps to vector addresses. Types: Reset, Undefined instruction, SWI,
Prefetch abort, Data abort, IRQ, FIQ. After handler completes, state is restored.
Explain the Memory Management in ARM Processor.
ARM memory system supports No Extension, MPU, and MMU. MPU divides memory into regions
with permissions; MMU performs virtual-physical address translation and supports multitasking.
Write a short note on ARM7 Family and its Features.
ARM7 processors are 32-bit RISC cores like ARM7TDMI, ARM7TDMI-S, and ARM7EJ-S. They
feature low power, 3-stage pipeline, Thumb instruction set, and support for DSP/Java extensions.
Used in mobiles, printers, and embedded systems.
Explain the algorithm to generate a square wave (blink LED).
Algorithm: Configure output pin → Set pin high → Delay → Clear pin → Delay → Repeat. Example
code: IO0DIR=0x00000001; while(1){IO0SET=0x1; delay(); IO0CLR=0x1; delay();}
Design a system to interface ARM7 with two LEDs and write a program to blink them
alternately.
Connect LEDs to P0.0 and P0.1. Configure as output using IODIR. Toggle LEDs alternately with
delay in infinite loop. Code: IO0DIR=0x3; while(1){IO0SET=0x1; IO0CLR=0x2; delay();
IO0CLR=0x1; IO0SET=0x2; delay();}
Write a delay program using Timer of ARM.
Use timer registers to generate delays: T0PR=15000; T0MR0=1000; T0MCR=0x04; T0TCR=0x01;
while(!(T0IR&0x01)); T0TCR=0x00; Timer counts PCLK ticks, resets or stops on match, producing
time delay.
Topic Key Registers / Concepts
GPIO IODIR, IOSET, IOCLR, IOPIN
Timer T0TC, T0MRx, T0MCR, T0TCR
Exception CPSR, SPSR, Vector Table
Memory Mgmt No Ext, MPU, MMU
ARM7 Family TDMI, EJ-S, 720T
PWM Pins Configured via PINSEL0
