EPC Notes-Part-3
EPC Notes-Part-3
MODULE 3
LINEAR OPAMP CIRCUITS
SUMMING AMPLIFIER AND D/A CONVERTER
The summing amplifier
As the input impedance of an op-amp is extremely large, more than one input signal can be
applied to the inverting amplifier .Such circuits amplifies the addition of the applied signals at
the output. Hence it is called summing amplifier or adder circuit.
For simplicity, the circuit has only two inputs, but we can have as many inputs as needed for
that application.The circuit like this amplifies each input signal. The gain for each channel ,or
input is given by the ratio of the feedback resistance to the appropriate input resistance.
For instance,the closed loop voltage gain of fig 3.1a are
𝑅𝑓 𝑅𝑓
Av1(CL)=− and Av2(CL)=−
𝑅1 𝑅2
The summing circuit combines all the amplified input signals into a single output given by
Vout= Av1(CL)v1+ Av2(CL)v2….1
It is easy to prove equation 1 .Since the inverting input is a virtual ground,the total input current
is:
𝑣1 𝑣2
iin=i1+i2= +
𝑅1 𝑅2
because of the virtual ground concept, all this current flows through the feedback resistor
producing an output 𝑅𝑓
v =(i +i )R voltage with
𝑅𝑓
a magnitude of
{ 𝑣1) + ( ) 𝑣2}
out 1 2 f= − ( 𝑅2
𝑅1
each input voltage is multiplied by its channel gain and added to produce the total output.The
same result applies to any number of inputs.
In some applications ,all resistances are equal as shown in fib 3.1 b .In this case ,each channel
has a closed loop voltage gain of unity and the output is given by
Vout=-(v1+v2+…..+vn).
The subtractor
Figure 3.2 shows a circuit that subtracts two input voltages to produce an output voltage equal
to the difference of v1 and v2.
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Input v1 drives an inverter with a voltage gain of unity. The output of the first stage is -v1. This
voltage is one of the inputs to the second stage summing circuit.The other input is v2.Since the
gain of each channel is unity,the final output voltage equal v1 minus v2.
The average
Figure 3.4 is an average,a circuit whose output equals the average of the input voltages.each
channel
𝑅
has
1
a voltage gain of
Av= =
3𝑅 3
When all amplified outputs are added,we get an output that is average of all input voltages.
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D/A CONVERTER
A digital to analog(D/A) converter takes a binary represented values and converts it into a
voltage or current.This voltage or current will be proportional to the input binary value.
Two methods of D/A conversion used are:
1. the binary weighted D/A converter and
2. R/2R ladder D/A converter.
The binary weighted D/A converter:
• This circuit produces an output voltage equal to the weighted sum of the inputs.The
weight is the same as the gain of the channel.For instance, in figure 3.5 a the channel
gains are :
Av3=-1
Av2=-0.5
Av1=-0.25
Av0=-0.125
Figure 3.5 binary weighted D/A converter changes digital input to analog voltage
• The input voltages are digital or two state, which means that they have a value of either
1 or 0.With 4 inputs ,there are 16 possible input combinations of v3v2v1v0.
0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110
and 1111.
• When all inputs are zero(0000),the output is:
Vout=0
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• When viewed on an oscillator scope, the output voltage of the D/A converter will look
like the negative-going staircase shown in fig 3.5b.
• A 4 input D/A converter has 16 possible outputs, an 8 input A/D converter has 256
possible outputs, and a 16 input D/A converter has 65,536 possible outputs. This means
that the negative going staircase voltage of fig 3.5b can have 256 steps with an 8 input
converter and 65536 steps with a 16 input converter.
• The binary weighted D/A converter can be used in applications where the number of
inputs is limited and where high precision is not required. When a higher number of
inputs is used, a higher number of different resistor values is required.The accuracy and
stability of the D/A converter depends on the absolute accuracy of the resistors and their
ability to track each other with temperature variations.
• The problem with the D/A converter is that it requires binary weighted resistors
which may be readily available, especially if the number of inputs ismore than
4.An attractive alternative is use R and 2R resistors for the D/A converter since
it requires only two set of precision resistance values.
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zero.Figure 3.7b shows the input-output response of a zero crossing detector.The minimum
input voltage that produces saturation is:
𝑉𝑠𝑎𝑡
Vin(min) =± …1
𝐴𝑣𝑜𝐿
If Vsat =14V,the output swing of the comparator is from approximately -14V to +14V.if the
opwn loop voltage gain is 100,000,the input voltage needed to produce saturation is
14𝑉
Vin(min)=± = ±0.14𝑚𝑉
100,000
This means that an input voltage more positive than +0.140mV drives the comparator into
positive saturation,and an input voltage more negative than -0.14mV drives into negative
saturation.
Inverting comparator
Inverting comparator is shown in figure 3.8 a.The non inverting input is grounded.The input
signal drives the inverting input of the comparator.In this case,a slightly positive input voltage
produces a maximum negative output.as shown in figure 3.8b on the other hand,a slightly
negative input voltage produces a maximum positive output.
Figure 3.8 a Inverting comparator with clamping diodes;b)inverting amplifier with input and output
waveforms
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Diode clamps
In the fig 3.8,the diodes D1 and D2 protect the opamp from damage due to excessive input
voltage vin.Because of these diodes,the difference input voltage Vid of the opamp is clamped
to either 0.7 or -0.7 V,hence the diodes are called clamp diodes.There are some opamps with
built in input protection in such opamps the input diodes D1 and D2 are unnecessary.
Figure 3.9 comparator converts sine waves to square waves a. non inverting b. inverting
Figure 3.9b shows the input sinewave and the output square wave for an inverting comparator
with a threshold of 0V,With this zero crossing detector,the output square wave is 180° out of
phase with input sine wave.
Interfacing analog and digital circuits
Comparators usually interface at their outputs with digital circuits such as CMOS,EMOS or
TTL.Figure 3.10a shows how a zero crossing detector can interface with an EMOS
circuit.whenever the input voltage is greater than zero,the output of the comparator is high.This
turns on the power FET and produces large load current.
Figure 3.10 b shows a zero crossing detetctor interfacing with a CMOS inverter.The idea is
basically the same.A comparator input greater than zero produces a high input to the CMOS
inverter.
Most EMOS devices can handle input voltages greater than ±15𝑉,and most CMOS devices
can handle input voltages up to ±15𝑉.Therefore we can interface the output of typical
comparatot without any level shifting or clamping.
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Figure 3.10 comparator interfaces with (a) power FET (b) CMOS
The diodes are normally off and have no effect on the operation of the circuit.It is only when
the input tries to exceed ±0.7𝑉 that one of the clamping diode turns on and protects the
comparator against excessive input voltage.
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Bounded output
The output swing of a zero crossing detector may be too large in some applications. If so, we
can bound the output by using back to back Zener diodes as shown in figure 3.12 a.
In this circuit,the inverting comparator has a bounded output because one od the diodes will be
conducting in the forward direction and the other will be operating in the breakdown region.
For instance,a 1N4731A has a Zener voltage of 4.3V.Therefore ,the voltage across the two
diodes will be approximately ±5𝑉 .If the input voltage is a sine wave with a peak value of
25mV,then the output voltage will be an inverted square wave with a peak voltage of 5V.
Figure 3.12 bounded outputs (a) zener diodes (b) rectifier diode
Figure 3.12 b shows another example of bounded output.The output will clip off the negative
half -cycles of the output voltage.Given an input sine wave with a peak of 25mV,the output is
bounded between -0.7 and +15V as shown
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• If a negative limit is preferred ,connect -VEE to the voltage divider as shown in figure
3.1.3c.
• Now a negative reference voltage is applied to the inverting input.
• When Vin is more positive than Vref,the differential input voltage is positive and the
output is high as shown in figure 3.13d.When Vin is more negative than Vref ,the output
is low.
Figure 3.13 a positive threshold b.positive input/output response c.negative threshold d.negative
input/output
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IC comparators
• An opamp like a 741C can be used as a comparator,but it has speed limitations becauseof
its slew rate.
• With a 741C,the output can change no faster than 0.5V/ µ s.because of this ,a 741C takes
more than 50 µs to switch output states with supplies of ±15𝑉.
• One solution to the slew rate problem is to use faster opamp like an LM318.Since it hasa
slew rate of 70V/ µs,it can switch from -Vsat to +Vsat in approximately 0.3 µs.
• Another solution is to eliminate the compensating capacitor found in a typical
opamp.Since a comparator is always used as a nonlinear circuit ,a compensating
capacitor is unnecessary.A manufacturer can delete the compensating capacitor and
significantly increase the slew rate.
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Driving TTL
The LM339 is an open collector device. Figure 3.16a shows how an LM 339n can be connected
to interface with TTL devices. A positive supply of +15V is used for the comparator, but the
open collector of the LM 339 is connected to a supply of +5V through a pullup resistor of
1KΩ.Because of this, the output swings between 0 and +5V as shown in figure 3.16b.This
output signal is ideal for TTL devices because they are designed to work with the supplies of
+5V.
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Noise triggering
• The high open loop gain of a comparator means that an input of only 100 µV may be
enough to switch the output from one state to another.
• If the input contains noise with a peak of 100 µV or more,the comparator will detect the
zero crossings produced by the noise.
• Figure 3.18 shows the output of a comparator with no input signal,except for noise.When
the noise peaks are large enough,they produce unwanted changes in the comparator
output.
• For instance,the noise peaks at A,B and C are producing unwanted transitions from lowto
high.
Schmitt trigger
• The standard solution for a noisy input is to use a comparator like the one shown in figure
3.19a
• The input voltage is applied to the inverting input. The inverting mode produces opposite
polarity output. This is fed back to the non-inverting input which is of same polarity as
that of output. This ensures positive feedback.
• A comparator using positive feedback is usually called a Schmitt trigger.
• When the comparator is positively saturated, a positive voltage is feedback to the non-
inverting input. This positive feedback voltage holds the output in the high state.
• Similarly, when the output voltage is negatively saturated, a negative voltage is
feedback to the non-inverting input, holding the output in the low state.
• The feedback fraction is
B= 𝑅1
𝑅1+𝑅2
The input voltage Vin triggers (change the state of) the output Vo every time it exceeds certain
voltage levels called the upper threshold voltage Vut and lower threshold voltage Vlt as shown
in fig 3.19b
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In fig 3.19.a the threshold voltages are obtained by using the voltage divider R 1-R2,where the
voltage across R2 is fedback to the +input.The voltage acrosss R2 is a variable reference
thereshold voltage that depends on the value and polarity of the output voltage Vo.when
Vo=+Vsat the voltage across R2 is called the upper threshold voltage Vut.The input voltage Vin
must be slightly more positive than Vref, the output gets driven to –Vsat from +Vsat.As long
as Vin<Vut, Vo is at +Vsat. using the voltage divider rule.
When the output is positively saturated ,the reference voltage applied to the non-inverting input
is Vref=+BVsat
On the other hand when Vo=-Vsat the voltage across R2 is referred to as the lower threshold
voltage Vlt ,Vin must be slightly more negative than Vlt in order to cause Vo to switch from –
Vsat to +vsat .in other words for Vin values greater than Vlt,Vo is at –Vsat.Vlt is given by the
following equation
Thus if the threshold voltages Vut and Vlt are made larger than the input noise voltages,the
positive feedback will eliminate the false output transitions.
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Figure 3.19 a inverting Schmitt trigger b input and output waveforms c Hysterisis curve
Hysteresis
To under this concept put your finger on the upper end of the graph where it says +Vsat.Assume
that this is the current value of the output voltage.Move your finger to the right along the
horizontal line,the input voltage is changing but the output voltage is still equal to +Vsat.
When u reach the upper right corner Vin equals +BVsat. When vin increases to slightly more
than +BVsat, the output voltage goes into the transition region between the high and the low
states.
If you move your finger down along the vertical line,you will simulate the transition of the
output voltage from high to low. when your finger is on the lower horizontal line,the output
voltage is negatively saturated and equal to -Vsat.
To switch back to the high output state ,move your finger until it reaches the lower left corner.At
this point Vin equals -B Vsat.When Vin becomes slightly more negative than - BVsat,the ouput
voltage goes into the transition from low to high.If you move your finger along the vertical
line,you will simulate the switching of the output stage from low to high.
The comparator with positive feedback is said to exhibit hysterisis ,a dead band condition.that
is when the input of the comparator exceeds Vut its output swithces form +Vsat to –Vsat and
reverts back to its original state,+Vsat, when the input goes below Vlt.the hysterisis voltage is
equal to the difference between Vut and Vlt.Therefore
NonInverting Circuit
• Figure 3.20a shows a noninverting Schmitt trigger.The input/output response has a
hysteresis loop,as shown in figure 3.20b.
• If the output is positively saturated in figure 3.20a,the feedback voltage to the
noninverting input is positive,which reinforces the positive saturation.Similarly if the
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Besides supressing the effects of noise,positive feedback speeds up the switching of output
states.When the output voltage begibs to change,this change is feedback to the non inverting
input and amplified ,forcing the output to change faster.Sometimes a capacitor C2 is connected
in parallel with R2 as shown in fig 3.21a known as speedup capacitor,it helps to cancel the
bypass capacitor formed by the stray capacitance across R1.This stray capacitance C1 has to
be charged before the non inverting input voltage can change.the sppedup capacitor supplies
this charge.
To neutralize the stray capacitance ,the minimum speed up capacitance must be atleast
𝑅1
𝐶2 = ∗ 𝐶1
𝑅2
As long as C2 is equal to or greater than value given by above equation,the output will switch
states at maximum speed.since the designer often has to estimate the stray capacitance C1, C2
Can be made two times larger than the value given by equation above.
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