Electronics World 2004 05 S OCR
Electronics World 2004 05 S OCR
ELECTRON Cs 0 5>
'WORLD
_AAY 2004 £3.25
9 709 8 33097
FPGAs S
ASSOCIATION
demystified
A new monitoring
pool for 5.1 audio
?recision rectifier
ircuits
3 GSM
:ongress report
Circuit ideas:
Jitter generator
Low battery warning device
Blown fuse indicator
Quality second -user
Fir
Te net
test & measurement vow
equipment
MEI
ENI 550L Amplifier (1.5 to 400MHz) 50 Watts £2500
Hewlett Packard 3314A Function Generator 20MHz £750 Radio Communications Test Sets
Agilent (HP) 8924C (opt 601) CDMA Mobile Station T/Set £8500
Hewlett Packard 3324A synth. function/sweep gen. (21MHz) £1950
Agilent (HP) E8285A CDMA Mobile Station T/Set £8500
Hewlett Packard 3325B Synthesised Function Generator £2500
Anritsu MT8802A (opt 7) Radio Comms Analyser (300kHz-3GHz) £8500
Hewlett Packard 3326A Two -Channel Synthesiser £2500
Hewlett Packard 8920B (opts 1,4,7,11,12) £6750
H.P. 4191A R/F Imp. Analyser (1GHz) £3995
Hewlett Packard 8922M + 83220E £2000
H.P. 4192A L.F. Imp. Analyser (13MHz) £4000
from £1250
Marconi 2955 / 2955A
Hewlett Packard 4193A Vector Impedance Meter (4-110MHz) £2900 Marconi 2955B/60B £3500
Hewlett Packard 4278A lkHz/1MHz Capacitance Meter £3500 Marconi 2955R £1995
H.P. 53310A Mod. Domain Analyser (opt 1/31) £3950 Motorola R2600B £2500
Hewlett Packard 8349B (2 - 20 GHz) Microwave Amplifier £2000 Racal 6103 (optsl, 2) £5000
Hewlett Packard 8508A (with 85081B plug-in) Rohde & Schwarz SMFP2 £1500
Vector Voltmeter £2500 Rohde & Schwarz CMD 57 (opts B1, 34, 6, 19, 42, 43, 61) £4995
Hewlett Packard 8904A Multifunction Synthesiser (opt 2+4) £1750 Rohde & Schwarz CMT 90 (2GHz) DECT £3995
Hewlett Packard 89440A Vector Signal Analyser (1.8GHz) Rohde & Schwarz CMTA 94 (GSM) £4500
opts AY8, AYA, AYB, AY7, IC2 £9950 Schlumberger Stabilock 4015 £3250
Agilent (HP) E4432B (opt 1E5/K03/H03) or (opt lEM/UK6/UN8) Schlumberger Stabilock 4031 £2750
(250kHz - 3GHz) £6000 Schlumberger Stabilock 4040 £1300
Marconi 6310 - Prog'ble Sweep gen. (2 to 20GHz) - new £2500 Wavetek 4103 (GSM 900) Mobile phone tester £1500
Marconi 6311 Prog'ble sig. gen. (10MHz to 20GHz) £2995 Wavetek 4032 Stabilock Comms Analyser £4000
Marconi 6313 Prog'ble sig. gen. (10MHz to 26.5GHz) £3750 Wavetek 4105 PCS 1900 GSM Tester £1600
R&S SMG (0.1-1GHz) Sig. Generator (opts B1+2) £2500
Rhode & Schwarz UPA3 Audio Analyser 11500 MISCELLANEOUS
Rhode & Schwarz UPA3 Audio Analyser £2250 Agilent (HP) 8656A / 8656B 100kHz-990MHz Synth. Sig. Gen. from £600
Fluke 5800A Oscilloscope Calibrator £8995 Agilent (HP) 8657A/ 8657B 100kHz-1040 or 2060MHz from £1250
Agilent (HP) 8644A (opt 1) 252kHz - 1030 MHz Sig.Gen. £4500
OSCILLOSCOPES Agilent (HP) 8664A (opt 1 + 4) High Pert. Sig. Gen. (0.1-3GHz) £10500
Agilent (HP) 54600B 100MHz 2 channel digital £800 Agilent (HP) 8902A (opt 2) Measuring Rxr (150kHz-1300MHz) £7500
Agilent (HP) 54602B 150MHz 4(2+2) channnel digital £1250 Agilent (HP) 8970B (opt 020) Noise Figure Meter £3950
Agilent (HP) 54616B 500MHz 2 channel digital £1750 Agilent (HP) EPM 441A (opt 2) single ch. Power Meter £1300
Agilent (HP) 54616C 500MHz 2 channel colour £2750 Agilent (HP) 6812A AC Power Source 750VA £2950
Agilent (HP) 54645D DSO/Logic Analyser 100MHz 2 channel £2750
Agilent (HP) 60638 DC Electronic Load 250W (0-10A) £1000
Hewlett Packard 54502A - 400MHz - 400 MS/s 2 channel £1600
Hewlett Packard 54520A 500MHz 2ch £2750 Anritsu MG3670B Digital Modulation Sig. Gen. (300kHz-2250MHz) £4250
Hewlett Packard 54600A - 100MHz -2 channel £675 Anritsu/Wiltron 68347B (10MHz-20GHz) Synth. Sweep Sig. Gen. £9000
Hewlett Packard 54810A 'Infinium' 500MHz 2ch £2995 EIP 545 Microwave Frequency Counter (18GHz) £1000
Lecroy 9310CM 400MHz - 2 channel £2250 EIP 548A and B 26.5GHz Frequency Counter from £1500
Lecroy 9314L 300MHz - 4 channels £2750 EIP 575 Source Locking Freq.Counter (18GHz) £1200
Philips 3295A - 400MHz - Dual channel £1400 EIP 585 Pulse Freq.Counter (18GHz) £1200
Philips PM3392 - 200MHz - 200Ms/s - 4 channel £1750 Fluke 6060A and B Signal Gen. 10kHz - 1050MHz £950
Philips PM3094 - 200MHz - 4 channel £1500 Genrad 1657/1658/1693 LCR meters from £500
Tektronix 2220 - 60MHz - Dual channel D.S.O £850
Gigatronics 8541C Power Meter + 80350A Peak Power Sensor £1250
Tektronix 2221 - 60MHz - Dual channel D.S.O £850
Gigatronics 8542C Dual Power Meter + 2 sensors 80401A £1995
Tektronix 2235 - 100MHz - Dual channel £500
Tektronix 2245A - 100MHz - 4 channel £700 Hewlett Packard 339A Distortion measuring set £600
Tektronix 2430/2430A - Digital storage - 150MHz from £1250 Hewlett Packard 436A power meter and sensor (various) from £750
Tektronix 2445 - 150MHZ - 4 channel +DMM £850 Hewlett Packard 438A power meter - dual channel £1750
Tektronix 2445/2445B - 150MHz - 4 channel £800 Hewlett Packard 3335A - synthesiser (200Hz-81 MHz) £1750
Tektronix 2465/2465A /2465B - 300MHz/350MHz 4 channel from £1250 Hewlett Packard 3784A - Digital Transmission Analyser £2950
Tektronix TDS 310 50MHz DSO - 2 channel £750 Hewlett Packard 37900D - Signalling test set £2500
Tektronix TDS 420 150 MHz 4 channel £950 Hewlett Packard 4274A LCR Meter £1750
Tektronix TDS 520 - 500MHz Digital Oscilloscope £2500 Hewlett Packard 4275A LCR Meter £2750
Tektronix TAS 475 100MHz - 4 channel analogue £750
Hewlett Packard 4276A LCZ Meter (100MHz-20KHz) £1400
Tektronix TDS 340 100MHz - 2 channel digital £950
Tektronix TDS 360 200MHz - 2 channel digital £1200 Hewlett Packard 5342A Microwave Freq.Counter (18GHz) £850
Tektronix TDS 420A 200MHz - 4 channel digital £1800 Hewlett Packard 5385A -1 GHz Frequency counter £495
Tektronix TDS 540B 500MHz - 4 channel digital £2500 Hewlett Packard 8350B - Sweep Generator Mainframe £1500
Tektronix TDS 640A 500MHz - 4 channel digital £2700 Hewlett Packard 8642A - high performance R/F synthesiser (0.1-1050MHz) £2500
Tektronix TDS 744A 500MHZ - 4 channel digital £4250 Hewlett Packard 8901B - Modulation Analyser £1750
Tektronix TDS 754C 500MHz - 4 channel digital £4500 Hewlett Packard 8903A, B and E - Distortion Analyser from £1000
Hewlett Packard 11729B/C Carrier Noise Test Set from £2500
SPECTRUM ANALYSERS Hewlett Packard 85024A High Frequency Probe £1000
Advantest 4131 (10kHz - 3.5GHz) £3000
Hewlett Packard 6032A Power Supply (0 -60V) -(0-50A) £2000
Agilent (HP) 35665A (opt. 1 D1) Dual ch. Dynamic Signal Analyser £3750
Agilent (HP) 3588A High Performance spec. An. 10Hz - 150MHz £6250 Hewlett Packard 5351 B Microwave Freq. Counter (26.5GHz) £2750
Agilent (HP) 8560A (opt 002 - Tracking Gen.) 50Hz -2.9GHz £5000 Hewlett Packard 5352B Microwave Freq. Counter (40GHz) £5250
Agilent (HP) 8593E (opt 41/105/130/151/160) 9kHz - 22GHz £12000 IFR (Marconi) 2051 (opt 1) 10kHz-2.7GHz Sig. Gen. £5000
Agilent (HP) 8594E (opt 41/101/105/130) 9kHz - 2.9GHz £4250 Keithley 220 Programmable Current Source £1750
Agilent (HP) 8753D Network Analyser (30kHz - 3GHz) £8500 Keithley 228A Prog'ble Voltage/Current Source IEEE. £1950
Agilent (HP) 8590A (opt H18) 10kHz - 1.8GHz £2500 Keithley 238 High Current - Source Measure Unit £3750
Agilent (HP) 8596E (opts 41/101/105/130) 9kHz - 12.8 GHz £8000 Keithley 486/487 Picoammeter (+volt.source) £1350/£1850
Farnell SSA -1000A 9KHz-1 GHz Spec. An. £1250 £1950
Keithley 617 Electrometer/source
Hewlett Packard 3582A (0.02Hz - 25.5kHz) dual channel £1500
Keithley 8006 Component Test Fixture £1750
Hewlett Packard 3585A 40 MHz Spec Analyser £3000
£4500 Marconi 6950/6960/6960A/6970A Power Meters & Sensors from £400
Hewlett Packard 3585B 20 Hz - 40 MHz
Hewlett Packard 3561A Dynamic Signal Analyser £3500 Philips 5515 - TN - Colour TV pattern generator £1400
Hewlett Packard 8568A -100kHz - 1.5GHz Spectrum Analyser £3500 Philips PM 5193 - 50 MHz Function generator £1350
Hewlett Packard 8590A (opt 01, 021, 040) 1MHz-1.5MHz £2500 Rohde & Schwarz FAM (opts 2,6 and 8) Modulation Analyser £2500
Hewlett Packard 8713C (opt 1 El) Network An. 3 GHz £6000 Rohde & Schwarz NRV/NRVD Power meters with sensors from £1000
Hewlett Packard 8713B 300kHz - 3GHz Network Analyser £5000 Rohde & Schwarz AMIQ I/O Modulation Generator 2 channel £3500
Hewlett Packard 8752A - Network Analyser (1.3GHz) £4995 Rohde & Schwarz SMIQ 03B Vector Sig. Gen. 3.3GHz £7000
Hewlett Packard 8753A (3000KHz - 3GHz) Network An. £3250 Stanford Research DS360 Ultra Low Distortion Function gen. (200kHz) £1400
Hewlett Packard 8753B+85046A Network An + S Param (3GHz) £6500
Tektronix AM503 - AM503A - AM503B Current Amp's with M/F and probe from £800
Hewlett Packard 8756A/8757A Scaler Network Analyser from £900
Tektronix AWG 2021 Arbitrary Waveform Gen. (10Hz-250MHz) 2 ch. £2400
Hewlett Packard 8757C Scalar Network Analyser £3500
Wayne Kerr 3245 - Precision Inductance Analyser £1750
Hewlett Packard 70001A/70900A/70906A/70902A/70205A - 26.5 GHz
Spectrum Analyser £7000 Bias unit 3220 and 3225L Cal.Coil available if required. (P.O.A)
Tektronix 492P (opt1,2,3) 50KHz - 21GHz £3500 Wayne Kerr 3260A + 3265A Precision Magnetics Analyser with Bias Unit £5500
Tek 496 (9KHz-1.8GHz) £2500 W&G PCM-4 PCM Channel measuring set £3750
All equipment is used - with 30 days guarantee and 90 days in Tel: 02476 650 702
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MAY 2004 VOLUME 110 NUMBER 1817
....... .. !
..............
1 10 FPGAS DEMYSTIFIED
All you ever needed top know about
Programmable Gate Arrays, but were afraid to 41 CIRCUIT IDEAS
ask. Eddie Insham dons his wizard's hat Jitter generator
Up -Down -pushbutton control for digital
17 IN MEMORIAM potentiometers
J L LINSLEY HOOD MIEE Ultrasonic oscillator
One of the best audio designers ever passed away Low battery warning device
this month. Ian Hickman reflects Traffic light simulator
Long delay timer using only one 555 chip
1 18 A NEW MONITORING Blown fuse indicator
TOOL FOR 5.1 AUDIO
In a slightly off -topic article, Richard Brice looks 48 NEW PRODUCTS
at the eccentricities of monitoring multi -channel The month's top new products
sound in a professional environment
50 NOT ME, GUV
The ubiquitous Ivor Catt has a go at the EMC
fraternity
LF
INN
Centre RF
52 CELL PHONES SURGE
AHEAD
Ian Poole reports on this month's 3GSM
Congress in Cannes
LFE
55 LETTERS
LS RS Clangers
Archiving
802.11
Cathode Ray and M. G. Scroggie
Audible distortion
26 PRECISION RECTIFIER The safe route
CIRCUITS
Intrigued by a recent Circuit Idea, Alan Bate has 60 WEB DIRECTIONS
some different ideas Useful web addresses for electronics engineers
Vertical
Sockets T13A/4 @ £20.25 ea. Nett
6 Sockets T13A/6 @ £24.60 ea. Nett
8 Sockets T13A/8 @ £31.47 ea. Nett
10 Sockets T13A/10 @ £34.95 ea. Nett
12 Sockets T13A/12 @ £39.62 ea. Nett 111
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I
Olson Electronics Limited
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EDITOR
Phil Reed
[email protected]
CONSULTANT
Ian Hickman
The end of an era
CONTRIBUTING EDITOR
As I'm sure you read on please send them in, as
Martin Eccles the cover, one of next month we will be
PRODUCTION EDITOR/DESIGNER our great audio running a proper
Jane Massey circuit designers memorial to him, When I
passed away this say next month, I mean
[email protected] month. as soon as you read this
Elsewhere in this - get them over as we
EDITORIAL E -MAILS
issue, Ian in electronics only start the next issue
[email protected] Hickman has
Oetime a few days after you
EDITORIAL ADMINISTRATION penned an obituary, are reading this. As we
so I won't go on too only got the news a
Caroline Fisher much. few days before going
01322 611274 John Linsley to press, I've not been
[email protected] Hood's name first able to do much this
came to my attention month, but our
GROUP SALES when I joined the BBC - sympathies go out
in 1970. The 1969 Class I, to his wife, June
Luke Baldock A design was rapidly who kindly
01322 611292 gaining a 'cult' phoned us with
[email protected] following. Almost the sad news.
everybody in London On a different
PRODUCTION EXECUTIVE studio engineering had a note, I've been
Dean Turner couple of channels going, noticing that
and I even put a pair in some of the spats
[email protected] my car! I built them from in the
01322 611206 bits in the junk box and a letters
set of PCBs that a bloke on section
CLASSIFIED FAX the other shift was selling have been
01322 616376 through WW. In fact, he getting far
advertised his extension a life titne , too
MANAGING EDITOR number in the ad - and got ..antleri
electrook personal. It
Bill Evett people on the other shift to is for this
take messages when he reason that
PUBLISHING DIRECTOR was not there! A bit of I've pulled
Tony Greville brazen profiteering. some recently.
Completely 1 So if you were
coincidentally, next following a juicy
ISSN 0959-8332 month we start a series thread, apologies.
of audio articles from If you are one of
,
,
SUBSCRIPTION QUERIES
Graham Maynard, nns the authors -
Tel (0) 1353 654431 who pulls heavily on please keep it
Fax (0) 1353 654400 JLH's early work. down a bit to
Disclaimer
The Class A design is ensure publication.
We work hard to ensure that the information referenced more than And I don't care
41 presented in Electronics World is accurate. once, so I think it is who started it, but
However, Electronics World's publisher - appropriate to suffice to say that I
Highbury Business - will not take responsibility
for any injury or loss of earnings that may result
reprint the original Class will be handing out
from applying information presented in the A article as a tribute to the great man. detentions!
a magazine. It is your responsibility to familiarise So, if anybody has any comments,
yourself with the laws relating to dealing with recollections or just plain tributes to pay, Phil Reed
your customers and suppliers, and with safety
practices relating to working with
electrical/electronic circuitry - particularly as
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116
FPGAs
demystified r.
Starting on any new technology can be a difficult process if the first few
steps are not very clear. A typical case is getting to know
Programmable Gate Arrays. Eddie Insam explains some of the facts,
and describes a step by step guide on getting started and building your
own simple programming development kit
Aweek hardly passes by without of which having a purpose in life that gates, counters and flip-flops that are
us being bombarded with appears to be completely unknown. dispersed around a PCB to provide
information on new products, No wonder many designers who have general interfacing, buffering and
new techniques and new devices. not been brought up on the subject address decoding. Their advantage,
Adverts and press releases are from college days are avoiding or from a commercial point of view, is
peppered with words such as refusing to get involved in this magic that GAs are cheaper and occupy less
`solutions' and 'benefits' that to me at world. board space than the discrete ICs
least, don't convey much information. This article will dispel some of the they replace. In order to make GAs
Perhaps this is because I cannot see myths. Even if you are not interested work, they need to be programmed
the problem they are addressing in the in using GAs, the article will induce (not unlike a PROM). The fact that
first place. The press releases some confidence by introducing they can be fuse -programmed in
themselves don't help much by not some of the jargon. For those wishing place means designs can be tweaked
mentioning it either! This kind of to become more involved, there will and modified after the PCB has been
situation can be very confusing to a be a step by step guide, including an committed to production.
newcomer or to a recent graduate. easy to build circuit for a As GAs became more powerful,
The basic chicken and egg dilemma is CPLD/FPGA device programmer they started to be used as sub -
that if we know little or nothing about that won't cost a fortune. This, modules or as complete designs in
a concept, it is unlikely that we will together with the free tools available their own right. For example, as
gain much information from material for download from the internet, will purpose built interfaces to
presented about it in an abstract way. make the inroad into GA know-how microcontrollers, as fast UARTs or
We won't understand what they are accessible to anyone. as complex communications
trying to say, or appreciate their controllers for Ethernet or encryption
benefits. Where would I use a gate array? systems. The latest generation of
One such area is Gate Array Traditionally, GAs are used as direct GAs are powerful enough to include
Technology (GA), also known under replacement for glue logic. This is their own built in CPU cores, which
various other names such as PLDs the term given to the various logic can be used for standard computing
and FPGAs. This is a typical example
of a line of products that live in a Not real electronics?
jargon fenced world, and which can
put a dead stop in anybody's learning Gate Arrays? Surely they are not 'real' electronics, where is the fun in that?
curve. The main barriers are a lack of If you are one of those people who think projects involving GAs are not
appreciation of the uses they can be for you because they are not 'true hardware' and would prefer to design
put to, a perceived high cost of entry projects using discrete CMOS or TTL logic, this article is definitely for you.
and the difficulty in knowing where If it is because you are afraid to get into the technology, even more so.
to start. Unless you are lucky or rich You do not know what you are missing! Even if you are a firm believer in
enough to attend a course or seminar, the old ways, there is good information here to allow you to understand a
the only practical way to enter this bit on how they work, the jargon they use and what they could do for you.
secret world is by reading existing Admittedly, any new technology takes away established methods that
literature. Unfortunately, a lot of the we may feel confident with. Gate Arrays do not take the fun out of
information available seems to electronics; they just place on a different level. There is an odd sense of
assume you know all about the achievement when you try, modify and improve a logic design on
subject and have a lab full of software before you commit to a PCB or even pick up a soldering iron.
equipment and software tools, most Welcome to the new order!
PRO GRAMMABL E
AND ARRAY
44 x 1321
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1.1757 OUTPUT
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Logic
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(A)
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4
(B) The more advanced CPL Ds and FPGAs consist of hundreds of Logic
Array Blocks linked together in a 2D array of cross -connecting links
(A). Each Logic Block consists of one or more Logic Element Blocks or
macrocells (B) Each Macrocell consists of a Flip-flop plus
programmable feedback logic (C). Various extra circuits can be added
to the die, e.g. PLLs, clock multipliers, special purpose I/Os, RAM and
even full CPU cores.
Cascade
I Pr To FastTrack
data 2 PRt
Table Interconnect
data 3 (LUTY
; Chain Chain Pro C
datact -NW>
-OP ENA
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Logic
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labctd3
(C) labctrl4
12
ELECTRONICS WORLD May 2004
older use established MOS size and their building blocks can be or unallocated.
techniques mainly devised to achieve far more complex. Figures of several Families are also divided into
fast switching speeds, with million transistors on a die are not CPLDs and FPGAs as described
propagation delays of 5nS or less. uncommon. above. In general, most CPLDs
One hidden aspect of this technology One small price to pay with most include permanent program storage,
is that static power dissipation can be current FPGA technology is that and FPGAs require external
quite high; a factor to consider when programming is not permanent. In configuration devices. This division
calculating overall board costs. From other words, the fuse link information is not always strict, Atmel for
the programming point of view, is stored in RAM within the device example, have an FPGA technology
devices are either one-time and must be re -loaded every time that includes permanent program
programmable (in -site or at the power is applied. This requires storage. In the simplest of terms,
factory) or re -programmable by the external boot loading circuitry known CPLDs will be used in applications
use of electrically erasable memory as configuration devices, which are requiring up to 512 registers (flip-
cells. Depending on technology, nothing more than special purpose flops) and FPGAs where more than
special voltages and pulse patterns flash EEPROMs holding an image of these are needed.
may be required, and as the fuse map. The main parameters distinguishing
programming information is not Improved processing techniques members of a family are the number
always openly or freely available now allow whole sections within a of gates or macrocells per package,
from manufacturers, special FPGA device to be allocated for the number of I/O pins, the package
commercial programmers may need special tasks such as RAM, special type (which limits the total number of
to be obtained. purpose I/O or even complete I/O pins) and other features such as
Programming information takes the embedded micro -controllers. As an on chip PLLs and special purpose I/O
form of fuse co-ordinate listings. example of current technology, the drivers. Subtle differences in the way
These are collections of ones and Xilinx Virtex II/PRO series contains the macrocells are designed allow for
zeros that more or less mimic the the equivalent of 4Mb of dual port some manufacturers to offer 'better'
fuse map geography within the RAM, over 45,000 registers, I/O that implementation of commonly used
device. These files can be generated can operate in the Gigahertz range logic blocks, for example patented
by hand - a rather laborious task - or and four (yes four) embedded Power ultra -fast carry look -ahead adders,
with the help of computers and PC CPUs, all in a single package. and tricks to improve performance,
compilers using descriptive such as on -chip clock frequency
languages which take as input node Let's talk Klingon multipliers or phase locked loops.
allocations in the form of text and If you already know that 'Spartan Families do not always
logic equations, more on this later. delivers Serdes at Gigabyte speeds' complement each other in a logical
The next step in the development has nothing to do with Greeks way but overlap widely. This may
ladder is Complex Programmable spreading nasty diseases, you may seem confusing and can make device
Logic Devices (CPLD). These are in perhaps want to skip this section. choosing rather complicated. The
the main, evolutionary variations on Mythical and obscure product names reason for this is partly because the
the PLD theme. The register flip- are ripe in the Gate Array world, market is technology driven. New IC
flops are placed in a two dimensional possibly one of the reasons why the fabrication techniques quickly make
row and column grid with the uninitiated may want to shy away. previous families obsolete. With such
interconnections straddling them, just One should not expect these magic short design cycle times, many users
like the streets on a city map (Figure names to be acronyms for anything out there will still be designing using
2). This allows many more registers (at least as far as I know). Just like `older' families, which could result in
to be placed on a die. Cell designs car model names in TV commercials, a lot of confusion and aggravation.
can also be more complex, typical they possibly sound good to the ear Manufacturers are keen to continue
CPLD devices can have 256 registers and convey an element of wizardry to support for previous families, while
or more in a single package, making the people who program them. at the same time nudge users to move
them reasonably powerful. The basic Four manufacturers dominate the to newer processes, which are usually
flavour of the month technology is field, of which two: Xilinx and Altera cheaper and more powerful. This can
CMOS, which has the advantage of are the brand leaders. Others, such as make sense from the manufacturer's
low power consumption. Lattice, Atmel and Actel, command a point of view, who does not want to
Programming in the main is smaller section of the market, but be lumbered with many legacy
performed at standard logic levels, provide good competition by the manufacturing processes. From the
using a simple serial protocol, doing introduction of innovative features user's point of view however, this
away for the need for special and originality in their devices. policy can be a disaster, especially
programming voltages or specialist Devices are grouped into 'families' when it comes to maintaining a
hardware (a microprocessor can be with heroic sounding names such as multitude of end products using a
used to generate the programming Spartan, Acex or Stratix. These are in range of different devices. Some
signals) the main, variations of a particular families have become more settled
Beyond CPLDs are the generic fabrication technology, MOS Type, and popular than others, this is
Gate Arrays (GAs), which include or cell size in microns. Devices are reflected in prices and stock levels
Field Programmable Gate Arrays arranged by size, number of devices from the various suppliers, an
(FPGAs.) The generic FPGA and external package outline. The important factor to consider when
architecture is similar to that of more complex devices are used in selecting devices in a new design.
CPLDs, but using much smaller applications where a large number of
transistor cells and corresponding I/0 pins are required, so they are The story so far
miniature MOS technologies (CMOS usually fitted into the larger Here is a summary of current status.
requires massive surface areas per packages. This is not always the case, Of course, no guarantees that this
gate in comparison) FPGA and most FPGA designs end up will all be superseded by the time
macrocells can be much smaller in leaving most of their I/0 pins unused you read this! The list given below is
by no means complete and only at superseding these, although there even 1.5 volts. Many FPGAs have
offered as a general guide. Readers is still plenty of life left in the two separate power supplies, one for
should refer to the published existing ones. More advanced the internal core (at say 2.5V), and
literature and manufacturer's families include Excalibur, with a one for the external I/O drivers (at
websites for the latest information. built in ARM 922T CPU processor say 3.3V) this makes them
core. Mercury, aimed at high speed compatible with external discrete
CPLD I/O intensive products. Hardcopy, logic circuitry even though internally
The current Altera CPLD families are aimed at bridging the transition they are operating at a lower voltage.
the MAX7xxx and MAX3xxx. The between FPGAs and custom ASICs. Most CPLDs and FPGAs are not
last three digits indicate the number APEX, a high power, general- normally compatible with external 5
of flip-flops or registers per device. purpose device, culminating with volt logic, even though some devices
For example the 7128 is a 128 STRATIX at the top end. Xilinx with 3.3V I/O drivers can accept 5
register device. The 7xxx series is offerings are less complex: their volt logic level inputs (a 3.3V output
now a 'mature' family (another word mature technology includes the XC from a GA device can correctly drive
for obsolete) and it is one of the few series topped by the SPARTAN a 5V CMOS or Tm logic gate).
remaining parts that can still operate series in various disguises, and Because of their design, CPLDs
from 5 volt as well as 3.3 volt power VIRTEX at the top end, again in have a relatively static current
supplies. The newer 3xxx family, various disguises (see table). Top end consumption, independently of
recommended for new designs, uses devices can offer serious processing number of gates 'active' and only
3.3 volt supplies only but its I/O pins power, with data bandwidths in the rising slightly at higher clock speeds.
are 5 volt tolerant. Xilinx CPLD Gigabit per second range and On the other hand, the current
families are the 9500 series (with up computing power, e.g. DSP with consumption of a FPGA is directly
to 72 registers), and Coolrunner, equivalent performance in the 2 dependent on the number of gates
noted for its low power consumption. GigaMAC range. active and the clock speed (i.e.
Lattice CPLD families are the number of transitions). Power
Machl , Mach2, Mach4 and the latest On power supplies and interfaces dissipation is also dependent on the
Mach4000 series, which offer up to Here is a little quiz: a large integrated software programming method used,
1024 registers. circuit may contain several million for example a synchronous system
Prices for CPLD devices start from transistors; assume for simplicity that where all the clocks are fed from the
less than a dollar each for the smaller each has a dynamic load of about a same high speed source, and the use
devices, making CPLDs very cost megohm. Simple calculations of clock enables, which may or may
effective as a replacement for random (assuming a 50% on/off ratio) tell us not reduce clock dissipation.
glue logic. In general, CPLD prices that the average resulting load The moral of the story is simple,
(and power consumption) are directly between VCC and GND is less than before selecting a device for a
proportional to the number of gates in an ohm. With a five volt supply, the project, make sure you have read all
the die whether they are used or not. corresponding power dissipation will the documentation and application
So it does not pay to over specify a be about 25 watts. In order to reduce notes on power supplies and I/O
design using a CPLD that is larger this large sink, manufactures have interfacing. Most give charts of
than necessary. developed MOS technologies power consumption versus speed,
working at lower voltage supplies. and number of gates in use.
FPGA Since a device that runs at half the
The more mature Altera FPGA voltage consumes only a quarter of Line driving
families are the FLEX6000, the power, this strategy is sound. FPGAs are heavily used in
FLEXIOK, and the ACEX1K series. Most of the newer FPGAs (and telecommunications, display panels
The latest Cyclone family is targeted CPLDs) operate at 3.3, 2.5, 1.8 or and CPU bus drivers. No wonder
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the war, at Reading University. In 1942 he Class AB Audio Amplifier, Wireless World, John's interests included the important
joined the G.E.C. Research Laboratories at July 1970, pp 321 - 324 and the latest Class A topic of measurements. Lord Kelvin or
Wembley, working on magnetron Power, Electronics World, September 1996, Rutherford or some similar luminary once
development as a junior member of the team. pp 681 - 687, although I'm sure there are said that if you cannot measure something,
In 1943 he joined the R.A.F. in aircrew but more of his articles tucked away somewhere. you don't understand it - a truer statement
was transferred to work on radar. He But don't get the impression that John was you will not come across in a very long time.
subsequently worked with T.R.E. (Malvern) only interested in audio power amplifier An exceedingly useful piece of measurement
overseas. After a return to university he joined design, although he did stand in the great equipment for anyone interested in audio, is a
the Windscale Research Laboratories of the tradition of interest in this topic in Wireless distortion meter. John published in WW, July
Atomic Energy Authority. He was placed in World, from D. T. N. Williamson onwards. 1972, pp 306 - 308, a design for a Portable
charge of the research laboratories of British But other articles of his included Linear Distortion Monitor, designed using discrete
Cellophane Ltd. in 1954. In the late 70s John Voltage Controlled Oscillator (WW, Nov. semiconductors and based on an all -pass filter
retired from British Cellophane Ltd. and set 1973, pp 567 - 569), Putting the quality back section implemented with a Wien Bridge
up his own business from home, as a circuit. This was intended for use in
consultant and writer of books and articles, as conjunction with an oscilloscope to view the
Robins Electronics (Robin being the Components list "residual" - the distortion products - once the
Resistors
nickname by which he and his brother were 1 - 900k 19 1.5M.2% fundamental has been suppressed, or with an
2 - 100k, lin. 20 1584, 2%
known in the forces and elsewhere, on 3 - 22k 21
-
- 4.7k AC millivoltmeter to obtain an approximate
4 - 47k - 4.7k
account of the surname Hood). In a long and 5 - 15k, 5%
22
23 - 5k. preset
figure for the THD. I built at least two of
distinguished career, John published many of 6 3.3k, 5% 24 3.3k, 5% these, one using a twin gang 500pF capacitor
7 - 22k, 5% 25 - 15k
state-of-the-art articles, which I always found 8 - I.8k, 5% 26 820, 5% as in the original design, and one using fixed
9 - 470k 27 - 68k, 3%
of the greatest technical interest. From 1962 10 2.5k, lin. (10 toms) 29 39k, 5% capacitors and a two -gang pot, to avoid the
- 3.3k, 5% 29 471r, 5%
he lived in Taunton, in a house called / I
2 -
BC109 (C)
MPSA14
4
5, 6, 7
-
-
2N4058
BC109
others, and many readers, like me, will feel
John will long be remembered, by many 3 - 2544302 that they had come to know him a little also.
readers including younger ones, for his He will be sorely missed.
Multi -channel audio has its channel arranged as shown in pairs in the following way:
historical roots in the cinema Figure 1. left front, right front (LF, RF)
industry where a sense of The low frequency channel (LFE) left surround, right surround (LS, RS)
periphonic sound has long been was originally termed the 'Baby centre and low frequency
thought a great benefit to the overall Boom' channel for its original enhancement (C & LFE)
entertainment. Despite a multiplicity adoption in Star Wars in the late Unfortunately, the presentation of
of products, a standard has gradually nineteen -seventies and is reserved these signals, either on peak -reading
emerged which, whilst it fails to and engineered to provide the type or power -averaging type meters,
provide accurate periphonic physical sensation we associate with is both difficult to interpret and gives
localisation, nonetheless provides a deep space explosions (albeit that very little visual information about
degree of audio 'envelopment' which these take place in a vacuum!). the 'enveloping' 5.1 sound -field. An
is deemed by film makers and attempt has been made to improve
audiences alike to be the most Monitoring upon this situation by DK-Audio A/S
important factor in the enhancement Because of its increasingly wide of Denmark in what they have termed
of their entertainment. That standard spread adoption, the requirement for the 'Jellyfish display' as illustrated in
has become known as 5.1 multi- a suitable monitoring device for 5.1 Figure 2.
channel audio; these numbers audio is becoming similarly In this computer -generated
referring to the fact that the system widespread. At the present time, the presentation, the positions of the five,
comprises five full -bandwidth most common is the presentation of full range loudspeakers are marked
channels and one reduced bandwidth, three quasi -stereo channels; the 5.1 on a graticule and the amplitude
low frequency enhancement (LFE) audio being broken down into three distribution of the sound -field is used
to modulate a visual 'blob' which sits
in the middle of the screen. This
amplitude induced distortion of the
`blob' is very highly damped, such
that if a signal of consistent energy is
used to energise - for example - the
left front loudspeaker, then a tentacle
grows out of the blob in the direction
of the speaker position. When
energised with complex multi-
channel programme the overall affect
resembles a dancing jellyfish!
Whilst this approach is rather fun,
in my own experimental 5.1 mixing
sessions, I have found it to be not
terribly useful. The problem is that
the damping is so high that the
Figure 1: The display fails to register all but the
standard 5.1 listening largest contours of programme
arrangement dynamics. In addition, it simply
moves from extreme left (LF) to generate the X(R) and Y(I) signals Further Improvements
centre (C) in quadrant 1 as the pan is for the first quadrant. A simplified Nowadays, an analogue
operated, the various points circuit for so doing is given in implementation is outdated, but - as
indicating one -tenth of the overall Figure 8. stated above - these ideas are easy to
pan -control rotation. The reason for Interestingly, this alternative translate to either a hardware digital
this non-linear result is the effect of approach has exposed the unexpected or to a software implementation. One
the rectifiers. Looking at the circuit result that, depending on the pan law, limitation which might easily be
in Figure 4, you can see that the at some phasor arguments, the phasor addressed in a software
positive values presented to the Y(I) magnitude appears distorted as implementation would be the
output will be the rectified result of revealed in Figure 9. In the figure, addition of a conventional PPM
the LF signal and the Centre signal the phasor positions are given for linear meter to monitor the LFE
and, in each case, the instantaneous, twenty points between full LF and
positive value will be whichever is RF passing through Centre.
the greater of these two signals. That Two laws are plotted, constant -power
accounts for the inflection in the (diamonds) and constant -gain
curve in Figure 7. (squares).
This result is neither accurate nor However, as Figure 9 reveals, in
intuitive and something better is spite of the phasor amplitude
evidently required. One way of distortion, the phasor arguments
approaching the problem is to say, accord well with the pan -control
`what is really needed is a fifth deflection irrespective of pan -law and
oscilloscope deflection plate between this is a big improvement over the
the positive Y plate and the positive original circuit. Furthermore, it is
X plate, energised directly by the widely recognised that neither the
Centre signal' (as shown in Figure piecewise, constant -power (sine -
Al in the Appendix). Naturally this cosine -sine) approach nor the
would be impossibly expensive and constant -gain approach are ideal for LS RS
- in any case - unnecessary, because pan -controls for three loudspeakers in
it's possible to produce an identical the forward arc, being deplored on
LFE -18415
effect to this extra plate by both psychoacoustic (Rumsey 2001)
OdBFS
energising the positive X and Y and theoretical (Gerzon 1992) One-up
plates with a Centre signal multiplied grounds. Certainly the phasor
by sine 45 degrees and cosine 45 distortion on the proposed display Figure 10 The final graticule for the new monitoring device.
degrees respectively3. This is during LF-C-R pans supports the
accomplished in circuitry by reservations of these authors. (See
rectifying the Centre signal, reducing Appendix 1 for a further discussion). References
its amplitude by 1W 2 and summing Gerzon, Michael A. 1992. Panpot laws for multispeaker
it with the signals for LF and RF to The Final Design
stereo. 92nd Convention of the Audio Eng. Soc., Vienna.
Comparing the Figures 5 and 6 with Preprint 3309.
1.40 the disposition of the speakers in
relation to the listener as shown in Holman, T. (2000) 5.1 Surround Sound Up and Running.
Figure 1, it is evident that rotating Focal Press
1 00
the entire display by 45 degrees Riimsey, F. (2001) Spatial Audio. Focal Press.
0 80 would be advantage to the user;
because the mapping of the resulting
0E0
phasors would better coincide with 1After Jules Lissajous who was professor of mathematics at
0.40 the listening room arrangement. the Lycee Saint-Louis in Paris in the mid eighteen -hundreds
Now, any point (x, y) may be rotated and who studied vibrations by means of mirrors attached to
0 ^0
by any angle (a) by means of the perpendicularly mounted tuning forks of related frequencies.
0.00 matrix multiplication:
0.00 0.50 1.00 1.50 2Assuming a constant -power (sine -cosine) law.
Figure 9 : Various pan laws as (x , y) . cos a sin a = ( , yR) 3Assuming linear amplifiers and linear deflection
displayed on the proposed display. -sin a cos a
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Appendix
1.40
Is there a better LF-C- RF pan -law? phasor (c, d) and (a, b).
Given the fact that the constant - More generally, we can say that, 1..0
unreasonable to turn the argument aligned with the Y-axis, the value of 000
`on its head' and use the display to c will always be zero. Secondly, 0.00 050 100 1.50
0.20
0.20
at salesteamMoffinbooks.demon.aluk
Jul 2003 A 352 pages Index A PB Sept 2002 A 365 pages & CD -Rom
When placing orders please quote row
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24
INTRODUCTORY BOOLEAN
POSTAGE & PACKING FREE IN THE UK* TOTAL
COURSE BOOGIE: AN
John Morton UNCONVENTIONAL
(University of
Cambridge)
AVR GUIDE TO ELECTRONICS
Name Daytime Tel
Address
a AVRs have certain strengths Clive Maxfield
compared to other microcontrollers but are less The second edition of this comprehensive Postcode
well-known or understood. The author wrote this introduction to contemporary electronics now has
guide to introduce AVRs to those who have little or I enclose a cheque/postal order value £ payable to 'Boffin Books Ltd'
added material. It is written for the engineer,
no microcontroller background and to encourage hobbyist or student who needs a thorough
Please debit my Access/Visa/Switch/Delta card Issue number (Switch only)
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a 25
rectifier circuits
Intrigued by Darren Heywood's precision full wave rectifier circuit
described in the January 2003 issue of Circuit Ideas (EW page 36),
Alan Bate has come up with some different ideas
6.90-
Tr6
Tr7 2N3000 6.80_
269041
R10 R8 > 6.70-
lb1 2N3904 1b2
2.2k I 2.2k
I I
6.60-
TO 243900 I
1 .46 mA
6.50 I ' I
e4
E.12 00
0 Volt a
00
Mismatch of differential gain in the first stage due to R2
introducing Miller feedback around the current tail
transistor Tr3
Figure 3: DC conditions of Mr. Haywood's output stage. 10 00
9.00
At the mid point the two arms of signal, significantly reducing the 100 fk 10k 100k 10M !WM
Frequency (Hz)
the output stage equally share the dynamic range and progressively
output current, so assuming the increasing low level distortion. This Figure 5a
compound pair gain remains constant effect when referred to the input is
1400-
with Iout and their Vbes (Tr4, Tr5) are diluted only a little by the modest
equal; voltage gain (7:1) of the preceding
Voltage input at the null point = stage.
(Iout/2) (R10/ Ai + R20) + R22. Lout Looking at the compound pairs, the 6 67- 71, 31224
+ rele (Tr4) + Vbe4. (Eq 2) collector loads R16 and R17 are X II? 4310 V921
Now, assume the current in Tr4 is unnecessarily large. Here there are
a 12430 303
« Tr7, i.e. the bulk of the output conflicting requirements as R16, R17
current passes through Tr7, not should be: -66667m-
through the re of Tr4. Running a DC 1. Lowest possible resistance, in
Simply decoupling the current tail transistor Tr3 for correct
SPICE analysis showed lc of Tr7 = order to rapidly remove base charge common base operation cures the problem
1.46 mA and lc of TR4 to be only from Tr7, Tr6 for good high
34.3RA. Hence, we can ignore the frequency performance. -800
100 fk fOk 100k 1M fOM NOM
volt drop across re. Then: 2. Highest possible value, to Frequency (Ft)
Change in Vir, = (Equation 1) - efficiently transfer the current signal Figure 5b
(Equation 2) from Tr4 into Tr7 and achieve the
Differential pre -amp stage Figures 5a & 5b:
Delta Vin = I(R10/Ai + R20). Iout/2 highest current loop gain in the
SPICE simulations
As the compound pair current gain compound pair. Considering the long tail pair input
demonstrating the
Ai, is very large, we can ignore the R15 and R18 are not a good idea as stage the current tail transistor Tr3
increasing imbalance
volt drop across R10, simplifying the they not only suppress gain in the should be operated as a constant
in differential gain.
change in Vi to: wrong place but also raise the input current device for efficient current
Delta Vin = R20.(lout/2) impedance of Tr6, Tr7 and further signal transfer at the emitters of Trl,
For an output current of 3mA reduce the efficient transfer of signal Tr2. This means operating Tr3 in
which is what Mr. Heywood's circuit current from Tr4, Tr5. grounded base to give the highest ac
runs at: The third improvement would output impedance (around 1MQ at
Rectifier stage dead -band, Delta be to ac couple the long tail pair low frequency for common base).
Vin = 1.5(mA) x 68 Ohms = ±102mV preamplifier to the output stage. This requires voltage DC bias of the
See Figure 4 of the SPICE This blocks any unwanted DC base and de -coupling it to ac right at
simulation of the output stage imbalance in the first stage, which any the base with a (low inductance)
differential DC transfer function way is ac coupled on its input so there ceramic capacitor. R2 defeats this,
about the DC null or steady state is no point in preserving DC coupling allowing a 'soggy' operation
showing the dead -band discussed with all the associated temperature somewhere between common emitter
above. drift problems. and common base, giving a less
This causes the output circuit to be The bias requirements of the output efficient constant current sink and
`blind' to the middle of the incoming stage can then be optimised separately. worse allows Miller feedback around
1kit 2
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250 0 v
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33F7- C.3 Is
?11823 rots MO m5
.soomUt' ILO mV 150 mV
1500 I r
' '"I ' "I "1
Figure 9a: Original circuit linearity at 500kHz.
101 1008 1M 10M 100M
Frequenry 1001
53)-
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:bra.
x ee,., v636
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Figure 10: Reduced dead -band enhanced circuit. Figure 11: Outline of original valve cascode RF amplifier.
02814,
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Input signal level mV Time 0)
Figure 13: Linearity at 500kHz of the enhanced circuit using the PNP rectifier output. Figure 14: Folded cascode waveforms at 500kHz.
been around the circuit more than The USB-DUX is the perfect unit for real-time data acquisition in the
lab, the plant or the home. It plugs into the USB port and works
a couple of times? under Linux. The driver is written under the COMEDI framework,
which means that it is easy to program and benefits from a growing
a Subscribe. library of open source programs. You don't even need to open your
computer-just hot plug into the USB port!
www.Iinux-usb-daq.com
theory' became the stock -in -trade of on. Each of the eight possible 3 -bit minor) variations, some more Figure 1:
every technician. input words thus gives rise to its economical in gates than others; our Moore's circuit
Hence, overtaken by studies into complementary word at the outputs. example is picked for its functional
the more challenging finite state Normally speaking such a transfer clarity. Interested readers might like
machines, as a subject of research, function would be achieved by using to seek for a more parsimonious
switching theory dropped into the three inverters (NOTs) connected circuit using one gate fewer than
background, furnishing instead a between each input and output. Figure 1 (multi -input gates then
well -knit body of established results Problem: Design a network using being counted as if built up from 2 -
that found daily application in any number of AND and OR gates, input equivalents; Figure 1 thus
electronic logic design. This is not to but not more than two (2) NOTs to containing 11 ANDs and 14 ORs). In
say that all the theoretical questions achieve exactly the same input-output view of its importance to what
raised had been successfully function. (The ANDs and ORs may follows, a few comments on Moore's
answered. Many problems, especially have as many inputs as required.) circuit will be worthwhile.
in the area of minimization, remained Now relays, gates, switchery and Central to every variant of Moore's
1 unsolved; later these would provide a logic hold a powerful fascination for solution is circuitry leading to a
point of departure for the currently some. The possibility of simulating binary representation of the number
vigorous theory of circuit complexity three inverters by means of two had of zeros present in the input word
(see reference 4), a field closely never so much as crossed my mind (xyz) by the four possible states of
related to, yet historically distinct before; the bare contingency hinted the two inverter outputs: 00 = none,
from the old switching theory. In any indefinably at something wonderful. 01 = one, 10 = two, 11 = three zeros.
case, mass -production techniques had It seemed to call for ingenious Simple as this may seem, there is but
extinguished any practical need for circuitry. The puzzle had me hooked a single way to achieve it. In effect,
such solutions. Gone forever was the in no time. each inverter's output state (0 or 1)
pioneering impetus of the early days. It turned out to be a far tougher must represent a classification of xyz
Who then would have expected to conundrum than first imagined. So according to whether the number of
stumble across an undiscovered much so, in its elusiveness it became ones it contains falls in the top or
nugget still reposing amid the slag - hypnotic. In fact, on and off I took bottom row (first inverter), and in the
heaps of this abandoned mine? almost a fortnight to solve it, left or right column (second inverter)
succeeding even then only through of the following table:
A Knotty Problem reasoning aided by trial and error. B
Recently browsing through A But the solution was worth waiting
Computer Science Reader (Selections for: an intricate network of true 1 0
from Abacus, Springer-Verlag 1988), Platonic elegance and inevitability. It
my eye was caught by an article on is a logical constellation that was 1 0 1
A
Automated Reasoning by Larry always there, sooner or later someone 2 3
0
Wos5. Wos illustrated the working of was bound to find it: a sheer poem
his reasoning program by means of a for the switching theorist. As the In this way the intersection of A's
few example problems, one of which sequel shows, the name of the man row and B's column choice pinpoints
immediately captured my attention. who did find it first turned out to be the number of ones (and thus, zeros)
It was this: Edward F. Moore, a distinguished in the input word.
pioneer in the field of automata In our circuit, use of AND gates to
theory. From now on I shall refer to combine this information with the
the basic arrangement as Moore's specific input pattern enables a
circuit. Incidentally, Wos's complete decoding of the input word.
17'
automated reasoning program was See how each of the seven lines
successful in solving the problem; his feeding the three OR gates at the
method being too complex to outline right is uniquely activated by a
The black box above receives here, a detailed account can be found different input word (indicated). The
binary inputs (0, 1) at x, y and z. in reference 6. circuitry to the left is thus a '3 -bit to
Each output line yields the One version of Moore's circuit is parallel decoder'. Note that although
complement of the corresponding shown in Figure 1. The network available, the eighth line (23 = 8) is
input; that is, if x is 0, x' is 1, and so admits of a number of (essentially unused since, when active (i.e. when
>>
NETWORK 2 one senses a surprising latent potency the 3 -termed, square -bracketed Or
y here, although, as we shall see, most expression deputizes for the OR -gate
of the magic in Moore's circuit lies wired to its input, and the three
do o d'
exactly in the mischievous recoding parenthesised terms stand in for the
he did choose. AND -gates communicating between
Speaking of coding and recoding the input pairs xy, xz and yz and the
Figure 2: x = y = z = 1), all outputs are to serves to recall that a circuit diagram OR inputs. Note how the nesting of
Four NOT -functions remain 0. is a kind of coded representation and expressions reproduces the pattern of
from two inverters. Similarly, the three interconnected thus itself capable of translation into outputs feeding into inputs in the
output ORs comprise a 'parallel to 3 - different symbol systems. A change circuit. We are looking at a fragment
bit re -coder', the coding in this case of medium often brings new aspects of Moore's circuit written in a
ensuring that xyz inputs that are 0 into view. An obvious alternative in different language.
result in corresponding outputs that this connection is Boolean algebra. Analogously, and taking advantage
are 1, and vice versa: an active `xy7' Re -expressing Moore's circuit in of the above, a compact expression
line turns on outputs y and z, for these terms is a mere mechanical representing the output B of inverter
instance. A point to observe though is exercise. B can also be written:
B Not[(x & A) Or (y & A) Or
Figure 3: (z & A) Or (x & y & z)].
Recursive nesting Note how the presence of A as an
to produce N argument in the function describing B
0
-0
>>
a1 ai
negations from is more than a convenient
two inverters. abbreviation, it reflects A's
antecedence in the signal processing
path: the value of A must already be
available in determining that of B,
but not vice versa, a point we shall
have cause to recall later. However,
0
a2 -0a2 the real convenience of these partial
descriptions becomes clear in the
crisp encapsulation of the complete
Moore circuit they now facilitate:
x'= [(y & A) Or (z & A) Or
(B & y & z) Or (A & B)]
4- delay
-o
(A) causes brief hunting up the papers from Gilbert SN74LSO4 chip) and replace with
Boot
pulse at the output and Markov. Alas, the journals were connections to two inputs and outputs
of the AND to not available in Nijmegen; there was on the other. This is exactly what I AND
- spike
which they are nothing for it but to order copies. did. In the photograph below, the twin 0
connected That would take a week or so. In the Moore circuits are formed by the two
meantime I returned to the 4 - groups of eight chips furthest from the 0
References
7 M. Minsky, Computation: Finite and Infinite
1 B. Russell, The Autobiography of Bertrand 4 J.E. Savage, The Complexity of Computing,
Machines, Prentice -Hall (1967), p. 65.
Russell. Unwin (1978), p. 466. Wiley (1976).
8 E.N. Gilbert, Lattice theoretic properties of
2 C. E. Shannon, A symbolic analysis of relay 5 L Wos, A Computer Science Reader, Ed. E. A.
frontal switching functions, Jour. Math. &
and switching circuits. Trans. AIEE 57 (1938), Weiss, Springer-Verlag, (1988), pp 110-137.
Physics 33 (April 1954), 57-67.
713-723. Orig. pub. Abacus, vol. 2, no. 3 (Spring 1985),
pp. 6-21. 9 A.A. Markov, "On the inversion complexity of
3 G. A. Montgomerie, Sketch for an algebra of
a system of functions" (translated by M. D.
relay and contactor circuits, Jour. IEE 95, Part 6 L. Wos, R. Overbeek, E. Lusk & J. Boyle,
III (1948), 303-312. Friedman), JACM 5 (1958) 331-334. Orig,
Automated Reasoning, Introduction and
Applications, Prentice -Hall (1984).
pub. Doklady Akad Nauk SSSR 116 (1957),
917-919.
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Wel I :tell] Y i IDEAS
Fact: most circuit ideas sent to Electronics World get published
The best circuit ideas are ones that save time or money, or stimulate the thought process.
This includes the odd solution looking for a problem - provided it has a degree of ingenuity.
Your submissions are judged mainly on their originality and usefulness. Interesting modifications to existing
circuits are strong contenders too - provided that you clearly acknowledge the circuit you have modified. Never
send us anything that you believe has been published before though.
Don't forget to say why you think your idea is worthy.
Clear hand-written notes on paper are a minimum requirement: disks with separate drawing and text files in a
popular form are best - but please label the disk clearly. Where software or files are available from us, please
email Caroline Fisher with the circuit idea name as the subject.
Send your ideas to: Phil Reed, Highbury Business Communications, Nexus House,
Azalea Drive, Swanley, Kent, BR8 8HU email [email protected]
Jitter generator
Within my company, BCD Audio, we maximum noise generation. R2 and amplified by Q3, filtered by C10 and
had a requirement for a unit that 12V Zener D2 roughly regulate the superimposed on the square wave
could inject a small amount of jitter supply to the noise generator, making signal at U3. The range of jitter
onto a suitable square wave. The the unit independent of supply produced is around 0 to 100nS. The
resulting circuit also had some other variations. noise signal is injected onto both
desirable features; the output level The 5V regulator used was trimmed edges of the signal.
was exactly 5V p -p from exactly 75R via RV1 for a supply slightly higher A Dallas DS32K oscillator module
impedance, and the oscillator module than 5V, so that the outputs were was used as the square -wave
used was accurate to 1PPM. exactly 5V P -P. generator; the circuit would work
The circuit works as follows: a The noise generator diode is with other modules provided their
noise generator is produced from the amplified by transistor Q2, filtered jitter performance was adequate. The
zener-like breakdown of transistor and taken to RV3 which is used as signal is fed down two Schmitt
Ql. RV2 sets the current into the the front panel jitter level adjustment. triggered inverter chains, that include
transistor and is adjusted for The resulting noise signal is a small amount of high pass filtering
to slow the rise and fall times, and
then recover the speed. The final
inverter stages are paralleled for low
R3
output impedance. Two chains are
used so that one output is subject to a
IF-- controlled amount of jitter, and the
other output is not, but has the same
o 02 propagation delay.
RV1
2 The clean output may be used to
trigger an oscilloscope, the jittered
TRt ADJUST JITTER NOISE GENERATOR
output can then be applied to the
M. C3
TRIM NOISE CIO equipment under test, and the
resulting signal measured by the
U2 A oscilloscope. Keep in mind that this
RV2
C9
circuit produces jitter on both clock
R10
C
R12 edges, but some circuits are more
sensitive to jitter on one edge than
the other.
Mike Law
Slough
Berkshire
USE
R16 R13
U3 .E
UK
v- ix -
Figure 1. 11
F!?, "4_
\ VC(
N C2
0.1
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CS A R2
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1i
ON!) 4 O
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27p 2'7p
25
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12
15
36k
Bela)Cod
9474123 13
VCk:
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SN74110:10 S7,174H00
7
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LM7f105
13 1 3 R7
Vin +5V 470
0'4001 0
POW.' CHI CI I
Figure 2.
Pushbutton
SW1 or SW2
Q\ -output of the
Up- or Down- one-
shot Multivibrator
U4 120ms
Q -output of the U3
R1 -S\ flip-flop for
the Up -direction
Digital
AD5220 settles to a new value
Potentiometer Data
Signed
Electronics World is published by Highbury Business Communications on the first Thursday each month.
Photocopy this form, fill in your details and ask your newsagent to reserve a copy.
111
Low battery warning device
The circuit in Figure 1 was designed charge curve thus increasing the
to give an audible blip and a visual frequency of the warning devices.
flash warning when the battery This particular circuit was used in a
voltage dropped below a certain 9 Volt battery powered instrument
threshold. The frequency increases as with a 5 Volt stabilised power supply
Figure 1.
the battery voltage continues to fall. requirement, but the circuit could be
The approximate frequency relative easily modified to suit different
to voltage is given in Figure 2. requirements. 5V
The circuit uses a Programmable Des Kepple
Unijunction Transistor (PUT) as a Co. Carlow
relaxation oscillator. The voltage at Ireland
Figure 2.
point B varies with battery voltage
and if it drops to 4.4V (i.e. 5.0 - 0.6) Battery Frequency
1/
the PUT conducts and discharges the (Volts) (Hz) 2N6028
capacitor through the LED and 8.0 0.0
bleeper. As the battery voltage
7.5 0.15
continues to decrease the voltage at
trigger point B tracks the decreasing 7.0 0.25
battery voltage, consequently
lowering the trigger voltage. With the
decreasing trigger voltage the PUT
switches on earlier in the capacitor
6.5
6.0
5.5
0.33
0.45
0.66
/-
Traffic light simulator
At power up, pin 3 of Gl reset times out, pin 4 of Gl goes 1C4 now cycles red to green to colour, so there is one for each
immediately goes high, this forces low, removing the reset on 1C2, orange. At the end of the orange side of the approach. IC1 is set up
1C3 to reset, forcing its Q output hence 1C2 steps through its cycle period for B phase, 1C4 also so it always powers up, low, at its
to O. This low together with the red to green to orange. At the end generates a pulse at pin 10, again output, before oscillation. All
power up reset signal forces 1C2 of the orange period a pulse is toggling 1C3, again reversing the unused inputs should be tied to a
to reset. The high on the Q output generated at pin 10 of 1C2. This resets. This again brings up the all supply rail.
of 1C3 also resets 1C4. Hence the toggles 1C3 reversing the resets to red period and so the cycle Gregory Freeman
red LEDs are all lit indicating the 1C2 and 1C4. The all red period continues. Mt. Barker
all red condition. As the power up now reappears and after 3 seconds Two LEDs are used for each Australia
+6V
G,
4070
1M 1N914
220k 3/
II 2
Power up
+6V reset
+6V
Tip
16
4 15
P R
(6
IC,
555 10
IC2 +6V
74HC4017 7
+6V y - 4 2 x BA742
0
2
lop
414 16V
2 16
IC3
4013
D --
5
Master 15
Oscillator I
10
-12 S )1"
R G 0
A Phase IC4
14 3
,if
131 r 4,
G o
B Phase
display driver
150
+ I ' C2 C3
44
Ri R2 R5 To radio
Op 70.1 10k 10k 220p 4M7
R6
1k
6
4 Vcc R7
Rst
1k
20 Trig o/p
7 Tri
Dis
6 Ctrl 5
Thres Voltage - N/C
Gnd
Start 1:1 Stop
(7)555
DC jack skt
with break contact
The example sleep timer uses a resistor to ensure it is saturated. The 1.1C1R5 seconds.
transistor as a switch but other reset button turns the radio off, and I wasn't sure if any diode clamps
applications could use it to drive a the Start button turns it on (thus on were needed at the threshold
relay or isolated triac for heavier loads. starting the timeout period), or input, so just decided to rely on those
My first attempt to build a simple restarts the timeout period. I also present in the IC as part of its static
one chip (7555) battery saving 30 added a DC jack with make break protection circuitry. The power
minute sleep timer for a personal contact so that I could plug in a solar indicator LED1 only uses lmA.
radio failed due the electrolytic panel/mains battery eliminator to I housed the timer PCB and 2AA
capacitor's leakage current preventing further save batteries. cell batteries in a case of similar size
the monostable from timing out. I The timing components Cl and R5 to the radio, joined the two with stick
then used the standard long timer have been re -arranged so that the on Velcro pads and connected power
circuit of a 555 astable and digital discharge pin actually charges C1 to the radio using wires ending in
counter IC, which worked as desired and so the timing period is set by the dummy AA cells (for example,
but I felt there must be someway of Cl - R5 discharge time, which means Maplin YX92A)
making a single 555 do the job. that any leakage current will simply My 555 CR timing circuit section
The solution seemed rather simple, slightly shorten the delay by seemed so simple that I searched on
the circuit is shown in diagram 1: discharging Cl faster. By referencing the intemet to check whether anyone
The main circuit uses a CMOS Cl to Vcc rather than ground, the 555 had already thought of it but found
7555CN (for the low quiescent threshold pin sees the voltage (Vcc - nothing.
current (60mA) to turn the radio on Voltage Across C1), which makes it Alan Bradley.
for up to 25 minutes using TR1 as a appear as if Cl was charging as Belfast
switch. TR1 has a low 1k base expected. Thus the delay remains UK
Warning
Blown fuse indicator Last month we published a couple of
This circuit is a simplified version of Circuit Ideas that could be dangerous
Alastair Borthwick's idea in the February if precautions are not taken.
2003 edition for indicating the status of a Firstly, the Intelligent Electric
fuse or other type of overload protection. Fence should not be built as it stands.
Normally the fuse shorts out the red Connecting a metal fence almost to
LED and supplies current via R1 to the mains is not a clever thing to do -
illuminate the given LED. R1 is chosen so this circuit should be only used via
according to the supply voltage. When a low current source - for example a
the fuse ruptures, current is interrupted to protected isolating transformer. On
the given LED and the supply voltage is no account should a fence be
dropped across the fuse illuminating the connected directly to mains.
red LED. As with Mr Borthwick's Secondly, the 3 -phase selector has
design, shunt diodes across the LEDs no protection should any relay coil
allow operation on A.C. supplies and go short. Low current protection
may offer reverse voltage protection for should be used.
the LEDs, a situation which could occur must point out that circuits in this
if the supply fails. section are just ideas. They do not
Rod Brown normally constitute a full, tested
Nottingham project, and so great care must be
UK taken with any of them that get
connected to a mains power supply.
111
OLSON
PANELS
with 10AMP
CEE22/IEC
SHUTTERED
SOCKETS
;;UL:21'.AZ'DU:g'PZTEg'ON"'"
S
PANEL
DISTRIBUTIONMOUNTIN
RACK
LttFOR 19" AND
F. FISUPPRESLTER
Dic79 PLI°1111ER
WITH Ft.
TRANSIENT
147-- 74°/1/ U/V/7.c,
320 soci,
4$
- .1111 s Mkt - -
1111-31M-111"11WI."1 Illintar.-7--1F-441- .
.411,-114binfin views
7ririsrAor 11
. .
PCB
Layout
SPICE Auto
Simulation Placement
1
community deals with its failure
is to solemnly tell us not to use
more than one piece of equipment
that, as my colleague Guido
Watson found, an oscilloscope is
traumatised when something else
full -performance
at the same time. A piece of is switched on, so that more skill
equipment which is not in use is
likely to be compatible with an
active piece of equipment,
and care is needed when looking
at these effects than EMC
hotshots could muster. Buried in
RF Generator
without the aid of half a century the necessary experiments is the
of EMC pontification. very problem being investigated!
Put a four ohm resistor in series TGR205.9 EGH:SYNTNESISEORF GENERATOR
7I
4 5 8
77
EMC punkah -wallahs. The seminars in 1977. I have found the
problem is a physical one, and letter acknowledging our deposit
mathematical high trapeze acts paid to Theobalds Park College
will not help.
Broadening out
towards £900 to rent the Stately
Home for two days to give
residential courses, 26-28 October
£2,195
Transformer, bridge rectifier 1977 and 14-16 December 1977. The new TGR2050 is a synthesised signal generator with a
followed by raw capacitor is not We used the umbrella of frequency range of 150kHz to 2000MHz.
the only way in which AC is Middlesex Polytechnic, who were Excellent frequency accuracy is matched with high stability,
converted into DC. The circuit developing my WSI invention (see wide dynamic range, low phase noise and low leakage.
may use a swinging choke, which Wireless World July 1981), to give
FM, phase and AM modulation modes are incorporated along
probably gets even more upset us further credibility, but took all
during power switch -on. My the risk ourselves. We made the with RS232 and GPIB (IEEE.488.2) interfaces.
warning is that, the EMC mistake of charging too little - £45. The TGR2050 provides the most cost effective solution
community and the rest of us or £60 residential - but then available for engineers needing a wide range high performance
having apparently ignored the hurriedly increased the price to RF source.
problem of switch -on for more reach £240, so that in future
150kHz to 2000MHz frequency range with 10Hz setability
than a half century of digital engineers would be able to attend
electronics, questions have to with honour. These courses -127dBm to +7dBm amplitude range with 0.1dBm setability
raised about the hazard to other continued for ten years, and I have Better than 1 ppm internal accuracy: external frequency lock
equipment presented by switching the 1987 brochure. Companies FM, Phase and AM modulation, internal or external source
on all other types of power who sent their engineers to more
Direct numeric entry or rotary control with user setable
supply. Looking behind this, we than one of our courses included
have to ask whether, and why, the STL Harlow; ITT Cockfosters; frequency and amplitude increments
glamorous, well funded EMC Shell, Chester, Square D, Swindon: Non-volatile set-up memories for repetitive testing
community have ignored the BTel Holborn; ICI Plastics, Full remote control via RS -232 and GPIB interfaces
subject. (Probably this is because Welwyn; Redifon, Crawley; GEC, Unrivalled performance and features at this price level !
you have to know what you are Coventry; Royal Free Hospital,
doing, rather than just brew up Hampstead. We discussed many of For applications with a narrower frequency requirement a
fancy maths.) If so, I would argue the subjects ignored (and still 1GHz generator, the TGR 1040, is available for around £1,200 .
that enforcement of their ignored) by the EMC Community For full details of both generators, please contact us directly,
regulations by the EEC using and by academia. visit our website, or circle the reply number below.
criminal sanctions must end. We I fmd that every item on our list
must not allow incompetents to (www.ivorcatt.com/43.htm) is still
control our profession and ignored, although most of them
industry. In particular, they must remain important today, a quarter
not be allowed to take control of of a century later. All the course
the necessary similar analyses notes were later published
needed for other DC power privately, and most of them were
supply circuits. Note that my republished by Macmillan in our Measurably better value
analysis above contains no 1979 book Digital Hardware
mathematics. If EMC wallahs are Design. Macmillan quickly took Thurlby Thandar Instruments Limited
allowed to bury such problems in the book out of print. Glebe Road, Huntingdon. Cambridgeshire PE29 7DR
fancy maths, with the support of In sixteen hours of lecturing, we Tel: 01480 412451, Fax: 450409, e-mail: [email protected]
criminal sanctions, they will had to omit some critical
Web: www.tti-test.com
create a terrible mess. problems. The one discussed in
It has only just occurred to me this article has never before seen
that the reason why the necessary the light of day. THURLBY THANDAR INSTRUMENTS
/1 At W79315
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to the editor
Letters to "Electronics World" Highbury Business Communications,
Nexus House, Azalea Drive, Swanley, Kent, BR8 8HU
e-mail [email protected] using subject heading 'Letters'.
Clangers substance, and setting up unnecessary unreadable pages, pages with the most
I must apologise to readers for errors barriers for authors (e.g. the use of relevant information missing. No, I
in my article A pseudo -sine wave cutting edge cameras only, and a don't think it would be a good idea to
inverter, in the April issue, page 11. In months -long approval process). I had have the average reader archive
Figures 3 and 4, "2ms" should have the sense that the editor was a publisher EW/WW to electronic media. I realise
read "2iis". I can offer no excuses, first, not an electronics enthusiast. the cost of 'professional' companies
only apologies, since I proof read the EPE magazine, on the other hand, and the return on sales of the finished
article myself. My only consolation is has been frowned upon by one or two result. I have Wireless World and
that readers of this magazine will of its competitors for its lack of flash; I Electronics World dating back to the
doubtless all have realised that was in one editor's office, and he was Forties and earlier copies that are
microseconds were in fact intended. It flapping about an edition of EPE, and disintegrating into a pile if flakes. The
is the sort of slip, which would never he didn't think much of it, but EPE has most useful tool I find is a good index,
have escaped Geoff Amold's eagle substance, and I believe that that is preferably covering from the first issue
eye. Evidently I'm not the calibre of what matters. (Vol 1 Nol) to date. More realistically
proof-reader for whom Phil appealed Diversity of content would probably it could be broken into 10 -year lots.
in the leader page of that issue! also be a plus, and that would likely Those who do not have the advantage
Ian Hickman limit the length of articles. In my view, of such a vast library will most benefit
By email the SDI to Analogue Converter in my from a set of archive CDs, 90 or so
latest EW, at 13 pages, is very long, and years worth. Which brings up another
The character of EW is reminiscent of the overly long question - how far back would be a
I just bought the February 2004 features that filled PE magazine reasonable assessment for archiving?
Electronics World at the Cape Town towards the end of its life, not to detract Some might argue that anything over,
Waterfront. I sat up on a balcony from the value of the article in itself. say 10 years would be too far, as the
overlooking the Atlantic for breakfast, Your news items are good. Thinking technology that far back would be
and read your editorial. again of Poptronics, they had news outdated, outmoded and irrelevant. I,
I have written for six electronics items, but again they were focussed on though, would not agree.
magazines during the past year, flash or hype, not on substance, and so On the politically correct subject -
which included several cover articles they seemed empty. News items are 'master' and 'slave' are terms that
(EPE, Silicon Chip, Elektor). I'm good if they have substance, and cover more devices than one would, at
also a contributing editor of Nuts & identify truly significant first, appreciate. If it is to be taboo to
Volts magazine. developments, and I think you have use these words then 'primary' and
Firstly, the fact that Electronics that more or less right. It would also fit `secondary' would cover most of
World still exists should be of great with a profile of `going deeper'. present master/slave usage and have
encouragement to you, only a handful Well having said this, I wouldn't the advantage of tertiary and perhaps
of electronics magazines still do, and presume to know with any confidence quaternary, quinary, senary, septenary,
that is only because their editors were what makes a magazine succeed, so octanary, nonary, denary undenary,
a cut above the rest, both in intellect these are just some thoughts from the duodenary etc. Other suggestions
and character. ground. I hope you will both persevere could be 'master' and `submaster',
Clearly Electronics World has had a and go from strength to strength. `master' and 'subordinate'. In personal
distinctive character, and I myself have Thomas Scarborough computer usage `primary' and
seen it as a magazine, above all, that Cape Town `secondary' are used to describe the
goes just that much deeper than e.g. Republic of South Africa IDE buss'. As the hard disk drives are
EPE magazine, while not becoming not really 'master' and 'slave' devices
esoteric. A good example is Douglas Thank you for your comments. It's they can be, and sometimes are, called
Self's recent article on Electronic good to think that we are read under Drive 0(zero) and Drive 1 - problem
Analogue Switching. such nice conditions. -Ed solved. Where two or more devices are
In my view, the electronics configured in a manner that one device
magazines that succeed, do so mainly Archiving controls another, it is common to name
due to two things: With regard to your suggestion of a the devices 'master' and `slave' as it
1. Substance, substance, substance, workforce mobilisation to copy describes their function concisely and
and EW/WW back issues. I have, over unambiguously. If it is the word
2. Giving contributors priority, with many years, seen copies of documenta- `master' that is objected to then we
a warm and low -hurdle policy tion made by 'those who should know really are in trouble.
Poptronics recently ceased better' and even 'professional' copiers. There are Harbour Masters,
publication as you will know, and I Most of the copies have had either or Headmasters (or are they called Head
think that was due largely to their all of the following: skewed, off Teachers now), Ship's Master and
inordinate emphasis on flash, with little centre, bottom missing, top missing, many more. It is even possible to gain
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