Instruction Set of 8085

• An instruction is a binary pattern designed inside a microprocessor

to perform a specific function.
• The entire group of instructions that a microprocessor supports is
called Instruction Set.
• 8085 has 246 instructions.
• Each instruction is represented by an 8-bit binary value.
• These 8-bits of binary value is called Op-Code or Instruction Byte.

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 Instruction Set of 8085

Classification of Instruction Set

• Data Transfer Instruction
• Arithmetic Instructions
• Logical Instructions
• Branching Instructions
• Control Instructions

9/19/2025 2
 Daily Quiz

• What is true about microprocessor?

A. Microprocessor is a controlling unit of a micro-computer
B. It is fabricated on a small chip capable of performing ALU
(Arithmetic Logical Unit) operations
C. It also communicate with the other devices connected to it.
D. All of the above
• Microprocessor consists of?
A. ALU
B. register array
C. control unit
D. All of the above

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 Daily Quiz
• Which control instruction is followed by an un-conditional branch
instructions so as to branch to a single location from the double
ones with respect to specified status-bit condition?
A. jump instruction
B. branch instruction
C. skip instruction
D. return- from-subroutine instructions
• Which category of microprocessor instructions detect the status
conditions in registers and accordingly exhibit the variations in
program sequence on the basis of detected results?
A. Transfer Instructions
B. Operation Instructions
C. Control Instructions
D. All of the above
9/19/2025 4
 Data Transfer Operation

Data Transfer Instructions

• These instructions move data between registers, or between
memory and registers.

• These instructions copy data from source to destination.

• While copying, the contents of source are not modified.

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 Data Transfer Operation
Data Transfer Instructions
• This instruction perform following six operation.

• Load an 8 bit number in a register.

• Load 16 bit number in a register pair.

• Copy from register to register.

• Copy between register & memory.

• Copy between I/O & accumulator.

• Copy between registers & stack memory.

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 Data Transfer Operation
Data Transfer Instructions
Opcode Operand Description
MOV Rd, Rs Copy from source to destination.
M, Rs
Rd, M
• This instruction copies the contents of the source register into the
destination register.

• The contents of the source register are not altered.

• If one of the operands is a memory location, its location is specified

by the contents of the HL registers.

• Example: MOV B, C or MOV B, M.

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 Data Transfer Operation
Data Transfer Instructions

Opcode Operand Description

MVI Rd, Data Move immediate 8-bit
M, Data

 The 8-bit data is stored in the destination register or memory.

 If the operand is a memory location, its location is specified by the

contents of the H-L registers.

 Example: MVI B, 57H or MVI M, 57H

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 Data Transfer Operation
Data Transfer Instructions

Opcode Operand Description

LDA 16-bit address Load Accumulator

 The contents of a memory location, specified by a 16-bit address in

the operand, are copied to the accumulator.

 The contents of the source are not altered.

 Example: LDA 2034H

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 Data Transfer Operation
Data Transfer Instructions
Opcode Operand Description
LDAX B/D Register Load accumulator indirect
Pair
 The contents of the designated register pair point to a memory location.
This instruction copies the contents of that memory location into the
accumulator. The contents of either the register pair or the memory
location are not altered. FFFFH

 Example: LDAX B
A =C2 F
B =2A C =50 2A50H C2
D E
H L
0000H

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 Data Transfer Operation
Data Transfer Instructions

Opcode Operand Description

LXI Reg. pair, 16- Load register pair immediate
bit data

 This instruction loads 16-bit data in the register pair.

 Example: LXI H, 2034 H

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 Data Transfer Operation
Data Transfer Instructions
Opcode Operand Description
LHLD 16-bit address Load H-L registers direct

 This instruction copies the contents of memory location pointed out

by 16-bit address into register L. It copies the contents of next
memory location into register H.
FFFFH

 Example: LHLD 2000 H A F

B C
D E 2002H
H =2A L =50 2001H 2A
2000H 50

0000H

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 Data Transfer Operation
Data Transfer Instructions

Opcode Operand Description

STA 16-bit address Store accumulator direct

 The contents of accumulator are copied into the memory location

specified by the operand.
FFFFH
 Example: STA 2050 H A =30 F
B C 30
2050H
D E
H L

0000H

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 Data Transfer Operation
Data Transfer Instructions
Opcode Operand Description
STAX Reg. pair Store accumulator indirect

 The contents of accumulator are copied into the memory location

specified by the contents of the register pair.
FFFFH
 Example: STAX B

A =C2 F
B =2A C =50 2A50H C2
D E
H L
0000H

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 Data Transfer Operation
Data Transfer Instructions
Opcode Operand Description
SHLD 16-bit address Store H-L registers direct

 The contents of register L

are stored into memory
location specified by the 16- FFFFH
bit address. A F
B C
 The contents of register H
D E 2052H
are stored into the next
H =8A L =45 2051H 8A
memory location.
2050H 45
 Example: SHLD 2050 H
0000H

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 Data Transfer Operation
Data Transfer Instructions
Opcode Operand Description
XCHG None Exchange H-L with D-E

 The contents of register H are exchanged with the contents of

register D.

 The contents of register L are exchanged with the contents of register

E.

 Example: XCHG A F A F
B C B C
D =20 E =50 D =75 E =32
H =75 L =32 H =20 L =50

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 Data Transfer Operation
Data Transfer Instructions

Opcode Operand Description

SPHL None Copy H-L pair to the Stack Pointer (SP)

 This instruction loads the contents of H-L pair into SP.

 Example: SPHL

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 Data Transfer Operation
Data Transfer Instructions

Opcode Operand Description

XTHL None Exchange H–L with top of stack

 The contents of L register are exchanged with the location pointed

out by the contents of the SP.

 The contents of H register are exchanged with the next location (SP
+ 1).

 Example: XTHL

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 Data Transfer Operation
Data Transfer Instructions
Opcode Operand Description
PCHL None Load program counter with H-L
contents

 The contents of registers H and L are copied into the program

counter (PC).

 The contents of H are placed as the high-order byte and the contents
of L as the low-order byte.

 Example: PCHL

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 Data Transfer Operation
Data Transfer Instructions

Opcode Operand Description

PUSH Reg. pair Push register pair onto stack

 The contents of register pair are copied onto stack.

 SP is decremented and the contents of high-order registers (B, D, H,

A) are copied into stack.

 SP is again decremented and the contents of low-order registers (C,

E, L, Flags) are copied into stack.

 Example: PUSH D

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 Data Transfer Operation
Example : PUSH D

FFFFH FFFFH
A F
A F
B C 2001H 2001H
B C
D =10 E =50 2000H 2000H
D =10 E =50
H L 1FFFH 1FFFH 10
H L
SP = 2000H 1FFEH 1FFEH 50
SP = 1FFEH

0000H 0000H

BEFORE PUSH D AFTER

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 Data Transfer Operation
Data Transfer Instructions

Opcode Operand Description

POP Reg. pair Pop stack to register pair

 The contents of top of stack are copied into register pair.

 The contents of location pointed out by SP are copied to the low-

order register (C, E, L, Flags).

 SP is incremented and the contents of location are copied to the high-

order register (B, D, H, A).

 Example: POP H

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 Data Transfer Operation
Example : POP D

FFFFH FFFFH
A F
A F
B C 2053H 2053H
B C
D E 2052H 2052H
D =45 E =30
H L 2051H 45 2051H 45
30 H L
SP = 2050H 2050H 2050H 30
SP = 2052H

0000H 0000H

BEFORE POP D AFTER

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 Data Transfer Operation
Data Transfer Instructions

Opcode Operand Description

OUT 8-bit port Copy data from accumulator to a port
address with 8-bit address

 The contents of accumulator are copied into the I/O port.

 Example: OUT 78 H

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 Data Transfer Operation
Data Transfer Instructions

Opcode Operand Description

IN 8-bit port Copy data to accumulator from a port
address with 8-bit address

 The contents of I/O port are copied into accumulator.

 Example: IN 8C H

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 Daily Quiz

• DAD is for Double ADD. DAD B instruction in 8085 is used for ?

a) Content of BC is added HL Result is in HL.
b) Content of BC is added to Accumulator
c) Content of BC is added to DE
• DAA instruction is used for ____.
a) Double Add Accumulator.
b)Decimal Adjust Accumulator.
c)Decrement Accumulator
• To save accumulator value and the flag register on to the stack, which of
the following instructions is used?
a) PUSH PSW b) PUSH A
c) PUSH SP d) POP PSW

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 Daily Quiz

• What is the content of A at the end of this program?

MVI A, 06H
RLC
MOV B, A
RLC
RLC
ADD B
a) 3Ch b)18h c)0C h d)00 h
• In 8085, HLT opcode means:
a) Remain idle for 10 seconds.\
b) Remain idle for 0.1 seconds
c) End of Program

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 Arithmetic operations
Arithmetic Instructions

Addition

• Any 8-bit number, or the contents of register, or the contents of

memory location can be added to the contents of accumulator.

• The result (sum) is stored in the accumulator.

• No two other 8-bit registers can be added directly.

Note: The contents of register B cannot be added directly to the

contents of register C.

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 Arithmetic operations
Arithmetic Instructions

Subtraction
• Any 8-bit number, or the contents of register, or the contents of
memory location can be subtracted from the contents of
accumulator.

• The result is stored in the accumulator.

• Subtraction is performed in 2’s complement form.

• If the result is negative, it is stored in 2’s complement form.

• No two other 8-bit registers can be subtracted directly.

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 Arithmetic operations
Arithmetic Instructions

Increment / Decrement
• The 8-bit contents of a register or a memory location can be
incremented or decremented by 1.

• The 16-bit contents of a register pair can be incremented or

decremented by 1.

• Increment or decrement can be performed on any register or a

memory location.

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 Arithmetic operations
Arithmetic Instructions
Opcode Operand Description
ADD R Add register or memory to accumulator
M
 The contents of register or memory are added to the contents of
accumulator. The result is stored in accumulator.

 If the operand is memory location, its address is specified by H-L

pair.

 All flags are modified to reflect the result of the addition.

 Example: ADD B ( A+B A)

ADD M ( A+ M(HL) A)

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 Arithmetic operations
Arithmetic Instructions
Opcode Operand Description
ADC R Add register or memory to accumulator
M with carry
 The contents of register or memory and Carry Flag (CY) are added to the
contents of accumulator. The result is stored in accumulator.

 If the operand is memory location, its address is specified by H-L pair.

 All flags are modified to reflect the result of the addition.

Example: ADC B ( A+B + CY A)

ADC M ( A+M(HL) + CY A)

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 Arithmetic operations
Arithmetic Instructions

Opcode Operand Description

ADI 8-bit data Add immediate to accumulator

 The 8-bit data is added to the contents of accumulator.

 The result is stored in accumulator.

 All flags are modified to reflect the result of the addition.

 Example: ADI 45 H ( A + 45 A)

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 Arithmetic operations
Arithmetic Instructions

Opcode Operand Description

ACI 8-bit data Add immediate to accumulator with
carry
 The 8-bit data and the Carry Flag (CY) are added to the contents of
accumulator.

 The result is stored in accumulator.

 All flags are modified to reflect the result of the addition.

 Example: ACI 45 H ( A + 45 + CY A)

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 Arithmetic operations
Arithmetic Instructions

Opcode Operand Description

DAD Reg. pair Add register pair to H-L pair

 The 16-bit contents of the register pair are added to the contents of
H-L pair.

 The result is stored in H-L pair.

 If the result is larger than 16 bits, then CY is set.

 No other flags are changed.

 Example: DAD B (HL + BC HL)

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 Arithmetic operations
Arithmetic Instructions

PROBLEM

DAD D
Let D=30H, E=20H
H= 1AH, L = 42 H

SOLUTION

H= 4AH & L = 62H

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 Arithmetic operations
Arithmetic Instructions
Opcode Operand Description
SUB R Subtract register or memory from
M accumulator
 The contents of the register or memory location are subtracted from the
contents of the accumulator. The result is stored in accumulator.

 If the operand is memory location, its address is specified by H-L pair.

 All flags are modified to reflect the result of subtraction.

Example: SUB B (A – B A)

SUB M (A – M (HL) A)

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 Arithmetic operations
Arithmetic Instructions
Opcode Operand Description
SBB R Subtract register or memory from
M accumulator with borrow
 The contents of the register or memory location and Borrow Flag
(i.e. CY) are subtracted from the contents of the accumulator. The
result is stored in accumulator.

 If the operand is memory location, its address is specified by H-L

pair.

 All flags are modified to reflect the result of subtraction.

Example: SBB B (A – B – CY A)

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SBB M (A – M (HL) – CY A) 38
 Arithmetic operations
Arithmetic Instructions

Opcode Operand Description

SUI 8-bit data Subtract immediate from accumulator

 The 8-bit data is subtracted from the contents of the accumulator.

 The result is stored in accumulator.

 All flags are modified to reflect the result of subtraction.

 Example: SUI 54 H (A – 54 A)

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 Arithmetic operations
Arithmetic Instructions

Opcode Operand Description

SBI 8-bit data Subtract immediate from accumulator
with borrow
 The 8-bit data and the Borrow Flag (i.e. CY) is subtracted from the
contents of the accumulator.

 The result is stored in accumulator.

 All flags are modified to reflect the result of subtraction.

 Example: SBI 45 H (A – 45 – CY A)

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 Arithmetic operations
Arithmetic Instructions

Opcode Operand Description

INR R Increment register or memory by 1
M

 The contents of register or memory location are incremented by 1. The

result is stored in the same place.

 If the operand is a memory location, its address is specified by the

contents of H-L pair.

Example: INR B (B + 1 B)

INR M (M + 1 M)

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 Arithmetic operations
Arithmetic Instructions

Opcode Operand Description

INX R Increment register pair by 1

 The contents of register pair are incremented by 1.

 The result is stored in the same place.

 Example: INX H (HL+1 HL)

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 Arithmetic operations
Arithmetic Instructions
Opcode Operand Description
DCR R Decrement register or memory by 1
M

 The contents of register or memory location are decremented by 1.

The result is stored in the same place.

 If the operand is a memory location, its address is specified by the

contents of H-L pair.

Example: DCR B (B – 1 B)

DCR M (M – 1 M)

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 Arithmetic operations
Arithmetic Instructions

Opcode Operand Description

DCX R Decrement register pair by 1

 The contents of register pair are decremented by 1.

 The result is stored in the same place.

 Example: DCX H (HL – 1 HL)

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 Arithmetic operations
Arithmetic Instructions

Opcode Operand Description

DAA Decimal Adjust Accumulator (BCD
format)
 It converts hexadecimal to BCD no.

 This instruction is used after addition instruction.

Operation:

 If lower nibble is >9 or AC = 1 then add 06.

 If higher nibble is >9 or CY = 1 then add 06.

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 Arithmetic operations
Arithmetic Instructions

DAA Instruction Example

1 ) A=34H & Data = 48H
2) A=37H & Data = 15H
3) A=85H & Data = 68H

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 Daily Quiz

• What is the content of PC Register at the end of the following program?

LXI H 8A79h
MOV A L
ADD H
DAA
MOV H A
PCHL
a) 2304 b) 6979 c) 7100 d) 8255
• What does microprocessor speed depends on?
a) Clock
b) Data bus width
c) Address bus width
d) All of these

9/19/2025 47
 Daily Quiz

• What is the status of z flag, cy flag, sign flag at the end of this program?
MVI A, 02H
MVI B, 03H
ADD B
XRA A
a) 1,0,0 b)0,1,0 c)1,0,0 d)1,0,1
• What is the content of Register A at the end?
XRA A
MVI B, 4DH
SUI 4FH
ANA B
HLT
a) 00h b) 01h c) 4Dh

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 Logic Operations
Logical Instructions

• These instructions perform logical operations on data stored in

registers, memory and status flags.
• The logical operations are:
• AND
• OR
• XOR
• Rotate
• Compare
• Complement

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 Logic Operations
AND, OR, XOR
• Any 8-bit data, or the contents of register, or memory location
can logically have
• AND operation
• OR operation
• XOR operation
with the contents of accumulator.
• The result is stored in accumulator.

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 Logic Operations
Rotate
• Each bit in the accumulator can be shifted either left or right to
the next position.

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 Logic Operations
Compare
• Any 8-bit data, or the contents of register, or memory location
can be compares for:
• Equality
• Greater Than
• Less Than
with the contents of accumulator.
• The result is reflected in status flags.

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 Logic Operations
Complement

• The contents of accumulator can be complemented.

• Each 0 is replaced by 1 and each 1 is replaced by 0.

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 Logic Operations
Logical Instructions
Opcode Operand Description
ANA R Logical AND register or memory with
M accumulator
 The contents of the accumulator are logically ANDed with the contents
of register or memory.
 The result is placed in the accumulator.
 If the operand is a memory location, its address is specified by the
contents of H-L pair.
 S, Z, P are modified to reflect the result of the operation.
 CY is reset and AC is set.
 Example: ANA B or ANA M.

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 Logic Operations
Logical Instructions

Opcode Operand Description

ANI 8-bit data Logical AND immediate with
accumulator

 The contents of the accumulator are logically ANDed with the 8-bit
data.

 The result is placed in the accumulator.

 S, Z, P are modified to reflect the result.

 CY is reset, AC is set.

 Example: ANI 86H.

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 Logic Operations
Logical Instructions
Opcode Operand Description
ORA R Logical OR register or memory with
M accumulator
 The contents of the accumulator are logically ORed with the contents of
the register or memory. The result is placed in the accumulator.

 If the operand is a memory location, its address is specified by the

contents of H-L pair.

 S, Z, P are modified to reflect the result. CY and AC are reset.

 Example: ORA E or ORA M.

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 Logic Operations
Logical Instructions

Opcode Operand Description

ORI 8-bit data Logical OR immediate with accumulator

 The contents of the accumulator are logically ORed with the 8-bit
data.

 The result is placed in the accumulator.

 S, Z, P are modified to reflect the result.

 CY and AC are reset.

 Example: ORI 20H.

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 Logic Operations
Logical Instructions
Opcode Operand Description
XRA R Logical XOR register or memory with
M accumulator
 The contents of the accumulator are XORed with the contents of the
register or memory.
 The result is placed in the accumulator.
 If the operand is a memory location, its address is specified by the
contents of H-L pair.
 S, Z, P are modified to reflect the result of the operation.
 CY and AC are reset.
 Example: XRA D or XRA M.

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 Logic Operations
Logical Instructions

Opcode Operand Description

XRI 8-bit data XOR immediate with accumulator

 The contents of the accumulator are XORed with the 8-bit data.
 The result is placed in the accumulator.
 S, Z, P are modified to reflect the result.
 CY and AC are reset.
 Example: XRI 23H.

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 Logic Operations
Logical Instructions

Opcode Operand Description

CMP R Compare register or memory with
M accumulator

 The contents of the operand (register or memory) are compared with

the contents of the accumulator.

 Both contents are preserved .

 The result of the comparison is shown by setting the flags of the

PSW as follows:

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 Logic Operations
Logical Instructions

if (A) < (reg/mem): carry flag is set

if (A) = (reg/mem): zero flag is set

if (A) > (reg/mem): carry and zero flags are reset.

Example: CMP C or CMP D or CMP M

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 Logic Operations
Logical Instructions

Opcode Operand Description

CPI 8-bit data Compare immediate with accumulator

 The 8-bit data is compared with the contents of accumulator.

 The values being compared remain unchanged.

 The result of the comparison is shown by setting the flags of the

PSW as follows:

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 Logic Operations
Logical Instructions

if (A) < data: carry flag is set

if (A) = data: zero flag is set

if (A) > data: carry and zero flags are reset

Example: CPI A6H

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 Logic Operations
Logical Instructions
Opcode Operand Description
RLC None Rotate accumulator left

 Each binary bit of the accumulator is rotated left by one position.

 Bit D7 is placed in the position of D0 as well as in the Carry flag.
 CY is modified according to bit D7.
 S, Z, P, AC are not affected.
Example: RLC

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 Logic Operations
Logical Instructions

Opcode Operand Description

RRC None Rotate accumulator right

 Each binary bit of the accumulator is rotated right by one position.

 Bit D0 is placed in the position of D7 as well as in the Carry flag.
 CY is modified according to bit D0.
 S, Z, P, AC are not affected.
Example: RRC

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 Logic Operations
Logical Instructions

Opcode Operand Description

RAL None Rotate accumulator left through carry

 Each binary bit of the accumulator is rotated left by one position

through the Carry flag.
 Bit D7 is placed in the Carry flag, and the Carry flag is placed in the
least significant position D0.
 CY is modified according to bit D7.
 S, Z, P, AC are not affected.
 Example: RAL.

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 Logic Operations
Logical Instructions

Opcode Operand Description

RAR None Rotate accumulator right through carry

 Each binary bit of the accumulator is rotated right by one position

through the Carry flag.
 Bit D0 is placed in the Carry flag, and the Carry flag is placed in the
most significant position D7.
 CY is modified according to bit D0.
 S, Z, P, AC are not affected.
 Example: RAR.

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 Logic Operations
Logical Instructions

Opcode Operand Description

CMA None Complement accumulator

 The contents of the accumulator are complemented.

 No flags are affected.

 Example: CMA

A= ABH

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 Logic Operations
Logical Instructions

Opcode Operand Description

CMC None Complement carry

 The Carry flag is complemented.

 No other flags are affected.

Example: CMC

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 Logic Operations
Logical Instructions

Opcode Operand Description

STC None Set carry

 The Carry flag is set to 1.

 No other flags are affected.

 Example: STC.

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 Daily Quiz

• The instruction that represents the ‘rotate source, count’ is

a) RCL
b) RCR
c) ROR
d) All of the mentioned
• What is the function of STC instruction?
a) Store to C Register, the value of Accumulator
b) Set Carry to 1
c) Clear the Stack pointer.
• After "XRA A" instruction is executed, what will be the status of Zero
Flag?
a)1 b) 0 c) No change

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 Daily Quiz

• What is the content of A-Register at the end of this program?

XRA A
MVI B, F0H
SUB B
a) 01H b) 0FH c)F0H d)10H

• What is the content of A at the end of this program?

STC
MVI A, 35H
ACI 26H
a) 2Dh b) 5Ch c) 23h d) 5B h

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 Branch operation

Opcode Operand Description

CALL 16-bit address Call unconditionally

 The program sequence is transferred to the memory location

specified by the 16-bit address given in the operand.

 Before the transfer, the address of the next instruction after CALL
(the contents of the program counter) is pushed onto the stack.

 Example: CALL 2034 H.

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 Branch operation
Example : CALL 6030H

FFFFH FFFFH
A F
A F
B C 3001H 3001H
B C
D E 3000H 3000H
D E
H L 2FFFH 2FFFH 20 = PCH
H L
SP = 3000H 2FFEH 2FFEH 40=PCL
SP = 2FFEH
PC= 2040H
PC= 6030H
0000H 0000H

BEFORE CALL 6030H AFTER

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 Branch operation

Opcode Operand Description

Cx 16-bit address Call conditionally

 The program sequence is transferred to the memory location

specified by the 16-bit address given in the operand based on the
specified flag of the PSW.

 Before the transfer, the address of the next instruction after the call
(the contents of the program counter) is pushed onto the stack.

 Example: CZ 2034 H.

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 Branch operation
Call Conditionally

Opcode Description Status Flags

CC Call on Carry CY = 1
CNC Call on Not Carry CY = 0
CP Call on Positive S=0
CM Call on Minus S=1
CZ Call on Zero Z=1
CNZ Call on Not Zero Z=0
CPE Call on Parity Even P=1
CPO Call on Parity Odd P=0

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 Branch operation
Example : 2030H CZ 7050H

FFFFH FFFFH
A=00 F, Z=1
A=00 F, Z=1
B C 3001H 3001H
B C
D E 3000H 3000H
D E
H L 2FFFH 2FFFH 20 = PCH
H L
SP = 3000H 2FFEH 2FFEH 30=PCL
SP = 2FFEH
PC= 2030H
PC= 7050H
0000H 0000H

BEFORE 2030H CZ 7050H AFTER

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 Branch operation

Opcode Operand Description

RET None Return unconditionally

 The program sequence is transferred from the subroutine to the

calling program.

 The two bytes from the top of the stack are copied into the program
counter, and program execution begins at the new address.

 Example: RET.

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 Branch operation

Opcode Operand Description

Rx None Call conditionally

 The program sequence is transferred from the subroutine to the

calling program based on the specified flag of the PSW.

 The two bytes from the top of the stack are copied into the program
counter, and program execution begins at the new address.

 Example: RZ.

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 Branch operation
Return Conditionally

Opcode Description Status Flags

RC Return if Carry CY = 1
RNC Return if Not Carry CY = 0
RP Return if Positive S=0
RM Return if Minus S=1
RZ Return if Zero Z=1
RNZ Return if Not Zero Z=0
RPE Return if Parity Even P=1
RPO Return if Parity Odd P=0

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 Branch operation
Branching Instructions

Opcode Operand Description

JMP 16-bit address Jump unconditionally

 The program sequence is transferred to the memory location

specified by the 16-bit address given in the operand.

 Example: 2015H JMP 2008 H.

PC = 2015H PC = 2008H

Before After
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 Branch operation
Branching Instructions

Opcode Operand Description

Jx 16-bit address Jump conditionally

 The program sequence is transferred to the memory location

specified by the 16-bit address given in the operand based on the
specified flag of the PSW.

 Example: JZ 2034 H.

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 Branch operation
Jump Conditionally

Opcode Description Status Flags

JC Jump if Carry CY = 1
JNC Jump if No Carry CY = 0
JP Jump if Positive S=0
JM Jump if Minus S=1
JZ Jump if Zero Z=1
JNZ Jump if No Zero Z=0
JPE Jump if Parity Even P=1
JPO Jump if Parity Odd P=0

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 Branch operation

Opcode Operand Description

RST 0–7 Restart (Software Interrupts)

 The RST instruction jumps the control to one of eight memory

locations depending upon the number.

 These are used as software instructions in a program to transfer

program execution to one of the eight locations.

 Example: RST 3.

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 Branch operation

Restart Address Table

Instructions Restart Address
RST 0 0000 H
RST 1 0008 H
RST 2 0010 H
RST 3 0018 H
RST 4 0020 H
RST 5 0028 H
RST 6 0030 H
RST 7 0038 H

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 Control Operation

Control Instructions

• The control instructions control the operation of microprocessor.

Opcode Operand Description

NOP None No operation

 No operation is performed.

 The instruction is fetched and decoded but no operation is executed.

 Example: NOP

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 Control Operation

Opcode Operand Description

HLT None Halt

 The CPU finishes executing the current instruction and halts any
further execution.

 An interrupt or reset is necessary to exit from the halt state.

 Example: HLT

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 Control Operation

Opcode Operand Description

DI None Disable interrupt

 The interrupt enable flip-flop is reset and all the interrupts except the
TRAP are disabled.

 No flags are affected.

 Example: DI

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 Control Operation

Opcode Operand Description

EI None Enable interrupt

 The interrupt enable flip-flop is set and all interrupts are enabled.

 No flags are affected.

 This instruction is necessary to re-enable the interrupts (except

TRAP).

 Example: EI

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 Control Operation

Opcode Operand Description

RIM None Read Interrupt Mask

 This is a multipurpose instruction used to read the status of interrupts

7.5, 6.5, 5.5 and read serial data input bit.

 The instruction loads eight bits in the accumulator with the following
interpretations.

 Example: RIM

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 Control Operation

RIM Instruction

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 Control Operation

Opcode Operand Description

SIM None Set Interrupt Mask

 This is a multipurpose instruction and used to implement the 8085

interrupts 7.5, 6.5, 5.5, and serial data output.

 The instruction interprets the accumulator contents as follows.

 Example: SIM

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 Control Operation

SIM Instruction

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 Daily Quiz

• What does the last instruction of each subroutine that transfer the control
to the instruction in the calling program with temporary address storage ,
called as?
A. jump to subroutine
B. branch to subroutine
C. return from subroutine
D. call subroutine
• What is SIM?
A. Select interrupt mask
B. Sorting interrupt mask
C. Set interrupt mask
D. None of these

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 Daily Quiz

• Which instruction is used to set the interrupt by maintaining the serial

output bit in set mode of operation?
A. SIM
B. STC
C. SBI Data
D. SUI Data
• Which instruction indicates the transfer of program sequence to the
address specified by 16 bit value if Z flag =0 ?
A. CZ Address
B. CNZ Address
C. CPE Address
D. CPO Address

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