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Digital Lock System

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Janna Abdulazeem
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0% found this document useful (0 votes)
200 views12 pages

Digital Lock System

Uploaded by

Janna Abdulazeem
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd

Digital electronics

course project
”Digital lock system“
Major : Intelligent systems
Submitted to : Assoc .Prof. Roaa Mubark
BY:janna abdulazeem
Introduction
In an era marked by increasing concerns over security and
the demand for seamless technological integration,
traditional mechanical locking mechanisms are being
augmented and, in many cases, superseded by sophisticated
digital alternatives. This report presents a comprehensive
exploration of the design, development, and
implementation of a digital lock system circuit – a tangible
.embodiment of this technological evolution
At its core, this project focuses on the intricate interplay of
electronic components and logical programming required to
.create a secure and user-friendly access control solution
Beyond a mere description of the hardware, this report will
delve into the intellectual property underpinning the
system’s functionality, much of which is implemented
within the firmware running on the chosen microcontroller
IC. Address critical considerations related to power
efficiency, circuit protection facilitated by specific ICs, and
potential vulnerabilities inherent in IC-based systems.
Furthermore, the report will provide a detailed account of
the prototyping process, including the selection rationale
for specific Ics, the development of schematic diagrams
emphasizing IC interconnections, PCB layout
considerations tailored for IC integration, and the
methodologies employed for testing and validation of the
circuit’s operational integrity and security efficacy at the IC
.level
C
i
r
c
u
i
t
d
e
s
i
g
n
Components

Dip switch 7-segment display

Resistance push button


5v battery led

Integrated circuits
OR logic gate
to build the DEC to BCD and the
comparator, allowing the system to
process these decimal inputs in a
digit binary format where each decimal
is represented by a 4-bit binary code
XOR logic gate

of the the soul


or as comparat
is 0 XOR gate
when only
both inputs are the same (both 0 or both 1). This is the
exact opposite of what we need for an equality
.comparator's output to be high (1) when the bits are equal
IC 7447

.BCD-to-7-segment decoder/driver
Its primary function is to take a 4-bit Binary Coded
Decimal (BCD) input and convert it into the appropriate
output signals needed to illuminate the segments of a 7-
segment display, thereby displaying the corresponding
.decimal digit (0-9)
It then activates the necessary output pins (labeled a, b, c,
d, e, f, g) to light up the correct segments on a common-
anode 7-segment LED display. The outputs of the 7447 are
active-low, meaning a low voltage on an output pin will
turn ON the corresponding segment of the common-anode
.display
D-flipflop

The primary function of a D flip-flop is to store one bit of


binary data. It acts as a fundamental memory element in
.sequential logic circuits
The D flip-flop "remembers" the logic level (0 or 1) that
was present at its D (data) input at the moment of the
active edge (rising or falling) of the CLK (clock) signal
This allows the system to hold the entered digits while the
.user continues to input the full code
The output Q only changes its state in synchronization with
the clock signal. Changes at the D input between clock
edges are ignored, ensuring predictable behavior in
sequential circuits. This allows the system to hold the
entered digits while the user continues to input the full
.code
Also , implementing the Lock's State (Locked/Unlocked)
.Q = 0 could represent the "locked" state
.Q = 1 could represent the "unlocked" state
Implementation

we linked the 7-segment display to the 7447 integrated


circuit. This connection allowed the IC to activate specific
segments on the display. To provide input for the system
and observe its behavior, we used a DIP switch to manually
set different binary values that were then processed and
.shown on each segment

: Circuit in real life


Next, we used the inputs from the XOR gates and
connected them to the 7447 IC pins and the DIP switch
input. The resulting signals from this stage were then fed
into OR gates, which in turn controlled an LED and a push
button. This configuration aimed to enable the circuit to
perform a comparison between the user's input and the pre-
.existing stored data

: Circuit in real life


Subsequently, we linked a red LED, designated for
indicating incorrect attempts, to a counter circuit. This
c
o
n
n
e
c
t
i
on was implemented to enable the system to track and limit
the number of unsuccessful entry attempts to three. Upon
reaching this threshold of three wrong attempts, the system
.would then enter a locked-down state

:Circuit in real life

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