Q1 Encoding the RISC instruction: st r8, 20[r2] results in a value (in hex)
a) 0x5A080014
b) 0x7E080014
c) 0x7D080014
d) 0x7C090014
Correct Option (b)
Q2 The advantage of the register indirect addressing mode over the memory direct
addressing mode is
a) It is faster than memory direct addressing mode
b) It can easily traverse stacks and complex data structures.
c) It makes the data accessing static
d) It makes the data accessing dynamic
Correct Option (d)
Q3 Which of the instruction ignores source operand 1 in RISC assembly?
a) ‘sub’
b) ‘add’
c) ‘mul’
d) ‘mov’
Correct Option (d)
Q4 What are the contents of register r1 after the execution of the following program in
RISC assembly?
mov r1,1
mov r2,7
.loop:
mul r1,r1,r2
sub r2,r2,1
cmp r2,1
bgt .loop
a) 120
b) 40320
c) 5040
d) 24
Correct Option (c)
Q5 How can we load a value 0xFFEDFC00 into r0 using RISC assembly if the register
support only 16-bit immediate?
a) The value cannot be loaded into r0
b) Use the default modifier
c) Use mov instructions
d) Use both ‘h’ and ‘u’ modifiers
Correct Option (d)
Q6 What is the output contents of the register r3 after the execution of the following
RISC assembly statements?
mov r0, 52
lsl r1, r0, 4
lsr r2, r0, 1
sub r3, r1, r2
a) 104*6
b) 104*7.5
c) 52*6
d) 52*15.5
Correct Option (d)
Q7 What is the output contents of register r0 (in hex) after the execution of the
following RISC assembly instruction?
movh r0, 0xA32B
a) 0xA32B0000
b) 0x0000A32B
c) 0xFFFFA32B
d) 0xA32BFFFF
Correct Option (a)
Q8 The only instruction in RISC ISA that sets the flags is ______
a) ‘add’
b) ‘cmp’
c) ‘sub’
d) ‘mul’
Correct Option (b)
Q9 What is the operation performed (on a number stored in r1) by the following RISC
assembly program?
mov r0, r1
lsl r2, r0, 24
lsr r3, r0, 24
movu r6, 0xff00
movh r7, 0x00ff
and r4, r0, r6
lsl r4, r4,8
and r5, r0, r7
lsr r5, r5, 8
add r3, r3, r5
add r3, r3, r4
add r2, r2, r3
st r2, [r1]
a) Compute factorial of a number
b) Compute square of a number
c) Convert an integer from little endian to big endian format
d) Compute square root of a number
Correct Option (c)
Q10 The register in ARM ISA that points to the location of currently executing instruction
in a program is __________
a) r10
b) r15
c) r13
d) none of these
Correct Option (b)
Q11 The output contents of register r0 (in hex), after the execution of the following ARM
assembly language instructions is ________
mvn r0, #0x26000
sub r0, r0, #0x1F00000
a) 0xFD0D9FFF
b) 0xFE0D9FFF
c) 0xFE0E9FFF
d) None of these
Correct Option (b)
Q12 Assuming that r0 holds 0x00000000 and r1 holds 0x00000005, the contents of r0
and r1(in hex) after the execution of the ARM instruction add r0, r1, r1, lsl #1 are
__________and _____________.
a) r0= 0x00000000 and r1=0x00000006
b) r0= 0xf0000000 and r1= 0x60000000
c) r0= 0x0000000f and r1= 0x00000005
d) r0= 0x00000015 and r1= 0x0000001f
Correct Option (c)
Q13 Assuming that four ARM registers r0, r1, r2, and r3 hold 0x00000000, 0x00000000,
0xf0000002, and 0x00000002. What are the contents of r0 and r1 (in hex) after the
execution of instruction UMULL r0, r1, r2, r3?
a) r0= 0xe0000000 and r1=0x00000004
b) r0=0xe0000004 and r1=0x00000001
c) r0=0xf0000004 and r1=0x00000004
d) r0=0xc0000004 and r1=0x00000002
Correct Option (b)
Q14 The correct ARM Assembly snippet performing the operation of r1 = r2 + r3 × 4.
a) add r1, r2, r3, lsl #2
b) add r1, r2, r3, lsl #3
c) add r1, r2, r3, lsl #1
d) add r1, r2, r3, lsl #4
Correct Option (a)
Q15 The output contents of register r2, after the execution of the following ARM
Assembly language snippet is ____________
foo:
mov r0, #2
bx lr
main:
mov r1, #3
bl foo
add r2, r0, r1
a) 3
b) 4
c) 5
d) 6
Correct Option (c)
Q16 Encoding the assembly language instruction sub r1, r2, 20 in RISC ISA would
result in a hexadecimal equivalent as __________________ (Use opcode of sub
as 00001)
a) 0x0D480020
b) 0x0C480020
c) 0x0C480014
d) 0x0D480014
Correct Option (c)
Q17 Assuming that r0 holds 0x00000000 and r1 holds 0x00000077, what would be the
contents of r0(in hex) after the execution of the ARM instruction rsb r0, r1, #0?
a) 0xFFFFFF89
b) 0xFFFFFF79
c) 0xFFFFFF78
d) 0xFFFFFF85
Correct Option (a)
Q18 Assuming that the variables a, b, c, d, and e (containing integers) are stored in r0,
r1, r2, r3, and r4 respectively, the correct translation of the following RISC
assembly code to high level language is
lsl r0, r0, 2
asr r1, r1, 3
sub r0, r0, r1
a) (a<<2) - (b<<3)
b) (a>>2) - (b>>>3)
c) (a<<2) - (b>>3)
d) (a<<2) – (b>>>3)
Correct Option (c)
Q19 Which of the following is a 1-address instruction in RISC ISA?
a) ‘add’
b) ‘ret’
c) ‘nop’
d) ‘call’
Correct Option (d)
Q20 Assuming that r1 holds a value of 0x0F (in hex), the value in register r4 (in decimal)
after the execution of the following ARM assembly language statements would be?
mov r2, #1
mov r4, #0
loop:
and r3, r1, #1
cmp r3, #1
addeq r4, r4, #1
mov r1, r1, lsr #1
add r2, r2, #1
cmp r2, #32
ble loop
a) 3
b) 4
c) 5
d) 6
Correct Option (b)
Q21 The smallest possible ARM assembly program to load the constant
0xFFFFFFF2 into register r0 is ____________________
a) mvn r0, #0xD
b) mvn r0, #0xC
c) mvn r0, #0xB
d) mvn r0, #0xA
Correct Option (a)
Q22 The privileged mode of ARM ISA, provides_______________________
a) Read and write access to Flags and Control field of CPSR register
b) Only Read access to Flags and Control field of CPSR register
c) Only Write access to Flags and Control field of CPSR register
d) Read access to Control field and write access to Flags of CPSR register
Correct Option (a)
Q23 If r1 = 0b1101, r2 = 0b0101, then the contents of r0 after the execution of the ARM
instruction bic r0, r1, r2? (b stands for binary) are
a) 0111
b) 1000
c) 1001
d) 1010
Correct Option (b)
Q24 Assume that the variables a, b, c, d and e (containing integers) are stored in the
registers r0, r1, r2, r3 and r4 respectively. The correct translation of the following
pieces of code from the ARM assembly language to a high level language is
orr r0, r0, r1, lsl #1
a) aVb
b) a V (2*b)
c) a V (b/2)
d) (2*a) V b
Correct Option (b)
Q25 The value of ‘I’ bit while encoding load and store instruction in RISC ISA is
a) 0, 0
b) 0, 1
c) 1, 0
d) 1, 1
Correct Option (d)
Q26 The number of bits available for encoding an immediate in ARM ISA is
__________
a) 32
b) 16
c) 12
d) 10
Correct Option (c)
Q27 Which of the following branch instruction in ARM ISA requires a statement of
‘mov pc, lr’ to return from a function call?
a) ‘bl’
b) ‘bx’
c) both ‘bl’ and ‘bx’
d) none of these
Correct Option (a)
Q28 Which one of the following ARM ISA instruction sets the flags of the CPSR
Register?
a) Both ‘eor’ and ‘teq’
b) ‘eor’
c) ‘teq’
d) none of these
Correct Option (c)
Q29 The addressing mode which uses the PC instead of a general purpose register
in RISC ISA is ______
a) Base offset
b) Base-index
c) PC Relative
d) Memory-indirect
Correct Option (c)
Q30 Which one of the following RISC ISA instruction is used for memory access?
a. ‘mov’
b. ‘and’
c. ‘add’
d. ‘ld’
Correct Option (d)
Q31 (19.35)10 = ( )8
Ans: (23.26)8
Q32 (19.35)10 = ( )16
Ans: (13.59)16
Q33 (A7.C)16 = ( )10
Ans: (167.75)10
Q34 (11011.110)2 = ( )8
Ans: (33.6)8
Q35 (237.61)8 = ( )16
Ans: (9F.C4)16
Q36 Find possible solution for ‘X’ and ‘Y’?
(123)5 = (X8)Y
Ans: (2,15) / (1,30) / (3,10)
Q37 (12)3 + (34)5 = (ab)7
Find the value of ab?
Ans: 33
Q38 Which of the following is not an invalid BCD code?
i. 1011
ii. 1001
iii. 1010
iv. 1100
Ans: b
Q39 BCD equivalent of (341)10 is ________________________
Ans: 0011 0100 0001
Q40 What is the maximum number represented by 4 bit BCD code?
Ans: 9
Q41 Convert (11001)2 to Gray Code.
Ans: 10101
Q42 For the circuit shown below, what sequence does the counter (Q1Q0) follows?
Ans: 00, 01, 10, 00,......
Q43 The value of a floating type variable is represented using the single-precision 32-
bit format. IEEE 754 standard uses 1 bit for sign, 8 bits for the biased exponent,
and 23 bits for mantissa. A float type variable is assigned the decimal value of -
14.25. The representation of the float type variable in hexadecimal notation
is………………….
Ans: C1640000H
Q44 The value denoted by 11000001101111110000....0 in IEEE-754 single precision
floating point representation is (x)10. The signed value of x is …………….
Ans: -(23.875)
Q45 Design a FA with ∑ = {0, 1} accepts the only input 101.
Ans:
Q46 Design FA with ∑ = {0, 1} accepts the set of all strings with three
consecutive 0's.
Ans:
Q47 Choose the correct fact about the Von Neumann architecture
a. Speed of execution is comparatively faster compared to Harvard
architecture
b. Physical address requirement is less compared to Harvard architecture
c. Hardware requirement is more compared to Harvard architecture
d. Process of controlling is simpler compared to Harvard architecture
Ans: b and d
Q48 How do programmers communicate with the processor if it uses 1s and 0s?
a. Assembly language
b. Machine language.
c. C Language
d. BASIC language
Ans: b
Q49 In x86 assembly language, _____ is a common command for transferring data
from source to destination.
Ans: MOV
Q50 Who developed the basic architecture of computer?
a) Charles Babbage
b) Blaise Pascal.
c) John Von Neumann
d) None of the above
Ans: c
Q51 Which of the following format is used to store data?
a) Decimal
b) Octal
c) BCD
d) Hexadecimal
Ans c
Q52 If in a base-x type of number system, 73x is equivalent to that of 54y in a base-y
type of number system, then the possible values of both- x and y would
be…………………..
Ans: 8, 11
Q53 Choose the correct statement
a) Moore and Mealy machine outputs doesn’t depend on input
b) Moore and Mealy machine outputs depend on current state
c) Moore and Mealy machine outputs depend on input
d) Moore and Mealy machine outputs depend on both current state & input
e) None of the above
Ans: b
Q54 You are going to a new flip-flop of following behaviour. then what would be the
expression for the new flip flop? [2]
Behaviour - It has two inputs X & Y and when both inputs are same (1,1),
the flip-flop in going to set, else flip-flop resets. If 60th inputs are differnt
and (0,1), the flip-flop complemats itself, otherwise it in retain the last
state.
Correct Option XQ + YQ’
Q55 In this circuit - The expression for the ‘next state’ Q+ is
Correct Option X Q
Q56 A Program consists of 5000 floating Point instructions and 25,000 integer
instructions. Processor A has a clock rate of 2.0 GHz. Floating point instruction
take 7 cycles and integer instanction take 1 cycle. How long does it take for this
Processor to run the Program?
Correct Option 30 micro sec
Q57 Processor 'A' rums a program consisting of 100,000 floating point instanctions
and 50,000 integer instructions. Floating point Instructio takes 10 cycles. and
integer instructions takes 1 cycle. What in the average. CPI for this program?
Correct Option 7
Q58 Represent 0.00110 in explicit normlization formate.
Correct Option 0 1110 11000
[S | E(4) | M(5)] hint - 0.110 2^(-2)
Q59 What would be the floating point representation of (5.875)10 ?
Correct Option 101.111
Q60. Consider the following statements:
A multiplexer
(i) selects one of the several inputs and transmits it to a single output.
(ii) routes the data from a single input to one of the many outputs
(iii) converts parallel data into serial data
(iv) is a combinational circuit
Which of these statements are correct?
(a) i, ii and iv
(b) ii, iii and iv
(c) i, iii and iv
(d) i, ii and iii
Answer - c
