Unit-2: Combinational Logic
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Binary Adder
• A combinational circuit that performs the addition of two bits is
called a half adder.
• The truth table for the half adder is listed below:
S: Sum
C: Carry
S = x’y + xy’
C = xy
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Implementation of Half-Adder
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Full-Adder
• Full adder truth table
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Full adder SOP Implementation
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Full Adder
• Full-adder can also implemented with two half adders
and one OR gate
S = z ⊕ (x ⊕ y)
= z’(xy’ + x’y) + z(xy’ + x’y)’
= xy’z’ + x’yz’ + xyz + x’y’z
C = z(xy’ + x’y) + xy = xy’z + x’yz + xy
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Binary adder
• This is also called
Ripple Carry Adder
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Half- Subtractor Function Table
Input Output
A B Difference Borrow
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0
Half- Subtractor Circuit
Difference = AB + AB = A B Borrow = A' B
Full-Subtractor Function Table
Input Output
A B C Difference Borrow
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1
Difference Expression
D = ABC + ABC + ABC + ABC
D = A( BC + BC) + A( BC + BC )
D = A( B C) + A( B C)
Borrow Expression
Borrow = A' B' C + A' BC'+ A' BC + ABC
Borrow = A' B + A' C + BC
A’B’ A’B AB A’B
C’ 1
C 1 1 1
Binary Adder/subtractor
M = 1→subtractor ; M = 0→adder
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Decoders
• The decoder is called n-to-m-line decoder, where
m≤2n .
• the decoder is also used in conjunction with other
code converters such as a BCD-to-seven segment
decoder.
• 3-to-8 line decoder: For each possible input
combination, there are seven outputs that are equal
to 0 and only one that is equal to 1.
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Implementation and truth table
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4:16 Decoder Using 3:8 Decoder
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Implementation of a Full Adder with a
Decoder
• Functions for the combinational circuit in sum of minterms :
S(x, y, z) = ∑(1, 2, 4, 7)
C(x, y, z) = ∑(3, 5, 6, 7)
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Encoders
• An encoder is the inverse operation of a decoder.
• We can derive the Boolean functions
z = D 1 + D 3 + D 5 + D7
y = D 2 + D3 + D 6 + D 7
x = D 4 + D5 + D 6 + D 7
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Magnitude Comparator
1-Bit magnitude comparator
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2-Bit magnitude comparator
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Priority encoder
4 to 2 priority encoder
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Multiplexers
Truth Table→ S Y Y = S’I0 + SI1
0 I0
1 I1
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4:1 Multiplexer
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Boolean Function Implementation
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Boolean Function Implementation
F(A, B, C, D) = (1, 3, 4, 11, 12, 13, 14, 15)
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1:4 De-Multiplexer
D0
DEMUX
D1
X
D2
D3
B A
B A D0 D1 D2 D3
0 0 X 0 0 0
0 1 0 X 0 0
1 0 0 0 X 0
1 1 0 0 0 X
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Three-State Gates
• A multiplexer can be constructed with three-state gates.
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BCD to 7-Sigment Display
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