MICROCONTROLLERS
Module-2
Dr. Mini K. Namboothiripad
Electrical
Agnel Charities FCRIT Vashi
Programs
• Machine Language
• Deals with 0s and 1s
• Assembly Language
• Provides mnemonics (codes/abbreviations easy to remember) for the machine code
instructions
• Programming faster as compared to machine language
• Less prone to errors
• Low level language since it deals with internal structure (registers etc)
• Assembler: Converts Assembly language program to Machine code
• High level language
• C, Python, Java
• Compiler: High level to Machine code
Structure of Assemble Language
• Series of Instructions or Directives
• Directives: Give directions to the assembler (not translated to machine code)
• org: Place the opcode at memory location 0 ➔ Sart of the program
• end: end of the source code➔ End of the program
• Instruction: Tells CPU what to do
• Translated to machine code (opcode)
• Most of the instructions are 16 bit: 8 bit for opcode, next 8 bit for operand
• Consists of an optional label, mnemonic , optionally followed by one/two operands, &
comment
• Mnemonic➔ Commands
• Operands➔ data items/ address
• Label➔ Allows to refer to a line of code by name
• Comment ➔ with a semicolon
Arithmetic Instructions
• ADDLW k: Adds a literal value (k) to WREG.
• ADDWF f, d: Adds the contents of WREG to a file register (f) and stores the result in the
specified destination (d).
• ADDWFC f, d: Adds the contents of WREG, a file register (f), and the Carry flag, storing the
result in the specified destination (d).
• SUBLW k: Subtracts WREG from a literal value (k).
• SUBWF f, d: Subtracts WREG from a file register (f) and stores the result in the specified
destination (d).
• SUBWFB f, d: Subtracts WREG and the Borrow flag from a file register (f), storing the result in
the specified destination (d).
• SUBFWB f, d: Subtracts a file register (f) and the Borrow flag from WREG, storing the result in
the specified destination (d).
• MULLW k: Multiplies WREG by a literal value (k), storing the 16-bit result in the PRODH and
PRODL registers.
Addition
• ADDLW
• WREG = WREG + L
• ADDWF
• WREG = WREG + F or
• F = WREG + F
• ADDWFC
• WREG = WREG + F + C or
• F = WREG + F + C
ADDLW k
Carry Flag
• C Flag is set (1) when there is a “carry out” from the D7 bit
• Can be set by an ADD or SUB
Adding two 16-bit numbers
• Add 3CE7 and 3B8D • 1110 0111
• First Add E7 and 8D ➔ 74 with • 1000 1101
carry 1
• Result ➔ 0111 0100 ➔ 74 with carry 1
• Add 3C and 3B plus carry
MOVLW E7H MOVLW 3CH
MOVWF 06H MOVWF 07H
MOVLW 8D MOVLW 3B
ADDWF 06, 1 ADDWFC 07, 1
Subtraction of unsigned numbers
• SUB ➔converts second argument into 2’s complement and adds it to file register
• SUBLW 32
• WREG = L – WREG
• SUBWF
• WREG = F – WREG or
• F = F – WREG
• SUBWFB
• WREG = F – WREG –!C or
• F = F – WREG – !C
• SUBFWB
• WREG = WREG -F–!C or
• F = WREG-F – !C
• NEG fileReg does 2’s complement inversion
Subtraction : example
3F 0011 1111 0011 1111
-23 - 0010 0011 + 1101 1101
2’s compliment of 23 1 0001 1100
1101 1100 + 1 C=1, D7=0 ➔ N=0➔
Result is positive
1101 1101
• If N is zero result is same
• If N=1 , result as 2’s compliment
• So NEGF required to be included
Write a program to subtract 4C-6E
MOVLW 4Ch
MOVWF 0x20
MOVLW 6Eh
SUBWF 0x20, 0
BNN NEXT
NEGF WREG
NEXT MOVWF 0x20
Here D7 =1; Thus N=1➔ Result is in 2’s compliment
So NEGF required ➔ Result= 0010 0010 ➔ 22H
Signed numbers
• Positive numbers ➔ 0 to 127
• Negative Numbers:
• D7=1
• Magnitude in 2’s compliment
• Assembler will do the conversion
Examples
• Show how PIC represents -5
• Thus, -5➔ FBH
• D7=N=1 indicates number is negative
examples
• Show how PIC represents -128
• Thus, -128➔ 80H
• D7=N=1 indicates number is negative
Signed numbers
• Thus
Signed numbers
• Positive numbers +127 to -128
• Overflows – indicated by flag in Status Register
• If result of an operation on signed numbers too large for the register
• This shows error in operation
• More precisely OV is set
• if there is carry from D6 to D7, but no carry from D7
• if there is carry from D7, but no carry from D6 to D7
Signed operation➔ Overflow analysis
• Examine the following code and analyze the result
• MOV LW 96H
• ADDLW 70H
• Flags: N=1, OV=1
• Sum looks like A6H with N=1 (Negative)
• Thus 2’s compliment of A6H➔ 5A also negative➔-90
• Clear that the result is not correct
• It is clear from the OV=1
Conclusion
• Unsigned case: Monitor C
• Signed operation OV indicates result is valid or not
• If OV=0, the result is valid in the current width.
• If OV=1, the correct result is outside the signed range
• → must compute in a wider register
C and OV Handling
• Use BC, BNC, BOV, BNOV right after the unsigned or signed operation
• Build “special case routines” that attempt to perform 16-bit adds/subs
