Digital Design using HDL (21ECPC702) –

UNIT I Notes (Lecture-2)

(A) Architectural Design

 Focuses on high-level structure of the system.

 Defines modules, subsystems, interconnections and data paths.
 Trade-offs: speed vs area, power vs performance.
 Example: Choice of RISC vs CISC for a processor.

Architectural design deals with the high-level structure of a digital system before diving into detailed
circuits or HDL coding. At this stage, the designer is not yet writing flip-flop level details but is instead
deciding how the system should be organized. It defines the blueprint of the system.

Major Components

1. Control Unit (CU) – Directs the flow of instructions and data.

2. Arithmetic Logic Unit (ALU) – Performs arithmetic and logical operations.
3. Registers – Small, fast storage for temporary data and instructions.
4. Memory Unit – Stores instructions and data.
5. Input/Output (I/O) Interfaces – Allow communication with external devices.
6. System Bus / Interconnect – Data, address, and control lines connecting all modules.

Explanation of the High-Level Block Diagram

1. Input Unit

 Accepts data and instructions from external sources (keyboard, sensors, files, etc.).
  Converts them into a format the system can understand.
 Feeds them into the Control Unit for further processing.

2. Control Unit (CU)

 Acts as the brain of the system.

 Fetches instructions from memory, decodes them, and generates control signals.
 Directs data flow between memory, registers, and ALU.
 Works in synchronization with the Clock.

3. Registers

 Small, high-speed storage inside the processor.

 Temporarily holds data, addresses, and instructions for quick access.
 Acts as a “workbench” for the ALU during execution.

4. Arithmetic Logic Unit (ALU)

 Performs arithmetic operations (addition, subtraction, multiplication, division).

 Handles logical operations (AND, OR, NOT, comparisons).
 Works on data provided by Registers under the guidance of the CU.

5. Memory Unit

 Stores both instructions (program) and data.

 Divided into Primary Memory (RAM/Cache) and Secondary Memory (Hard
Disk, etc.).
 Supplies instructions to CU and data to ALU whenever needed.

6. Output Unit

 Converts the processed data into human-readable or usable form.

 Examples: Display on screen, printed output, signals to actuators in embedded
systems.

7. System Bus

 The invisible “wires” that connect all the components.

 Divided into three types:
o Data Bus – carries actual data.
o Address Bus – carries memory addresses.
o Control Bus – carries control signals from CU.
Simple Explanation with Block Diagram

1. Modules

 Basic building blocks of the system.

 Example: ALU, Control Unit, Memory, Input, Output.
 Each module performs a specific task.

2. Subsystems

 Group of modules that work together for a larger function.

 Example:
o Execution Subsystem = Registers + ALU.
o Memory Subsystem = Cache + Main Memory.

3. Interconnections

 The “wires” or communication links connecting all modules.

 Example: System Bus (Data Bus, Address Bus, Control Bus).

4. Data Path

 The actual route data follows inside the system.

 Example: Instruction fetched from Memory → Control Unit → Registers → ALU
→ Memory/Output.
Simple Explanation of the Block Diagram

1. Processor Blocks (Right Side)

 Input Unit → Brings data and instructions into the system.

 Control Unit → Directs the flow of data and controls all operations.
 Registers → Small, fast storage for temporary values.
 ALU (Arithmetic Logic Unit) → Performs calculations and logical operations.
 Memory → Stores instructions and data.
 Output Unit → Sends the final processed result outside.

This shows the basic modules of a computer system and how they are connected.

2. Trade-offs (Left Side)

 Speed vs Area:
o If we want more speed, we usually need more hardware → larger chip area.
o Example: Parallel processing is faster but uses more circuits.
 Power vs Performance:
o Higher performance (faster execution, more instructions per second) means
more power consumption.
o Example: High-end gaming CPUs perform better but drain more electricity
than simple microcontrollers.

Example: Choice of RISC vs CISC for a Processor

1. RISC (Reduced Instruction Set Computer)

 Features:
o Small, simple set of instructions.
o Each instruction executes in one clock cycle (generally).
 o Uses load/store architecture → only load/store instructions access memory;
others work on registers.
o Easier to design pipelines → higher efficiency.
 Advantages:
o High speed (fast instruction execution).
o Lower power consumption (less hardware complexity).
o Good for embedded systems, smartphones, IoT devices.
 Disadvantages:
o Needs more instructions to complete a task (because each instruction is
simple).
o Larger program size compared to CISC.

2. CISC (Complex Instruction Set Computer)

 Features:
o Large, complex set of instructions.
o Single instruction can perform multiple low-level tasks (e.g., load, compute,
store).
o Hardware decodes and executes complex instructions.
 Advantages:
o Fewer instructions per program → smaller code size.
o Good for general-purpose computing (PCs, servers).
 Disadvantages:
o Each instruction takes multiple cycles to execute.
o Hardware is complex → consumes more power, harder to design pipelines.

(B) Behavioural or Functional Design

 Describes what the system does, not how it is built.

 Uses algorithms, state machines, or flowcharts.
 In HDL, this is modeled using behavioural constructs (e.g., if, case, always blocks
in Verilog).

1. Describes what the system does, not how it is built

 At this level, we don’t care about the gates, flip-flops, or exact hardware layout.
 We only describe the functionality of the system.
 Example: “This block adds two numbers” instead of “This block uses 4 full adders
and 1 half adder.”
 Think of it like writing a recipe: you describe the steps, not the kitchen setup.

2. Uses Algorithms, State Machines, or Flowcharts

 Algorithms: Step-by-step procedure.

o Example: Division algorithm (repeated subtraction method).
 State Machines: System behavior described in terms of states and transitions.
o Example: A traffic light controller (Red → Green → Yellow).
  Flowcharts: Visual diagrams to show sequence of operations.
o Example: A flowchart for checking whether a number is even or odd.

3. In HDL: Modeled using behavioural constructs

 In Verilog or VHDL, behavioural design is described using high-level

programming-like constructs.
 Examples:
o if statements → decision making.
o case statements → multiple operation choices.
o always blocks (in Verilog) → define behavior that should occur whenever
signals change.
 Example in Verilog (ALU snippet):

always @(a, b, sel) begin

case(sel)
2'b00: result = a + b; // Addition
2'b01: result = a - b; // Subtraction
2'b10: result = a & b; // AND
2'b11: result = a | b; // OR
endcase
end

Here, we describe what the ALU does, not the gates used inside.

Line-by-Line Explanation

1. always @(a, b, sel) begin

 always block: In Verilog, it is used to describe behavior that should happen

whenever certain signals change.
 The part inside @(a, b, sel) is called the sensitivity list.
o It means this block will be executed whenever a, b, or sel changes.
 In simple words: “Whenever the inputs a, b, or the selector sel change, re-calculate
the result.”

2. case(sel)

 Starts a case statement, which is like a switch statement in C.

 It checks the value of sel (a 2-bit input) and chooses one branch of operation.
 In simple words: “Look at sel and decide which operation to perform.”

3. 2'b00: result = a + b; // Addition

 2'b00 means a 2-bit binary number with value 00.

 If sel = 00, the ALU performs addition of a and b.
  The result of a + b is stored in result.
 Comment // Addition tells us what this case does.

4. 2'b01: result = a - b; // Subtraction

 If sel = 01, the ALU performs subtraction.

 a - b is computed and stored in result.

5. 2'b10: result = a & b; // AND

 If sel = 10, the ALU performs a bitwise AND between a and b.

 Example:
o If a = 1010 and b = 1100,
o result = 1000.

6. 2'b11: result = a | b; // OR

 If sel = 11, the ALU performs a bitwise OR between a and b.

 Example:
o If a = 1010 and b = 1100,
o result = 1110.

7. endcase

 Marks the end of the case statement.

 After checking all possible values of sel, no more cases are needed.

8. end

 Marks the end of the always block.

(C) Logic Design

 Converts behavioural description into logic equations (Boolean algebra).

 Uses gates: AND, OR, NOT, multiplexers, decoders.
 Represented using logic diagrams, truth tables, or Karnaugh Maps (K-map).
 Example: Designing Full Adder using Boolean equations.

1. Converts behavioural description into logic equations (Boolean algebra)

 At this stage, we take the behavioural specification (“what the system does”) and
convert it into logic equations.
 These equations describe the exact Boolean relationships between inputs and
outputs.
 Example:
o Behavioural description: “Output is 1 if at least one input is 1.”
o Logic equation: Y = A + B (OR operation).
2. Uses gates: AND, OR, NOT, multiplexers, decoders

 Once we have Boolean equations, we implement them using logic gates.

 Examples:
o Equation: Y = A·B + A'·C
o Logic circuit: AND, OR, NOT gates wired together.
 Complex designs use combinational building blocks like multiplexers, decoders,
encoders.

3. Represented using logic diagrams, truth tables, or Karnaugh Maps (K-

map)

 Truth Table: Lists all possible inputs and corresponding outputs.

 Logic Diagram: Gate-level representation (AND, OR, NOT).
 K-map: Simplifies Boolean expressions to reduce number of gates.

4. Example: Designing a Full Adder using Boolean equations

 Inputs: A, B, Cin (carry-in).

 Outputs: Sum, Cout (carry-out).
 Truth Table:

A B Cin Sum Cout

000 0 0

001 1 0

010 1 0

011 0 1

100 1 0

101 0 1

110 0 1

111 1 1

 Boolean Equations:
 o Sum = A ⊕ B ⊕ Cin
o Cout = (A·B) + (B·Cin) + (A·Cin)
 Logic Diagram: Implemented using XOR, AND, OR gates.

(D) Circuit Design

 Translates logic into transistor-level circuits.

 Uses MOSFETs for gates (CMOS design).
 Focus on delay, power dissipation, noise margins, fan-in, fan-out.
 Example: CMOS NAND gate using 4 transistors.

1. Translates logic into transistor-level circuits

 At this stage, the Boolean logic design (AND, OR, XOR, etc.) is implemented using
actual transistors.
 Instead of abstract gates, we now see transistor networks that realize those gates.
 This is the level where VLSI (Very Large Scale Integration) work.

2. Uses MOSFETs for gates (CMOS design)

 Modern digital circuits use MOSFETs (Metal-Oxide-Semiconductor Field-Effect

Transistors).
 The most common style is CMOS (Complementary MOS), which uses:
o PMOS transistors (pull-up network).
o NMOS transistors (pull-down network).
 CMOS is widely used because it has:
o Low static power consumption (no current flows when idle).
o High noise immunity.

3. Focus on delay, power dissipation, noise margins, fan-in, fan-out

When designing circuits with transistors, engineers must consider:

 Delay: Time taken for a signal to propagate through a gate.

 Power Dissipation: Energy consumed (dynamic + static).
 Noise Margins: Tolerance against unwanted voltage fluctuations.
 Fan-in: Number of inputs a gate can handle.
 Fan-out: Number of gates a single output can drive reliably.

4. Example: CMOS NAND gate using 4 transistors

 Logic equation: Y = (A·B)'

 Implementation in CMOS:
o Pull-up network (PMOS): Two PMOS transistors in parallel.
o Pull-down network (NMOS): Two NMOS transistors in series.
 Operation:
o If both inputs A and B are 1 → output is pulled to 0.
o Otherwise → output is pulled to 1.
(E) Physical Design

 Actual layout design of transistors and interconnections.

 Follows Design Rules (λ-based rules).
 Steps: partitioning → placement → routing → compaction.
 Output: Mask Layout used in fabrication.

1. Actual layout design of transistors and interconnections

 At this stage, the transistor-level circuits (from circuit design) are converted into a
geometric layout.
 Layout shows exact shapes, sizes, and positions of transistors, wires, and vias on
silicon.
 Think of it as the blueprint for chip fabrication.

2. Follows Design Rules (λ-based rules)

 To ensure manufacturability, layouts must follow λ-based rules.

 Think of λ as a “unit of measurement” like Lego blocks.

 Instead of measuring in cm or inches, you design with Lego units.
 Later, the manufacturer decides how big one Lego block is (depends on the
technology).

✅ Summary

 λ-based rules = Technology-independent design rules.

 Define layout sizes (width, spacing, overlap) in multiples of λ.
 Ensures designs can easily migrate across technologies (e.g., 180 nm → 90 nm → 65
nm).
  These specify minimum width of lines, spacing between wires, via size, transistor
dimensions, etc.
 Ensures that the design can be fabricated with available technology.

3. Steps in Physical Design

1. Partitioning
o Divide the circuit into manageable blocks (e.g., ALU, memory, control).
2. Placement
o Decide where each block and transistor will sit on the chip.
3. Routing
o Connect blocks and transistors with wires while minimizing delay and area.
4. Compaction(Compress)
o Optimize layout to use minimum silicon area without violating rules.

4. Output: Mask Layout used in fabrication

 The final product of physical design is the mask layout.

 This layout is given to a semiconductor foundry for photolithography.
 Each mask corresponds to a different layer (diffusion, polysilicon, metal layers, etc.).