Microprocessors & Microcontrollers - Simplified
Notes
Common Signals for both Minimum mode and Maximum mode:
- AD7–AD0: Lower 8-bit address/data bus. (Separated by ALE)
- AD15–AD8: Upper 8-bit address/data bus. (Separated by ALE)
- A19/S6 – A16/S3: Higher address + status lines.
• S6 = always 0
• S5 = Interrupt flag status
• S4 & S3 = Type of memory access
8086 uses multiplexed address/data lines. ALE separates them. Status lines indicate operation
type.
Important Signals:
- READY: Device/memory is ready for data transfer.
- INTR: Normal interrupt request (needs IF flag = 1).
- NMI: Non-maskable interrupt (cannot be disabled).
- TEST: With WAIT instruction. If low → continue, else idle.
- RESET: Restarts 8086 at address FFFF0H.
- CLK: Clock input for timing.
- Vcc: +5V power supply.
- GND: Ground.
- MN/MX■: Mode select (1=Min, 0=Max).
Minimum Mode Signals:
- M/IO■: Memory (1) or I/O (0).
- INTA■: Interrupt acknowledge.
- ALE: Address latch enable.
- DT■/R■: Data direction (1=CPU→Peripheral, 0=Peripheral→CPU).
- DEN■: Data enable (valid data available).
- WR■: Write (active low).
- RD■: Read (active low).
- HOLD: Request for DMA.
- HLDA: Acknowledges DMA.
In Minimum Mode, 8086 directly controls memory, I/O, latches, and transceivers.
Maximum Mode Signals:
- S2, S1, S0: Show operation type.
- LOCK■: Prevents bus access by others.
- QS1, QS0: Instruction queue status.
- RQ/GT1■ & RQ/GT0■: Request/Grant (DMA operations).
In Maximum Mode, bus controller assists the CPU to manage memory, I/O, and multiprocessing.
Supporting Components in Minimum Mode:
- Latches (74LS373/8282): Separate address from multiplexed lines.
- Transceivers: Bidirectional buffers, controlled by DEN■ & DT■/R■.
- System Memory: RAM & ROM for storage.
- I/O Devices: For processor communication.
- Clock Generator: Generates precise system clock.
- Operation: Explained using timing diagrams (read/write cycles).
ALE latches address in T1, RD■/WR■ control read/write cycles, data transfer happens in T2–T3.
Minimum Mode vs Maximum Mode (Comparison)
Feature Minimum Mode Maximum Mode
Control 8086 directly generates signals 8086 + Bus Controller (8288)
Signals
RD■, WR■, ALE, DEN■, DT■/R■, M/IO■, HOLD,
S2, S1,
HLDA,
S0, LOCK■,
INTA■ QS1, QS0, RQ/GT0■, RQ/GT1■
Multiprocessing Not supported Supported
Simplicity Simple, small systems Complex, multiprocessor/DMA
Use Case Single processor Multiprocessor / coprocessor systems
