Group No…….

National Institute of Technology

Raipur

PHYSICS-II LABORATORY MANUAL

DEPARTMENT OF PHYSICS
National Institute of Technology Raipur
Name

Branch & Section

Roll. No.

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 General Instructions
1. Don’t use Mobile phone in Laboratory.
2. Each practical class will be divided into number of batches (A1, A2; B1, B2; C2,
C3...) consisting of at least three students.
3. Every batch/class will perform one practical on each turn.
4. Each student shall have to perform in general ten experiments in cyclic
chronological order. Each student will know on its first turn-which set of 10
experiments it is required to perform in that semester.
5. Procedure of cyclic rotation will be strictly followed irrespective of the fact
whether allotted experiment could be completed or not and whether a student
was present or absent in the previous class.
6. Practical Record Book will be submitted in the lab positively before getting the
apparatus issued. Attendance is marked on the basis of record books deposited.
Hence, do not forget to submit record book immediately after entering the lab.
7. When the name of particular student is called, he/she and his/her partner will
present himself to the professor along with their preparation note books for
checking of their practical record books.
8. Calculation must be done separately on the left page of the record book by
substituting various observed values in the formula for each set of observations.
9. Keep various items of any experiment in the same order as shown in the circuit
diagram. Initially all keys should be kept open. Thereafter, connections should
be made selecting wires of appropriate length.
10. Every measuring instrument has a least count. Find it and measure up to the
desired place accurately and record accordingly.
11. Disconnect the apparatus and do return the issued material at the counter before
leaving the laboratory.
12. Please get the readings verified by teacher after taking the readings.
13. NOTE: For any doubts related to configuring or approaching the theoretical
aspects of experiments, please reach out to your concerned faculty member or
teacher during the lab session.
14. For any calibration or adjustments needed in the setup, please contact the
technical staff of the lab for assistance.

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 Phone : (0771)2243413
Fax : (0771) 2254600
NATIONAL INSTITUTE OF TECHNOLOGY RAIPUR Email : [email protected]
Website : www.nitrr.ac.in
(Institute of National Importance)
G.E. Road Raipur (C.G.)
Effective from – August 2025

Department of Physics
List of Experiments (Physics-II Lab)

1. To verify the truth tables of basic and universal logic gates (OR, AND, NOT, NOR and
NAND) and verification of De Morgan’s theorems.
2.To study the input and output characteristics and to calculate the h- parameter of PNP
transistor in CE and CB modes.
3. To determine the resistivity and band-gap value of a semiconductor material by four
probes technique.
4. To study the conversion of digital signals in to analog signals using D/A converter.
5. To study the characteristics of field effect transistor (FET).
6. To study output and transfer characteristics of a Metal Oxide Silicon Field Effect
Transistor (MOSFET) and to identify the type of MOSFET.
7. To study the characteristics of a Unijunction transistor (UJT).
8. To study conversion of analog signals into digital signals using A/D converter.
9. To study the Hall Effect and determine to Hall Coefficient (R H).
10. To study various characteristics of a Light Emitting Diode (LED)
11. (A) To construct Hartley oscillator using a transistor and to determine its frequency of
oscillations and compare it with theoretical value.
(B) To study of the wave shape and frequency produced by Colpitt’s oscillator.
12. To study the following applications of OP-AMP (model 625)-
(a) Inverting (b) Non-inverting
(c) Summing (d) Differentiator
13. To determine the width of the forbidden energy-gap in a semiconductor material taken
in the form of a p-n junction diode.
14. To study the different operations of ALU (Arithmetic Logic Unit).
15.To study the V-I characteristics of a solar cell.

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 Group No. ............. Roll No. ....................

Index
Date of Date of Marks
Sr. Title of the Page Submissi obtained
Performing Remarks
No. Experiment No. on/correc (Max.
Experiment tion 10)

10

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Roll No. ............................. Date ……………..

EXPERIMENT NO. 1
Object: To verify the truth tables of basic and universal logic gates (OR, AND, NOT,
NOR & NAND) and verification of De Morgan’s theorems.

Apparatus required:
1. For logic Gates: Logic gate experiment kit, leads wire, DC powe supply.
2. For De Morgan’s law: - Experiment kit, connection wire, +5 V DC power supply

Theory:
1. LOGIC GATES
A logic gate is an elementary building block of a digital circuit. Most logic gates have two
inputs and one output. At any given moment, every terminal is in one of the two binary
conditions low (0) or high (1), represented by different voltage levels. The logic state of a
terminal can, and generally does, change often, as the circuit processes data. In most logic
gates, the low state is approximately zero volts (0 V), while the high state is approximately five
volts positive (+5 V). There are seven fundamental/basic logic gates: AND, OR, XOR, NOT,
NAND, NOR, and XNOR.
Boolean equations: Circuit diagram:
(1) Y = A + B (OR gate)
(2) Y = A . B ( AND gate )
(3) Y = (A + B) ( NOR gate )
(4) Y = (A . B) ( NAND gate )
(5) Y = A or B ( NOT gate )

Where A and B are inputs and Y

is output.

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 2. De Morgan’s Theorems

De Morgan, a great logician and mathematician was a friend of Boole. Among De

Morgan’s important contributions to logic are these two theorems:
I) A + B = A. B
Above equation states that complement of sum of two variables equals to the product of
their complements
ii) A. B = A + B
This second equation says the complement of product of two variables equals to the sum
of their complements.
Circuit implications of first theorem: - De Morgan’s first theorem says. A + B = A . B

The left side of this equation represents an OR gate followed by an inverter (see in figure).
Originally called a NOT-OR gate, this combination is now referred to as a Nor gate and the
abbreviated logic symbol (see in figure) is widely used.
Notice that the inverter triangle has been removed and the small circle or bubble moved to the
OR gate output. This bubble is a reminder of the inversion that follows the ORing.
The right side of De Morgan’s first theorem is A.B; this represents an AND gate whose input
are inverted (see in figure). This combination is so widely used that the abbreviated logic
symbol (see in figure). Notice that the inverter triangles have been detected and the bubbles
moved to the AND gate inputs. From now on, we will refer to the symbol 0 (see in figure) as a
bubbled AND gate; the bubbles are a reminder of the inversion that takes place before ANDing.
Summarizes of De Morgan’s First theorem: - A NOR gate and a bubbled AND gate are
equivalent. This means you can replace one by the other whenever desired. As show later, the
interchange ability of a NOR gate and a bubbled AND gate often leads to simpler logic circuits.
Circuit implications of second theorem: - De Morgan’s second theorem says. A. B = A +
B

The left side of this equation represents NOT-AND gate, this combination is now referred to
as a NAND gate and the abbreviated symbol see in figure.

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The right side of the second theorem implies that the inputs are inverted before reaching an OR
gate (see in figure). This combination is used so often that the abbreviated symbol (see in
figure) of has come into use.
Again the triangles are deleted and the bubbles moved directly to the inputs. These bubbles
remind us of the inversion that takes place before ANDing. From now on, we will call the
bubbled OR gate (see symbol as given figure).
Instructions:
1. Connections should be made tight and carefully.
2. Only D.C. voltages are to be used.
3. Voltage should be applied within specified limit.
4. Write output 1 when indicator is ON and 0 when indicator is OFF.
5. Take reading under instrument range.

Procedure:
1. LOGIC GATES:
(1) For AND gate operation: - To operate AND gate, connect logic input switches with the
AND gate input switches as shown in fig. Connect the output of AND gate to the logic
indicator glows, then write “ON” in desired column of the observation table, otherwise
“OFF’’ .

Inputs Indicator
Serial number Output
A B ON / OFF
1 0 0
2 0 1
3 1 0
4 1 1
Note:- Write output 1 when indicator is ON and output 0 when indicator is OFF.

(2) For OR gate operation: To operate OR gate, connect logic input switches to the OR gate
input as shown in fig., connect the output of the OR gate to the logic indicator.

Inputs Indicator
Serial number Output
A B ON / OFF
1 0 0
2 0 1
3 1 0
4 1 1
Note: Write output 1 when indicator is ON and output 0 when indicator is OFF

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(3) For NOR gate operation: To operate NOR gate, connect logic input switches with the
NOR gate input shown in fig. connect the output the output of NOR gate to the logic indicator.

Inputs Indicator
Serial number Output
A B ON / OFF
1 0 0
2 0 1
3 1 0
4 1 1

(4) For NAND gate operation: To operate NAND gate, connect logic input switches with the
NAND gate inputs shown in fig., connect the output of NAND gate to the logic indicator.

Inputs Indicator
Serial number Output
A B ON / OFF
1 0 0
2 0 1
3 1 0
4 1 1

(5) For NOT gate operation: To operating NOT gate connect any one of the two logic input
switched with the NOT gate input as shown in fig., connect the output of NOT gate to the logic
indicator.

Input Indicator ON / OFF Output

0
1

2. De Morgans Theorems:
(i) Addition operation in Boolean algebra is equivalent to the or in the logic circuits and
multiplication in the Boolean is same as AND and inversion is equivalent to not operation in
the logic circuit.
(ii) High state in circuit is same as 1 logic level and low state is same as 0 logic level. Similarly
glowing LFD shows the logic level in the output and switched off LED show a 0 logic level in
the output

a. First theorem

A B A B A+B A .B
0 0
0 1 =
1 0
1 1

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 b. Second theorem

A B Ā B A .B A+B
0 0
0 1 =
1 0
1 1

Graph:

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 1

Result:
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Results:
1. LOGIC GATES: On comparison of output of observation table and corresponding truth
table for …………….. GATE operation, the …………….. GATE operation is experimentally
verified.
2. De Morgans Theorems: The results in truth tables verify laws 1 and 2.

Conclusion:

List of taken precautions:

Questions:
1) What is a logic gate?

2) Define number system and truth table.

3) What do you mean by positive logic and negative logic?

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4) State De Morgan’s first and second theorem.

5) Why AND, OR and NOT gates are called as basic gates?

6) Why NOR and NAND gates are called as universal gates?

7) What is the importance of the study of the logic gates?

8) Differentiate between analog and digital waveforms/circuits/instruments.

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 Date: ……………..
Roll No. .............................

EXPERIMENT NO. 2

Object: To study the input and output characteristics of PNP transistor in CE mode and
to calculate h parameters of a transistor.
Apparatus Required: Transistor characteristics kit, multimeter, voltmeter, connecting
leads and power supply.

Circuit Diagram:

CE mode

Theory:
A Transistor is a semiconductor current operating device capable of giving current gain,
voltage amplification and power gain, its operation depends upon the flow of electric
charge carriers in the solid state. Characteristics in the graphical form are helpful in
understanding the performance of transistor. The basic parameters of the transistor are
emitter voltage (𝑉 ), emitter current (𝐼 ), collector voltage (𝑉 ), collector current (𝐼 )
and
Base current (𝐼 ). The relation between input and output current and voltages may be
represented graphically known as characteristics curves.
In common emitter PNP junction transistor, emitter is made common to both the input
and output circuit. Let 𝑉 and 𝑉 represents the potential difference between base
emitter and collector emitter respectively and let 𝐼 and 𝐼 are the base and collector
current respectively. The input voltage 𝑉 and the output current 𝐼 are taken as
dependent variables whereas the input current 𝐼 and the output voltage 𝑉 are taken as
independent variables.

Formulas used: H- parameters of a transistor in CE configuration are-

∆
(i) Input Impedance - 𝒓𝒊 =
∆ 𝒂𝒕 𝒄𝒐𝒏𝒔𝒕
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 Slope of input characteristic curve

∆
(ii) Output Impedance- 𝒓𝒐 =
∆ 𝒂𝒕 𝒄𝒐𝒏𝒔𝒕
Slope of output characteristic curve

Instructions:
1. Collector voltage must not exceed the breakdown voltage.
2. Never connect transistor directly to AC switch.
3. Least count of voltmeter = 0.1 V
4. Least count of micro ammeter = 5 A
5. Take reading under instrument range.

Procedure:
Connect the circuit as per the diagram.

INPUT CHARACTERISTICS
1. Keep collector-emitter voltage (VCE) constant.
2. Now by varying base-emitter voltage (VBE),note down the readings of base
current Ib.
3. Repeat above steps for different constant values of VCE.
4. Draw graph between VBE and IB.

OUTPUT CHARACTERISTICS
1. Now keep the value of base current Ib fixed.
2. Now by varying collector-emitter voltage (Vce),note down the readings of
collector current Ic..
3. Repeat above steps for different constant values of Ib.
4. Draw graph between Vce and Ic taking them along X and Y-axis respectively.

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 Input Characteristics Curve Output Characteristics
Curve
Observations:
1. Input characteristics: At constant Vce= 0V,1V,2V,3V
Vce = V Vce = V Vce = V Vce = V
Emitter Emitter Emitter Emitter
Base Base Base Base
Sr. No. Base Base Base Base
current current current current
voltage voltage voltage voltage
Ib (μA) Ib (μA) Ib (μA) Ib (μA)
Vbe Vbe Vbe Vbe
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.

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 2. Output characteristics: At constant Ib

Ib= μA Ib= μA Ib= μA Ib= μA

Collector Collector Collector Collector
Sr. Collector Collector Collector Collector
Emitter Emitter Emitter Emitter
No. current current current current
voltage voltage voltage voltage
Ic(mA) Ic(mA) Ic(mA) Ic (mA)
Vce Vce Vce Vce
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.

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RESULT: h- parameters of a transistor in CE configuration are-

Input Impedance: - h11 =

Output Admittance: h22 =

Conclusion:

List of taken precautions:

Questions:

1. Define transistor? What is the meaning of word TRANSISTOR?

2. Why a transistor is called as a bipolar junction transistor (BJT)?

3. How many terminals does a transistor have? Why base is kept very thin?

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 4. Draw the symbols for PNP and NPN transistors.

5. Discuss important applications of transistors?

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 Roll No. ............................. Date = ……………..

EXPERIMENT NO. 3
Object: To determine the electrical resistivity and band-gap value of semiconducting material
using four-probe technique.

Apparatus Required: Four probe assembly with oven, semiconducting sample, current
source, voltmeter, etc.

Theory: The Ohm's law in terms of the electric field and current density is given by the
relation-
(1)

where, ‘ρ’ is electrical resistivity of the material. For a long thin wire-like geometry of uniform
cross-section or for a long parallelopiped shaped sample of uniform cross-section, the
resistivity ρ can be measured by measuring the voltage drop across the sample due to passage
of known (constant) current through the sample as shown in fig. 1 (a).

Fig.1
In this method, four pointed, collinear equispaced probes are placed on the plane surface of the
specimen (Fig.1b). A small pressure is applied using springs to make the electrical contacts.
The diameter of the contact (which is assumed to be hemispherical) between each probe and
the specimen surface is small compared to the spacing between the probes. Assume that the
thickness of the sample ‘d’ is small compared to the spacing between the probes s (i.e., d <<
s). Then the current streamlines inside the sample due to a probe carrying current I will have
radial symmetry, so that and from eqn. (1),

(2)

If the outer two probes (l and 4) are current carrying probes, and the inner two probes (2 and
3) are used to monitor the potential difference between the inner two points of contact, then
total current density at the probe point ‘2’ which is at a distance r from probe ‘1’ and r’ from
probe ‘4’ can be written as,
(3)

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From eqns. (2) and (3) potential difference between probes (2) and (3) can be written as,

(4)

Now the variation of resistivity with temperature is given by:

(5)

where, Eg is the bandgap of the semiconductor. A plot of ln(ρ) vs. 1/T would be a straight line
with a slope of Eg / k. Hence, band-gap Eg can be determined from the slope of the straight line.
For convenience, usually ln(ρ) is plotted as a function of 1000/T (instead of 1/T) and Eg is
calculated by taking into account the 1000 factor.

Experimental Set-up:
 The four-probe assembly consists of four spring loaded probes arranged in a line with
equal spacing between adjacent probes.
 These probes rest on a metal plate on which thin slices of samples (whose resistivity is
to be determined) can be mounted by insulating their bottom surface using a mica sheet.
Black leads are provided for carrying current and red leads for voltages measurements.
 The sample, usually, is brittle; hence do not attempt to mount the sample yourself. This
assembly is mounted in a lid of an oven, so that the four probes and the sample can be
kept inside the oven and sample can be heated up to a temperature of 200° C. The
temperature inside the oven can be measured by inserting a thermometer through a hole
in the lid.
 The constant current is supplied through probes 1 and 4 by a constant current source.
The value of the current can be read from the LED display on the unit. The digital
voltmeter is used to measure the voltage drop between probes 2 and 3. It uses the same
LED display through a toggle switch.
 It operates in two modes xl and x10 with maximum of 199.9 mV and 1.999 V,
respectively. Oven can be heated to low (L) or high (H) temperatures through the
electric supply for it. There is an indicator LED, which glows when the oven is turned
ON.

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 Fig. 3

Instructions:
1. The sample of semiconductor must have uniform resistivity throughout its
length.
2. The surface of specimen semiconductor chip in contact with the probe must be
flat and there must be a good electrical contact.
3. The point of contact of the probe with semiconductor chip must be small in
dimension than the separation between probes.
4. Note down the voltage readings as a function of temperature starting from
maximum to room temperature.
5. Take reading under instrument range.
6. Do not open or touch the inside of the oven heater, as the specimen sample is highly
sensitive, and there is a risk of electrical hazards.
7. For any calibration or adjustments needed in the setup, please contact the technical
staff of the lab for assistance.

Procedure:
1. Make the connections as shown in fig. 2.

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2. Set some suitable low value of current (2 to 4 mA) from the constant current source. Note
down this reading.
3. Switch on the oven supply and waith the temperature to reach 80-85 C.
5. Determine the experimental resistivity as a function of temperature using equation  =
o/f(W/S) where f (W/S) = 5.89
6. Express your resistivity data in Ohm-cm unit and temperature in Kelvin (K).
7. Plot ln(ρ) vs. 1000/T(K) to get a straight line. From the slope of the line (choose
only the linear portion of the curve), calculate Eg (band-gap of the semiconductor) using the
relation

o can be calculated using formula o = (V/I)2S

8. Estimate error in measured resistivity

9. For any doubts related to configuring or approaching the theoretical aspects of
experiments, please reach out to your concerned faculty members or teachers
during the lab session.

Observation Table: - Temperature is decreasing.

Set Current I=
Room temperature - Voltage (at Room temperature)-
S.NO. Temperature K= T+273 1000/T(K-1) Voltage Rsistivity Ln10(ρ)
in C (V) ρ
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Data Given:
Distance between probes, S = 2 mm, Thickness of the sample, W = 0.4 mm

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Results & Calculations:
Plot ln10(ρ) vs. 1000/T and use the straight line portion of the graph to calculate the slope of
the straight line. Slope = Eg/2k*1000 which yields Eg in eV for the semiconductor material
under study

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Graph : To plot graph between T-1X 1000 (x-axis) and log10 ρ (y-axis).

Conclusion:

List of taken precautions:

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Questions:
1. Define a semiconductor.

2. What is a band-gap in context of semiconductors?

3. What is the principle of your experiment?

4. Why does the resistivity of a semiconductor decrease with increase in

temperature?

5. Define resistivity? Write its unit.

6. Why do you use four probes?

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 Date = ……………..
Roll No. .............................

EXPERIMENT NO. 4
Object: - To study conversion of digital signals into analog signals using (D/A) converter.
Apparatus required: - D/A converter kit, connection wires, multi meter, DC power supply.
Theory: - Digital to analog (D/A) and analog-to-digital (A/D) conversion form two very
important aspect of digital data processing. D/A conversion involve translating digital
information into equivalent analog information. As an example, the output of a digital system
might be changed to analog form for the purpose of driving a pen recorder. Similarly, an analog
signal might be required for the servomotors, which drive the cursor arms of a plotter. In this
respect, a D/A converter is sometimes considered a decoding device. The process of changing
an analog signal to an equivalent digital signal is accomplished by the use of an A/D converter.
For example, an A/D converter is used to change the analog output signals from transducers in
to equivalent digital signals. These signals would then be in a form suitable for entry into a
digital system. An A/D converter is often referred to as an encoding device since it is used to
encode signals for entry into a digital system. DA conversion is a straightforward process
and is considerably easier than A/D conversion. In fact, a D/A converter is usually an integral
part of any A/D converter. For this reason, we shall consider the digital-to-analog conversion
process first.
Variable resistor network: - The basic problem in converting a digital signal into an
equivalent signal is to change the n digital voltage levels into one equivalent analog voltage.
This can be most easily accomplished by designing a resistive network which will change each
of the digital levels into an equivalent binary weighted voltage (or current).
Circuit Diagram: -

Instruction:

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1. All the connection must be tight.
2. Readings of multi meter must be taken carefully.
3. Take reading under instrument range.

Procedure: Set the DC voltage with the help of digital multimeter near the 20V sockets (5V)
side. Now proceed as per the truth table given below by using the table. You will find the
difference in the voltage at the output. Tabulate the results in front of each column.
How to check the experiment: Change the position of switches A, B, C, D as per the table given
and measure the output on output socket on digital multimeter. Complete the same as per given
in the table (practical output)
Note: For any doubts related to configuring or approaching the theoretical aspects
of experiments, please reach out to your concerned faculty members or teachers
during the lab session.

Observation table: -

Digital input Practical output Observed output

S. No. (volts) Vo
A B C D (volts) Vo
1 0 0 0 0 -0.01
2 0 0 0 1 -0.36
3 0 0 1 0 -0.69
4 0 0 1 1 -1.06
5 0 1 0 0 -1.34
6 0 1 0 1 -1.71
7 0 1 1 0 -2.03
8 0 1 1 1 -2.40
9 1 0 0 0 -2.53
10 1 0 0 1 -2.90
11 1 0 1 0 -3.23
12 1 0 1 1 -3.59
13 1 1 0 0 -3.88
14 1 1 0 1 -4.24
15 1 1 1 0 -4.56
16 1 1 1 1 -4.93

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Graph:

Result: Analog output signal obtained for the corresponding digital signal.

Conclusion:

List of taken precautions:

Questions:
1. Why conversion is required?

2. Differentiate between digital and analog instruments?

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 3. Why digital signals need to be converted to analog signals?

4. Write applications of D/A converter?

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 Roll No. ............................. Date = ……………..

EXPERIMENT NO. 5

Object: To study characteristics of a Field Effect Transistor (FET)

Apparatus required: FET (n-channel), BFW 10 or equivalent, two independent DC low
voltage sources ( 5V and 0 – 15 volts ), Voltmeter ( 0 – 2.5 volts and 0 -15 volts ), milliammeter
( 0 – 15 mA ).
Theory: The Field Effect Transistor or FET is a semiconductor amplifying device in which
the output current is controlled by the input voltage, rather than by the input current as in the
case of ordinary transistor. For this action the FET depends on only one kind of current carrier
(electron or hole), It is therefore some time called ``unipolar’’ to distinguish it from the ordinary
transistor which uses two types of current carriers and is called ``bipolar’’.
There are basically two types of FETs in regular use today. The most common is the junction
field effect transistor of JFET, which has a direct Ohmic contact at the gate in the JFET. There
are p and n channel type JFETs. The n-channel FET is very similar in voltage polarities and
biasing to a vacuum tube triode.
Typically, a junction field effect transistor consists of a conducting channel enclosed for part
of its length by a p-n junction. A theoretical basic structure and modern planar version of JFET
are shown in figure. One end of the channel is called Source(S), the other end Drains (D) and
the enclosing material that forms the junction, a Gate (G). These can be compared with the
cathode, anode and grid respectively of an electron tube. If the channel is of n-type material as
show in figure, the device is called an n-channel transistor; if the opposite arrangement is used;
it is called a p-channel transistor.
The usefulness of the field-effect transistor is based on ability of the gate source potential to
control the conductance of the channel and hence the current flow between the source and
drain. Application of a reverse bias Vgs across the p-junction creates a space change, which
partly depletes the channel of carriers and reduces its conductance. The bias value at which its
conductance falls to zero is known as the pinch off voltage Vp.
Circuit Diagram:

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Instructions:
1. The three terminals of the FET must be carefully identified.
2. Practically FET contains four terminals, which are called source, drain, gate and substrate.
3. Source and gate should be short circuited.
4. Voltages exceeding the ratings of the FET should not be applied.
5. Take reading under instrument range.

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Procedure:
1). Output Characteristic
(1) Adjust Vgs = 0V and very Vds in small step and for each value of Vds, note the drain current
Id.
(2) Adjust Vgs to 0.1, 0.2, 0.3V...... or 0.2,0.4,0.6V..... or 0.5, 1.0, 1.5V..... and so on.
(3) Adjust Vds in small step (0.1, 0.2, 0.3V...... or 0.2,0.4,0.6V..... or 0.5, 1.0, 1.5V.....) and
note drain current and draw the graph between Vds and drain current for every Vgs voltage.

2). Transfer characteristic curve

(1) Adjust Vds voltage in any constant value.
(2) Adjust Vgs in small step and note drain current and draw the graph between Vgs and drain
current for constant Vds.

Note: For any doubts related to configuring or approaching the theoretical aspects
of experiments, please reach out to your concerned faculty members or teachers
during the lab session.

Observation table: -
(1) Output Characteristic

Vgs = - Volts Vgs = - Volts Vgs = - Volts Vgs = - Volts

Sr.
Vds Id Vds Id Vds Id Vds Id
No.
(volts) (mA) (volts) (mA) (volts) (mA) (volts) (mA)
1
2
3
4
5
6
7
8
9
10

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(2). Transfer characteristic

Vds (volt) = …. V Vds (volt) = …. V

S. No.
Vgs (volt) Id (mA) Vgs (volt) Id (mA)

10

Note: - Only one transfer characteristic curve is to be plotted on one graph paper.

Graphs:
Output characteristic: Plot graphs of Id against Vds on constant Vgs, one graph paper.

Transfer characteristic: Plot graphs of Id against Vgs on a separate graph paper.

Transfer characteristic curve Output characteristic curve

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Results: The drain characteristics are similar to that of a pentode value. The current is almost
independent of drain voltage above `PINCH OFF’. The input resistance is essentially that of a
reverse biased p-n (gate of source) junction, therefore is very high.
Transfer characteristic is similar to that of a vacuum triode.

Conclusion:

List of taken precautions:

Questions:

1. What is a transistor?

2. What is an FET?

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 3. What are the three terminals of a FET?

4. Why FET is preferred over transistors?

5. FET is UJT or BJT? Explain?

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 Date = ……………..
Roll No. .............................

EXPERIMENT NO. 6

Object: To study output and transfer characteristics of a Metal Oxide Silicon Field Effect
Transistor (MOSFET) and to identify the type of MOSFET.
Apparatus required: Trainer kit, connecting wires, power supply.
Theory: The Metal Oxide Silicon Field Effect Transistor (MOSFET) is a device with
remarkable properties. It has input impedance greater than most vacuum tubes, a simple
geometry inherently cheaper to fabricate than a junction transistor, essentially infinite current
gain and extremely small size. Various designations of this device include IGEFT (insulated
gate field effect transistor), etc. Its extreme high input impedance has opened new vistas for
electronic circuits, particularly in ultra-sensitive electronic instruments, timing monitoring and
various types of logic circuitry.
The MOSFET uses a metal gate electrode, which is separated from the channel by the insulating
properties of thin layer of glassy silicon dioxide. Figure, as given below shows the theoretical
basic structure and the modern planar version of a MOSFET. Like the p-n junction, this
insulated gate electrode can deplete an adjacent channel of its active carriers when suitable bias
voltages are applied.
In contrast with the junction gate operation, however, the conductivity of the depletion type
MOS transistor channel can be substantially increased simply by reversing the polarity of the
gate voltage. As a result of this unique characteristic, the input resistance remains high
regardless of the signal voltage polarity. In additions the typical leakage currents associated
with silicon dioxide insulator are relatively insensitive to temperature change and are many
times small in magnitude than silicon junction leakage currents.
There are two modes of operation for MOSFETS; enhancement mode and depletion mode. The
drain is biased positive with respect to the source. When the gate is shorted to the source, that
is Vgs = 0, current flows through the channel, bulk resistance being the only limiting factor. As
the drain current increases the voltage drop across the bulk of the channel makes the gate to
channel getting more depleted near the drain and a stage is reached when further increase in
drain to source voltage is compensated by the increase in channel resistance due to depletion
of carriers resulting in no appreciable change in drain current. Then the channel is said to have
been pinched-off. The source drain voltage at which the drain current does not increase further,
is called pinch-off voltage.
A negative gate to source bias depletes the channel of the carrier thus reducing the drain
currents. With negative bias, the extremely applied electric field adds on to the one produced
by drain current and the channel is pinched off at a small drain currents. It is observed that the
channel width is less near the drain because of the field developed by the channel resistive
drop. Sufficient negative bias will remove all the current to flow between drain and source with
positive bias applied to the gate. Electrons are attracted to the underside of the gate and thus
channel conductivity is increased resulting in increased drain current.

Circuit Diagram:

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Effective from Aug-2025 Page No.
Instructions:
1. The three terminals of the MOSFET must be carefully identified.
2. Practically MOSFET contains four terminals, which are called source, drain, Gate,
substrate.
3. Make connection carefully.
4. Take reading carefully.
5. Least count of Vgs = 0.1 V
6. Least count of ammeter = 0.5 mA (30 mA range)
7. Least count of Vds = 0.5 V
8. Least count of voltmeter = 0.5 V
9. Least count of miliammeter = 0.25 mA
10. Take reading under instrument range.

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Procedure:
Output Characteristics:
(1) Adjust Vgs so that output is obtained and then vary in small steps of 0.1 V.
(2) Select switch 5mA or 25mA
(3) Increase Vds in small steps (0.1, 0.2, 0.3V...... or 0.2,0.4,0.6V..... or 0.5, 1.0, 1.5V.....)
and note down the values of drain current Id.
(4) Again adjust to Vgs to 3.0, 3.1, 3.2, 3.3, 3.4, 3.5 volts (only this value) and repeat step
3 and draw the graph between Id and Vds on constant value of Vgs.

Transfer Characteristics:
(1) Adjust the Vds in any value (constant value).
(2) Increase Vgs in small step and note the Id.
(3) Put 5mA/25mA switch towards 25mA.

Note: For any doubts related to configuring or approaching the theoretical aspects
of experiments, please reach out to your concerned faculty members or teachers
during the lab session.

Graphs: Output characteristic: Plot graph between Vds and Id keeping Vds constant.

Transfer characteristic: Plot drain current Id against Vgs on a separate graph paper.

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Observation Table-1: Output characteristic curve

VGS (volt) = ..........Volts VGS (volt) = ..........Volts VGS (volt) =.......... Volts
S. No.
VDS (volt) ID (mA) VDS (volt) ID (mA) VDS (volt) ID (mA)

1.

2.

3.

4.

5.

6.

7.

8.

9.

10.

Table:2- Transfer characteristic curve

S. No. Vds (volt) = .....…. Volts Vds (volt) = …...... Volts

Vgs (volt) Id (mA) Vgs (volt) Id (mA)

1.

2.

3.

4.

5.

6.

7.

8.

9.

10.

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Conclusion:

Results:

List of taken precautions:

Questions:

1. What is a MOSFET?

2. What is the difference between FET and MOSFET?

3. What are the three terminals of MOSFET?

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 4. How does current conduction take place in a MOSFET?

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Effective from Aug-2025 Page No.
Roll No. Date:

EXPERIMENT NO. 7

Object: To study the V-I characteristics of a Uni-Junction Transistor (UJT).

Theory: A Uni-Junction Transistor (UJT) is a three terminal semiconductor switching device.

This device has a unique characteristic that when it is triggered, the emitter current increases
regeneratively until it is limited by emitter power supply. Due to this characteristic, the Uni-
Junction Transistor (UJT) can be employed in a variety of applications, such as switching.
Pulse generator, saw tooth generator etc.

Circuit Diagram:

Construction: Fig (1a) shows the basic structure of a Uni-Junction Transistor (UJT). It consists
of an n-type silicon bar with an electrical connection on each end. The leads of these
connections are called base leads, Base-one B1 and base-two B2. Part way along the bar
between the two bases, near to B2 than B1, a PN junction is formed between a P type emitter
and the bar. The lead to this junction is called the emitter lead E. in fig. (1b) shows the symbol
of unijunction transistor. It is noted from fig. (1a) that emitter is closer to B2 than B1. The
following points are worth noting.

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 I) Since the device has one PN junction and three leads, it is commonly called a Uni-
Junction Transistor (UJT).
II) With only one PN Junction the device is really a form of diode, because the two
base terminals are taken from one section of the diode, this device is also called
double-based diode.
III) The emitter is heavily doped having many holes. The n-region, however is lightly
doped. For this reason, the resistance between the base terminals is very high (5KΩ
to 10KΩ) when emitter lead is open.

Operation: Following figure shows the basic circuit operation of a unijunction transistor. The
device has normally B2 positive w.r.t. B1.

I) If voltage VBB is applied between terminals B1 and B2 with emitter open as show
in figure a voltage radiant is established along the n type bar. Since the emitter is
located nearer t B2 more than half of the VBB appears between the emitter and B1.
The voltage V1 between emitter and B1 establishes a reverse bias on the PN
Junction and the emitter current is cut off. Of course a small leakage current flows
from B2 to emitter due to minority carriers.

II) If a positive voltage is applied at the emitter as shown in figure, the PN Junction
remains reverse biased so long as the input voltage is less than V1. If the input
voltage to the emitter exceeds V1, the PN Junction becomes forward biased. Under
these conditions holes are injected from P-type material into the n type bar. These
holes are repelled by positive B2 terminal and they are attracted towards B1

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 terminal of the bar. This accumulation of holes in the emitter to B1 region results
in the decrease of resistance in this section of the bar. The result is that internal
voltage drop from emitter to B1 is decreased and hence the emitter current IE
increases. As more holes are injected, a condition of saturation will eventually be
reached. At this point the emitter current is limited by the emitter voltage or emitter
power supply. The device is now in the ON state.
If a negative pulse is applied to the emitter, the p-n junction is reverse biased
and the emitter is cut off. The device is then said to be in the off state.

Procedure:
1. Connect the dotted lines through patch cords as shown in the circuit of figure.
2. Keep both the power supplies at zero potential.
3. Switch ON the instrument using ON/OFF toggle switch provided on the front
panel.
4. Select the current meter range to 1.5 mA through SPDT switch.
5. Adjust VB2B1 (voltage between B2 and B1) to 5VDC.
6. Increase the value of VE (emitter voltage) in small steps (0.1, 0.2, 0.3V...... or
0.2,0.4,0.6V..... or 0.5, 1.0, 1.5V..... etc.) and note down the corresponding
value of IE (emitter current).
7. Now change the milliammeter range to 60 mA and start increasing the value of
VE, at a particular value of VE,IE current increases sharply with decrease in VE.
Note down the value of VE at the instant. Note down the observation in Table
8. Adjust VB2B1 at 10V, 15V and 20 volts, again repeat the 6 and 7th steps.
9. Draw a graph between IE and VE as Shown in figure.

Characteristics of UJT: in figure shows the curve between emitter voltage (VE) and emitter
current (IE) of a UJT at a given voltage VBB between the bases. This is known as the emitter
characteristic: -
1. Initially, in the cutoff region, as VE increases from zero, slight leakage current flows
from terminal B2 to the emitter. This current is due to the minority carriers in the reverse
biased diode.
2. Above a certain value of VE, forward current IE begins to flow, increasing until the peak
voltage VP and current IP are reached at point P.
3. After the peak point p, an attempt to increase VE is followed by a sudden increase in
emitter current IE with a corresponding decrease in VE. Then negative portion of the
curve because with increase in IE, VE decreases.
4. The negative portion of the curve lasts until the valley point V is reached with valley
point voltage VV and valley point current IV. After the valley point, the device is to
saturation.

Note: For any doubts related to configuring or approaching the theoretical aspects
of experiments, please reach out to your concerned faculty members or teachers
during the lab session.

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Observation Table:

VB2B1= VB2B1= VB2B1= VB2B1=

S.N.
VE IE VE IE VE IE VE IE
1
2
3
4
5
6
7
8
9
10

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Conclusion:

List of taken precautions:

Questions:
1. What do you mean by UJT?

2. What are various applications of UJTs?

3. Differentiate between BJT and UJT.

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 4. Define channel in a UJT.

5. How many regions does the input characteristic curve of a UJT have?

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Effective from Aug-2025 Page No.
Roll No.=........................... Date = ……………..

EXPERIMENT NO. 8

Object: To study conversion of analog signal into digital signal using A/D converter.
Apparatus required: A/D converter kit (ADC 0808/09), connection wires, multi meter.
Theory: The process of changing an analog signal to an equivalent digital signal is
accomplished by the use of an A/D Converter. In this system a continuous sequence of equally
spaced pulses is passed is passed through AND gate. The gate is normally closed and is opened
at the instant of the beginning of a linear sweep voltage. The gate remains open until the linear
sweep voltage attains the reference voltage of the comparator, the level of which is set equal to
the analog voltage to be converted. The number of pulses is proportional to the analog voltage.
If the analog voltage varies with time, it will not be possible to convert the analog voltage
continuously, but it will be required that the analog data be sampled at intervals. The maximum
value of the analog voltage will be represented by a number of pulses. The clear pulse resets
the counter to the zero count. The counter then records in binary form from the clock lines. The
clock is a source of pulses spaced in time since the number of pulses counted increases linearly
with time, the binary word representing this count is used as the input of a D/A converter. As
long as the analog input V is greater than Vd the comparator output is high and the AND gate
is open for the transmission of the clock pulses to the counter. When V exceeds Vd, the
comparator output changes to the low value and the gate is disabled. This stops counting when
Vs ~ Vd the counter can be read out as the digital word representing the analog input voltage.
Circuit Diagram:

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Instructions:
1) All the connections must be tight.
2). Readings of multi meter must be taken carefully.
3). Take the analog input voltage in a proper interval.
4) Take reading under instrument range.

Procedure:
1) Connect the o/p terminals (marked LSB to MSB) on the paned to the I/P terminal of all the
LED’s one by one.
2). Turn ON the potentiometer knob to set DCV (0-20 volt) side.
3). Put the clock switch in the latched mode.
4). Connect IN marked socked to input voltage socket positive.
5). Switch on the power.
6). Measure the input voltage in multimeter and note it down.
7). Put the clock switch in the HIGH mode and note the status of the LED’s
(i). If the I/P voltage is zero, all LED’s are off.
(ii). If the I/P voltage is 5.0 volt, all the LED’s are on.
8). Now change the I/P voltage turning the potentiometer knob and note down the O/P and note
down the O/P indicated in the form of Digital 8 bit O/Ps.

Note: For any doubts related to configuring or approaching the theoretical aspects
of experiments, please reach out to your concerned faculty members or teachers
during the lab session.

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Observation Table:

Analog input Digital output voltage

voltage H G F E D C B A
0V 0 0 0 0 0 0 0 0
0.5 V
1.0 V
1.5 V
2.0 V
2.5 V
3.0 V
3.5 V
4.0 V
4.5 V
5.0 V 1 1 1 1 1 1 1 1

Graph: Input analog voltage is plotted on the X-axis and the corresponding digital voltage is
plotted on the Y-axis.

Conclusion:

Result: Digital output signal obtained corresponding to input analog signal.

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Effective from Aug-2025 Page No.
List of taken precautions:

Questions:

1. What is an A/D converter?

2. What are the applications of an A/D converter

3. How an A/D converter converts analog signal to digital signal?

4. What is the use of multimeter?

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Effective from Aug-2025 Page No.
 Date = ……………..
Roll No.=...........................

EXPERIMENT NO. 9

Object: To study the Hall Effect and determination of hall coefficient.

Apparatus Required: Power supply (constant current source), an electromagnet and a

voltmeter having high input impedance, Gauss meter with Hall Probe, Multimeter for
measuring Hall voltage, Extrinsic semiconductor wafer – N-type Ge crystal (Thickness
- 0.5 mm ,Width - 4 mm, Length – 6 mm).

Description Of Apparatus: The apparatus consists of a constant current source and a

digital panel meter. The current flowing through the semiconductor material and the
Hall voltage generated is read on the same panel meter with the aid of a selector switch.
The measurement mode is indicated by LED indicators located by the side of digital
display. Two pairs of terminals are provided, one for supplying the current and the other
for measuring the Hall voltage. The current is measured by keeping the selector switch
in current mode and it may be varied with the help of the potentiometer located at the
side of the selector switch. The Hall voltage is measured by changing the selector switch
on to voltage mode. The semiconductor material, which is usually taken in a wafer form,
is mounted on a probe. The wafer is sometimes mounted on a phenolic strip and four
soldered contacts are made. It is usually covered by a protective layer of paint. The
whole system is further mounted in a pen-type holder for additional protection. In some
probes, the crystal is held in position by four spring type pressure contacts and it is left
without any protective paint. In either case wires are soldered to the contacts leads and
are brought out for the purpose of connecting the probe to the Hall Effect set up.

An electromagnet supplies uniform magnetic field. It consists of two coils wound on

non-magnetic formers and 3″ dia flat faced pole pieces positioned along their axes. The
coils are energized by power supply. The magnet can produce a field of about 1.15 tesla
when the pole pieces are 1 cm apart. The magnetic field can be directly read from the
panel meter located on the power supply unit. The strength of magnetic field is varied
with the help of the potentiometer provided on the front panel of the power supply.

Theory: When a magnetic field is applied perpendicular to a current carrying specimen

(metal or semiconductor), a voltage is developed in the specimen in a direction

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perpendicular to both the current and the magnetic field. This phenomenon is called
Hall Effect. The voltage so generated is called Hall voltage.

If a metal or a semiconductor carrying a current I is placed in a transverse magnetic

field B, a potential difference VH is produced in a direction normal to both the magnetic
field and current directions. This is known as Hall Effect.
Let a p-type semiconductor wafer of thickness t and area of cross-section A carrying a
current I be acted upon by a transverse magnetic field B. The magnetic field tends to
deflect charge carriers in the semiconductor wafer towards one of its faces leading to
an accumulation of charges there. This in turn produces an electric field EH in a direction
which opposes the Lorentz force due to magnetic field.

The electric field builds till it exactly compensates the effect of magnetic field. The
potential difference VH arising due to EH is given by

VH = … (1)

The ratio 1/p e is known as Hall coefficient, R H. Thus,

RH = 1/ p e … (2)
Or RH = VH t/ B I … (3)
Knowing the thickness ‘t’ of semiconductor wafer, the magnetic field B and by
measuring the Hall voltage VH produced in the wafer for a given current I, the Hall
coefficient RH can be determined with the help of eq. (3).
Knowing the Hall coefficient, the concentration of charge carriers in the semiconductor
material can be determined.

p = 1/ RH e … (4)
Knowing the conductivity σ of the semiconductor material, the mobility of charge
carrier’s μ in the material can be obtained from the following relation.

μ= σ RH … (5)

FORMULA: The sign of the majority carriers is obtained from the polarity of Hall
voltage, VH.
(i) The Hall coefficient RH is calculated from
RH = VH t/ B I
(iii) The concentration of charge carriers is obtained from
p = 1/ RH e
(ii) The mobility of the carriers is calculated from
μ = σ RH
Circuit Diagram:

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Effective from Aug-2025 Page No.
Instructuin:-

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 1. Care is taken to limit the current through the probe to a value less than that
mentioned by the manufacturer.
2. The probe is properly centered and oriented in the magnetic field such that
maximum Hall voltage is generated.
3. The potentiometer control of the electromagnet power supply is kept at its
minimum position while switching on or off the power supply.
4. The potentiometer control of the current flowing through the probe is brought
to zero position before switching off or switching on the current source.
5. Magnetic field is varied gradually in steps to avoid damage to the
electromagnet coils.

Procedure:
1) The semiconductor crystal is carefully mounted on the probe strip and electrical
contacts are provided. The assembly, known as a hall probe is available in ready-
made form. The hall probe is connected into the circuit as shown in figure.
2) The widthwise contacts of the Hall probe are connected to the voltage terminals of
the Hall Effect set up. Without connecting the current terminals, the set up is switched
on and zero adjustment is made. The unit is then switched off.
3) The lengthwise contacts of the probe are connected to the current terminals of the
set up.
4) The probe is held in position in the air gap of the electromagnet. The power supply
is switched on and the magnetic field is adjusted to a suitable value (say 3 kilogauss).
Hall Effect set up is switched on and the Hall probe is rotated in a vertical plane till
the Hall voltage generated is a maximum.
5) The current through the semiconductor is adjusted to a suitable value. The Hall
voltage and its polarity are noted down.
6) The current is varied and at different settings of current like just (0.5, 1.0, 1.5, 2.0,
… etc) or (1, 2, 3, 4, …. Etc.), the corresponding Hall voltage is noted down. The
observations are recorded in Table I.
7) The current is kept at a constant value, say 5 mA. The magnetic field is varied in
steps of 200 gauss (200, 400, 600, …..etc.) or 300 gauss (300, 600, 900, …etc.) Table
II. At each setting of the magnetic field, the corresponding Hall voltage is noted. The
observations are entered in Table - II.
8) Using the above observations, graphs are plotted. In one graph, the Hall voltage is
plotted as a function of current at a constant magnetic field. In the second, the Hall
voltage is plotted as a function of magnetic field at constant current. In both the cases
straight lines plots are obtained, as shown in Fig. 3, and Fig. 4.The slope of the
straight line is determined in each case.
9) Using the values of slopes into equation (3), the value of RH in each case is
calculated. The mean of the two values is taken as the value of RH.
10) Substituting the value of RH into equation (4), the concentration of charge
carriers is determined.
11) From the manufacture’s data, the resistivity of the semiconductor sample is noted
and using these values in equation (5), the carrier mobility is evaluated.

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Note: For any doubts related to configuring or approaching the theoretical aspects
of experiments, please reach out to your concerned faculty members or teachers
during the lab session.

Observations: Resistivity ‘ρ’ = 10 ohm-m.

Table-I
Magnetic field, B =………….k gauss = ……….. Wb/m2 (1 gauss =10-4 wb/m2)

S.No. Current I (mA) Hall voltage VH (mV) Hall coefficient

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.

Table –II
Current I = ……………mA
Magnetic field Hall voltage Hall
S.No.
k gauss Wb/m2 VH (mV) coefficient
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.

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Effective from Aug-2025 Page No.
Graphs:

Calculations:
VH PR VH PR
1. Slope = = …………….. 2. Slope = = ………….
I QR B QR

 V  t  V  t
R H1 =  Slope H  × =.........m3 /C R H2 =  Slope H 3
 × =.........m /C
 I  B  B  I
[Note: VH, I, t & B are to be taken in volts, amperes, meters and Wb/ m 2 respectively.]

R H1 +R H2
Mean RH = =.......m3 /C
2

Results:
1. The polarity of the Hall voltage is _________.Therefore the given semiconductor
is of _________ type.
2. The value of Hall coefficient is __________ m3/C.

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Conclusion:

Precautions: -

Questions:-
1. What is Hall Effect?

2. What is Hall coefficient?

3. What are Hall field and Hall Voltage?

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 4. Can Hall Effect be observed in conductors?

5. How does Hall voltage vary with temperature?

6. Can you identify whether a given sample is P-type or N-type using Hall
Effect?

7. Which shoes stronger Hall Effect, metallic conductors or semiconductors?

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Effective from Aug-2025 Page No.
 Roll No.=........................... Date = ……………..

EXPERIMENT NO. 10
Object: To study various characteristics of a Light Emitting Diode (LED)

Apparatus Required: Different coloured LED’s, Voltmeter, Ammeter, and DC regulated

power supply of 0-3V.

Theory: The light emitting diode (LED) is a solid-state source. LED’s have replaced
incandescent lamps in many applications because they have the following
advantages.
1. Low Voltage
2. Long life (more than 2 years)
3. Fast ON-OFF switching (nanoseconds)
In a forward – biased rectifier diode, free electrons and holes recombine at the junction.
When a free electron falls into a hole, it drops from a higher energy level to a lower one. As
the electron falls it radiates energy in the form of heat and light because silicon is opaque, none
of the light escapes to the environment. But in LED, semitransparent materials are used instead
of silicon.
In a forward – biased LED, heat and light are radiated when free electron and holes
recombine at the junction. By using elements like gallium, arsenic and phosphorus, a
manufacturer, yellow or infrared (invisible) light. LED that produces visible radiations are used
in instrument displays calculators, digital clocks etc. The infrared LED finds application in
burglar alarm systems and other area requiring invisible radiation.
LED’s have a typical voltage drop from 1.5V to 2.5V for currents between 10 and 50 ma.
Applying a reverse voltage greater than 3V may destroy or degrade the LED characteristics.

Circuit Diagram:

Instructions:
1. All the connections must be tight.
2. Connect the voltmeter parallel to supply and Ammeter in series with supply.
3. Least count of voltmeter = 0.05 V
4. Least count of miliammeter = 0.1 mA
5. Take reading under instrument range.

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Procedure:
1. Connect the 0-3V DC supply to input socket (red terminal to terminal & black terminal
to black terminal).
2. Connect the voltmeter and current meter to the circuit as shown in circuit diagram.
3. Switch ON the instrument using ON/OFF toggle switch provided on front panel.
4. Keep output potentiometer fully anticlockwise.
5. To connect Red, Yellow, Green LED connect socket A to B, A to C, and A to D
respectively.
6. Vary the input voltage in small steps and note down the observations.
7. Plot a graph between Voltage v/s current.

Note: For any doubts related to configuring or approaching the theoretical aspects of
experiments, please reach out to your concerned faculty members or teachers during the
lab session.

Observation Table:
LED Current
S. No. LED Voltage
Red Yellow Green
1.

2.

3.

4.

5.

6.

7.

8.

9.

10

11.

12

13

14

15

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Effective from Aug-2025 Page No.
Results:

Conclusion:

List of taken precautions:

Questions:
1. What is a LED?

2. On what factors does the colours of LED depend?

3. What is the operating voltage for LEDs?

4. Ohm’s law is not complying by LEDs. Why?

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 5. Is there any similarity between LED and a simple diode?

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Effective from Aug-2025 Page No.
 Date = ……………..
Roll No.=...........................

EXPERIMENT NO. 11(A)

Object: To construct Hartley oscillator using a transistor and determine its frequency of
oscillation and to compare it with theoretical value

Apparatus Required:
1. Transistorised power supply
2. Cathode ray oscilloscope (CRO) with calibrated time base/ frequency counter
3. connecting terminals

Formula Used:
The frequency of oscillation of the oscillator is given by
1
f  Hz (L = 149 ± 10 μH )
2 LC
where L (= L1  L2 149±10 μH) is the resultant inductance of the series combination, L1 and L2
are self-inductances of the two coils ( H ) and C is the capacitance of the condenser ( F ).

Circuit Description: The Hartley oscillator is designed for generation of sinusoidal

oscillations in the radia frequency (RF) range (20 KHz - 30 MHz). It is very popular and
commonly used in radio receivers as a local oscillator. The circuit diagram of Hartley oscillator
(parallel or shunt-fed) using BJT is shown in figure. It consists of an R-C coupled amplifier
using an n-p-n transistor in CE configuration. R1 and R2 are two resistors, which form a voltage
divider bias to the transistor. A resistor RE is connected in the circuit which stabilizes the circuit
against temperature variations. A capacitor CE connected in parallel with RE, acts as a bypass
capacitor and provides a low reactive path to the amplified ac signal. The coupling capacitor
CC blocks dc and provides an ac path from the collector to the tank circuit. The L  C feedback
network (tank circuit) consists of two inductors L1 and L2 (in series) which are placed across a
common capacitor C and the centre of the two inductors is tapped as shown in figure. The
feedback network ( L1 , L2 and C ) determines the frequency of oscillation of the oscillator.

Theory:
When the collector supply voltage Vcc is switched on, collector current starts rising and
charges the capacitor C . When this capacitor is fully charged, it discharges through coils L1
and L2 , setting up damped harmonic oscillations in the tank circuit. The oscillatory current in
the tank circuit produces an a.c. voltage across L1 which is applied to the base emitter junction
of the transistor and appears in the amplified form in the collector circuit. Feedback of energy
from output (collector emitter circuit) to input (base-emitter circuit is) accomplished through
auto transformer action. The output of the amplifier is applied across the inductor L1 , and the
voltage across L2 forms the feedback voltage. The coil L1 is inductively coupled to coil L2 ,
and the combination acts as an autotransformer. This energy supplied to the tank circuit
overcomes the losses occurring in it. Consequently, the oscillations are sustained in the circuit.
The energy supplied to the tank circuit is in phase with the generated oscillations. The
phase difference between the voltages across L1 and that across L2 is always 180° because the
centre of the two is grounded. A further phase of 180° is introduced between the input and
output voltages by the transistor itself. Thus, the total phase shift becomes 360° (or zero),

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thereby making the feedback positive or regenerative which is essential for oscillations. As a
result, continuous undamped oscillations are obtained.
Instructions:

1. Check the continuity of the connecting terminals before going to connect the circuit.
2. Identify the emitter, base and collector of the transistor properly before connecting it in
the circuit.
3. All connections should be neat and tight.
4. The horizontal length between two successive peaks should accurately be measured.

Procedure:
1. The circuit is connected as shown in figure.
2. Connect the CRO across the output terminals of the oscillator.
3. Switch on the power supply to both the oscillator and CRO.
4. Select proper values of C , L1 and L2 in the oscillator circuit and get the sine wave form
on the screen of CRO.
5. The voltage (deflection) sensitivity band switch (Y-plates) and time base band switch
(X-plates) are adjusted such that a steady and complete picture of one or two sine
waveform is obtained on the screen.

Note: For any doubts related to configuring or approaching the theoretical aspects
of experiments, please reach out to your concerned faculty members or teachers
during the lab session.

Circuit diagram:

Observations: L = 149±10 μH

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 Capacitance
(pF) Measurement of Time Period Frequency ( Hz )
Peak to
Time- Time
S. No. Peak 1
Base Period 1
f 
C (Horizontal) f 
(Sec/Div) (T  m  l ) T 2 LC
Length
( μ or m ) Sec.
(Div) ( l )
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.

Model Waveform:

Calculations:

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 1. The horizontal length ( l ) between two successive peaks is noted.
2. When this horizontal length ( l ) is multiplied with the time base ( m ) i.e. sec/div, the
time-period ( T  l  m ) is obtained.
3. The reciprocal of the time-period ( 1 ) gives the frequency ( f ).
T
4. This can be verified with the frequency calculated theoretically by using the above
formula.
5. The experiment is repeated by changing C , or L1 or L2 in C or all.
6. The readings are noted in the given table

Results: The theoretically calculated frequency =………….Hz

and the experimentally observed frequency=…………Hz

Conclusion:

List of taken precautions:

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Questions:

Q.1 What are Hartley oscillators?

Q. 2 What is the principle of Hartley oscillator?

Q.3 What is the difference between the series-fed and the shunt-fed Hartley oscillator?

Q.4 What are advantages and disadvantages of Hartley oscillator?

Q.5 What are the disadvantages of LC oscillators over RC oscillators?

Q.6 What is CRO?

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Q.7 What is the principle of CRO?

Q.8 What are the basic components of a CRO?

Q.9 What is the function of probe in CRO?

Q.10 How many types of probes are used in CRO?

Q.11 What are the functions of different probes used in CRO?

Q.12 Which device is used for the source of emission of electrons in a CRT?

Q.13 What is the function of electron gun used in CRT?

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 Roll No.=........................... Date = ……………..

EXPERIMENT NO. 11(B)

Object- To study of the wave shape and frequency produced by Colpitt’s Oscillator.

Appratus Required:
Trainer kit, Power Cord , CRO (Cathode Ray Oscilloscope).

The instrument comprises of the following built in parts:-

1. Fixed output Regulated Power Supply of 12 Volts.

2. One medium Wave Frequency Coil is mounted inside the front panel.
3. Amplifier circuit consists of Transistor (CL 100), Inductance (50 mH), Resistance &
Capacitors combination.
4. Tank circuit consists of medium wave frequency coil in parallel with capacitor.

THEORY-

Oscillator is an important device for many electronic circuit applications and its prime
function is to generate wave forms at constant amplitude and desired frequency. Basically an
oscillator is a electronic circuit which converts DC supply voltage to an output wave form of
some frequency. The oscillator circuit must also be capable of producing sustained
oscillations. The oscillators are classified into two basic categories: Sinusoidal and Non –
Sinusoidal. If the wave form generated looks like sine wave, the circuit producing all other
wave forms are called non – sinusoidal oscillators are also classified on the basis of
frequency of the generated wave form, viz. Audio frequency, radio frequency oscillators.

Each oscillator has a tank circuit. This tank circuit consists of inductance coil (L)
connected in parallel with capacitor (C). The frequency of oscillations in the circuit depends
upon the value of the coil and capacitance of capacitor. The frequency of these oscillation is
determined by the values of the C1 , C2 & L and is given by
𝟏
f = (𝑳𝟏𝑪)𝟏/𝟐
𝟐𝝅

𝒄𝟏/𝒄𝟐
C =
𝒄𝟏 𝒄𝟐

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PROCEDURE

1. Connect the CRO probes across output (X & Y Point) of the Colpitt Oscillator.
2. Swich ON the instrument as well as CRO.
3. Observe the output waveform on CRO and note down the frequency of oscillations as
well as peak to peak voltage with the help of observation table 1 & 2.
4. Formula used to circulate the frequency of oscillations.
𝟏
f = (𝑳𝟏𝑪)𝟏/𝟐 when L = 2𝝁𝑯
𝟐𝝅

/
Where C = C = 0.02 𝜇𝐹

Calculated value = 795 KHz

Note: For any doubts related to configuring or approaching the theoretical aspects
of experiments, please reach out to your concerned faculty members or teachers
during the lab session.

Circuit diagram –

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SAMPLE OBSERVATION

NOTE:- These are observation of a particular instrument & may vary slightly
from
Piece to piece.

1. Output Wave shape = Sine Wave, observed on CRO.

2. Amplitude = 4.8Vpp, observed on CRO.
3. Frequency = 793.1 KHz, observed on frequency counter.

Observation: -
1. Frequency measurement: -

S.N. No. of div in X-axis (l) Time/div (t) T=l ×t f = 1/T

1.

2.

2. Voltage measurement: -

S.N. No. of div in Y-axis (m) Voltage/div (v) Vpp= m ×v

1.

2.

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Effective from Aug-2025 Page No.
Calculation-

Conclusion:

Result- 1. Output Frequency of Colpitt Oscillator = …………………………

2. Output peak to peak voltage (Vpp) of Colpitts Oscillator =

…………………………

List of taken Precaution –

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Question:

Q.1:- How Colpit Oscillator is different from Hartley Oscillator?

Q.2:- How the condition of “Positive Feedback” is achieved in Colpitt Oscillator?

Q.3:- What is advantage of Colpitt Oscillator over Hartley Oscillator at high

frequency?

Q.4:- What is the use of Radio Frequency Choke Coil at the collector terminal of
Transistor in transistorised Colpitt Oscillator?

Q.5:- Can Op-Amp be used to fabricate Colpitt Oscillator instead of Transistor’s? If yes,
what
the advantages of OP-AMP based Circu

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 Date = ……………..
Roll No.=...........................

EXPERIMENT NO. 12

Object: To sketch the following basic op-amp circuits using ME 625 and verify them
theoretically -
a. Inverting amplifier
b. Non-inverting amplifier
c. Differential amplifier
d. Summing amplifier

Apparatus Required:
a. Power supply: variable regulated low voltage dc source
b. Patch cord
c. Multimeter

Theory:
In this laboratory experiment, you will learn several basic ways in which an op-amp can be
connected using –ve feedback to stabilize the gain and increase the frequency response. The
extremely high open-loop gain of an op-amp creates an unstable situation because a small noise
voltage on the input can be amplified to a point where the amplifier in driven out of its linear
region. Also, unwanted oscillations can occur. In addition, the open-loop gain parameter of an op-
amp can vary greatly from one device to the next. Negative feedback takes a portion of output and
applies it back out of phase with the input, creating an effective reduction in gain. This closed-loop
gain is usually much less than the open-loop gain and is independent of it.

Closed – loop voltage gain:

The closed-loop voltage gain is the voltage gain of an op-amp with external feedback. The
amplifier configuration consists of the op-amp and an external –ve feedback circuit that connects
the output to the inverting input. The closed loop voltage gain is determined by the external
component values and can be precisely controlled by them.

a. Inverting amplifier:
An op-amp connected as an inverting amplifier with a controlled amount of voltage gain is
shown in figure 1.
The input signal is applied through a series input resistor R1 to the inverting input. Also,
the output is fed back through Rf to the same input. The non-inverting input is grounded. An
expression for the output voltage of the inverting amplifier is written as

The –ve sign indicates inversion. The closed-loop gain of the inverting amplifier is, thus

The input and output impedances of an inverting amplifier are

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 Figure 1: Inverting amplifier configuration of Op-amp

Fig. 2 Circuit connections

The output impedance of both the non-inverting and inverting amplifier configurations is very low;
in fact, it is almost zero in practical cases. Because of this near zero output impedance, any load
impedance connected to the op-amp output can vary greatly and does not change the output voltage
at all.

Operational requirements
(i) Two variable DC regulated power supplies of 0-5 volts

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(ii) One fixed output regulated power supply internally connected to IC 741.
(iii) Resistances with values 10 k, 22 k, 33 k and 47 k.
(iv) Digital voltmeter
Formula to be Used
If Vin and Vout are the input and output voltages, RF and R1 are feedback and applied resistances
then output
R 
Vout  Vin  F 
 R1  (1)
Instructions:
(i) Make all the connections properly and tightly.
(ii) While varying the value of RF, necessary care should be taken.
(iii) Voltages should not exceed the suggested values.
(iv) Resistances values are to be selected as selected.
(v) Voltage ratings are to be seen carefully.

Note: For any doubts related to configuring or approaching the theoretical aspects of
experiments, please reach out to your concerned faculty members or teachers during
the lab session.

Working:
(i) Switch the instrument ON using ON/OFF key provided on the front panel. For inverting
amplifier any of the two power supplies is to be selected.
(ii) Connect the output of power supply to the input of digital voltmeter.
(iii) Adjust output of power supply to 1 volt DC using set volts knob and make the connections
as per fig. above.
(iv) Now vary the value of feedback resistance R F and note the value of Vout for different values
of R1 as per equation 1

Observation Table 1

R1 Vout
RF = 10 k RF = 22 k RF = 33 k RF = 47 k
Experimental Calculated Experimental Calculated Experimental Calculated Experimental Calculated

Calculation:

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Result:
The experimental values of output voltage (Vout) are similar to that calculated from equation 1.
Conclusion:

b. Non-inverting amplifier:
An op-amp connected in a closed-loop configuration as a non-inverting amplifier with a
controlled amount of voltage gain is shown in figure 2.

Figure 3 Non-Inverting Amplifier Circuit Configuration of Op-amp

The input signal is applied to the non-inverting (+) input. The output is applied back to the inverting
(-) input through the feedback circuit (closed loop) formed by the input resistor R1 and the feedback
resistor Rf. This creates –ve feedback as follows. Resistors R1 and Rf form a voltage-divider circuit,
which reduces VO and connects the reduced voltage Vf to the inverting input. The feedback is
expressed as-

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The difference of the input voltage, Vin and the feedback voltage, Vf is the differential input of
the op-amp. This differential voltage is amplified by the gain of the op-amp and produces an output
voltage expressed as -

Fig. 4 Circuit Connections

Operational requirements
(i) Two variable DC regulated power supplies of 0-5 volts
(ii) One fixed output regulated power supply internally connected to IC 741.
(iii) Resistances with values 10 k, 22 k, 33 k and 47 k.
(iv) Digital voltmeter

Formula Used:
If Vin and Vout are the input and output voltages, RF and R1 are feedback and applied resistances
then the output in this configuration -
 R 
Vout  Vin 1 F 
 R1  (2)

Working:
(i) Switch the instrument ON using ON/OFF key provided on the front panel. For non-inverting
amplifier any of the two power supplies is to be selected.

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(ii) Connect the output of power supply to the input of digital voltmeter.
(iii) Adjust output of power supply to 1 volt DC using set volts knob and make the connections
as per fig. above.
(iv) Now vary the value of feedback resistance R F and note the value of Vout for different values
of R1 as per equation 2.

Observation Table 2
R1 Vout
RF = 10 k RF = 22 k RF = 33 k RF = 47 k
Experimental Calculated Experimental Calculated Experimental Calculated Experimental Calculated

Calculation:

Conclusion:

Result:
The experimental values of output voltage (Vout) are similar to that calculated from equation 2.

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 c. Differential amplifier:
Operational requirements
(i) Two variable DC regulated power supplies of 0-5 volts
(ii) One fixed output regulated power supply internally connected to IC 741.
(iii) Resistances with values 10 k, 22 k, 33 k and 47 k.
(iv) Digital voltmeter

Theory
If Vin and Vout are the input and output voltages, RF and R1 are feedback and applied resistances
then the output in this configuration -

 R   RF 
V out  V IN non  inverting   1  F   V IN inverting   
 R2   R1  (4)
Note: For any doubts related to configuring or approaching the theoretical aspects of
experiments, please reach out to your concerned faculty members or teachers during
the lab session.

Figure 5 Differential amplifier Circuit Configuration of Op-amp

Working:
(i) Switch the instrument ON using ON/OFF key provided on the front panel. For summing
amplifier both power supplies are to be selected.
(ii) Connect the output of power supply to the input of digital voltmeter.
(iii) Adjust output of both power supplies to 1 volt DC using set volts knob and make the
connections as per fig. 8 above.
(iv) Now vary the value of two input voltages and compare the theoretical value with practical
value as per equation 4.

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 Figure 6 Differential amplifier Circuit Connections of Op-amp

Observation Table 4
Vout
VIN1 VIN2
Experimental Calculated
1V 1V
2V 2V
3V 3V
4V 4V

d. Summing amplifier:
The summing amplifier is an application of the inverting op-amp configuration. The summing
amplifier has two or more inputs, and its output is proportional to the algebraic sum of its input
voltages. Figure 5 shows a two-input inverting summing amplifier.

Case-1: If all the three resistors are equal (R1=R2=Rf=R) then

The above equation shows that the output voltage has the same magnitude as the sum of two input
voltages but with a –ve sign indicating inversion.
Case-2: When Rf is larger than the input resistors, the amplifier has a gain of (-Rf/ R) where R is
the value of each equal value input resistor (R1=R2=R). The general expression for the output is

The above equation shows that the output voltage has the same magnitude as the sum of all the
input voltages multiplied by a constant determined by the ratio (-Rf/ R).

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Case-3: By setting the ration (Rf/R) equal to the reciprocal of the number of inputs (n), i. e.,
(Rf/R=1/n), a summing amplifier can be made to produce the mathematical average of the input
voltages.
Case-4: A different weight can be assigned to each input of a summing amplifier by simply
adjusting the values of the input resistors. In this case, the output voltage can be expressed as

The weight of a particular input is set by the ratio of Rf to Rx for the input (Rx= R1, R2…)

Operational requirements
(i) Two variable DC regulated power supplies of 0-5 volts
(ii) One fixed output regulated power supply internally connected to IC 741.
(iii) Resistances with values 10 k, 22 k, 33 k and 47 k.
(iv) Digital voltmeter

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Theory
If Vin and Vout are the input and output voltages, RF and R1 are feedback and applied resistances
then the output in this configuration -
Vout  VIN1  VIN 2 
(3)

Figure 7 Summing amplifier Circuit diagram of Op-amp

Figure 8 Summing amplifier Circuit Configuration of Op-amp

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Working:
(i) Switch the instrument ON using ON/OFF key provided on the front panel. For summing
amplifier both power supplies are to be selected.
(ii) Connect the output of power supply to the input of digital voltmeter.
(iii) Adjust output of both power supplies to 1 volt DC using set volts knob and make the
connections as per fig. above.
(iv) Now vary the value of two input voltages and compare the theoretical value with practical
value as per equation 3.

Observation Table 3
Vout
VIN1 VIN2
Experimental Calculated
1V 1V
2V 2V
3V 3V
4V 4V
Calculation:

Result: The experimental values of output voltage (Vout) are similar to that calculated from
equation 4.

Conclusion:

List of taken precautions:

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Questions:
(i) What is an operational amplifier?

(ii) What is integrated circuit?

(iii) What are inverting and non-inverting conditions of an operational amplifier?

(iv) What is a feedback amplifier?

(v) What is Bar-Hausen criterion for self maintained oscillations?

(vi) What is an oscillator?

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(vii) What are the basic components of an operational amplifier?

(viii) What are positive and negative feedback amplifiers?

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Effective from Aug. 2025 Page No:
 Roll No.=........................... Date = ……………..

EXPERIMENT NO. 13
Object: To determine the width of the forbidden energy-gap in a semiconductor material
taken in the form of a p-n junction diode.

Apparatus Required: (i) Energy band-gap trainer kit (ii) thermometer (0oC to 100oC) (iii)
connecting wires

Formula: The width of the forbidden energy gap is given by the negative slope of the graph plotted
between log10 Irs and (103/T)

Slope of the graph

Eg = eV
5.036

Circuit Diagram:

Figure: Circuit for determination of band gap

Theory: We know in the case of insulators, the region between highest level of completely filled
band (called valence band) and the lowest level of allowed empty band (called conduction band)
is very wide. This is called energy-gap denoted by E g and is about 3 to 7 eV in case of insulators.
In case of semiconductors, this energy gap is quite small. For example, in case of germanium, E g
=0.7 eV and for silicon E g = 1.1 eV.

In semi conductors at low temperatures, there are few charges to move, so conductivity is quite
low. At higher temperatures, the donor or acceptor levels come in to action and provide carriers
and hence the conduction rises. In addition to the dependence of the electrical conductivity on the
number of free charges, it also depends on their mobility. However, mobility of the charge carriers
somewhat decreases with increasing temperature but on the average the conductivity of the
semiconductors rises with increasing temperature.

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To determine the energy gap of a semi-conducting material, we study the variation of its
conductance with temperature. In reverse bias, the currents flowing through the junction are quite
small and the internal heating of the junction does not take place.

Instructions:
1. All connections are made carefully.
2. The maximum temperature of the diode is not allowed to go beyond 75 oC.
3. Room temperature to taken as approximate ~ 27C.
4. Take reading under instrument range.

Procedure:
(1) Connect anode terminal to anode terminal on oven.
(2) Connect cathode terminal to cathode terminal on oven.
(3) Connect on supply terminal to supply socket on oven.
(4) Put the thermometer in the oven.
(5) Keep temperature control towards minimum. Put the on/off switch to on position. Adjust
voltage to 5V. Wait for a minute or two and note the reverse current in the meter. Now
switch the oven on. Put oven switch to low or higher as required.
(6) Temperature starts increasing and the reading of the microammeter starts increasing.
(7) When temperature reaches to 800C or 1000C, switch off the oven by rotating the pot
anticlockwise down to minimum side. Note down the maximum reading shown by micro
ammeter.
(8) Note the current reading, thermometer reading accordingly and draw the graph.
(9) A graph is plotted taking 1000/T on X-axis and log10Irs on Y-axis. A straight line is
obtained.
(10) The slope of the straight line is determined and using earlier equation, the band gap E g is
calculated.

Note: For any doubts related to configuring or approaching the theoretical

aspects of experiments, please reach out to your concerned faculty members or
teachers during the lab session.

Graph:

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Observations: Temperature decreasing

Sr. Current Temperature Temperature 1000/T

No. Irs T T=t+273 (K-1) Log10 Irs
(A) (oC) (K)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17.
18.
19.

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Calculations: Calculate different values of Eg by formula

Slope of the graph

Eg = eV
5.036

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Effective from Aug. 2025 Page No:
Results: The width of the forbidden gap in Germanium semiconductor is found to
be…………..eV.
Standard value of Eg = 0.72eV (For Ge)
Conclusion:

List of taken precautions:

Questions:

1) What is the principle of your experiment?

2) What are semiconductors?

3) What do you mean by the band-gap energy?

4) What is the order of magnitude of this energy gap for semiconductor (Si and Ge) and
metals?

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 5) What is the behaviour of a semiconductor at absolute zero?

6) What is meant by P- and N- type semiconductors?

7) How do you differentiate among conductor, insulator and semiconductor on the basis of
energy band gap?

8) What is biasing of diode?

9) What is reverse saturation current in reverse biased diode?

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Effective from Aug. 2025 Page No:
 Roll No............................ Date ……………..

EXPERIMENT NO. 14
Object: To study the different operations performed by an Arithmetic Logic Unit (IC
74181)

Apparatus Requirement: ALU(IC74181), Connecting wire.

Theory: An arithmetic logic unit (ALU) is a digital circuit used to perform arithmetic and
logic operations. It represents the fundamental building block of the central processing unit
(CPU) of a computer. Most of the operations of a CPU are performed by one or more
ALUs, which load data from input registers. The 74181 is an IC capable of performing
arithmetic as well as logical operations. The IC 74181circuit can be used for both positive
and negative logic. The function of various input, output and control lines given below:-

Inputs
A and B: 4-Bit binary data-input.
Cn : Carry-input. This is active-low, i.e, if the carry-input is to be given, it should
be at logic “0”
Outputs:
F : 4-Bit binary data-output
Cn+4 : Carry-output. For the addition-operation, a logic ‘0’ on this line indicates a
carry-output. For the subtraction-operation, it indicates the sign of the output.
Logic ‘0’ on this line indicates a positive result, and logic ‘1’ indicates a
negative result expressed in the 2’s complement form.
A=B : Equality-output. Logic ‘1’ on this line indicates A=B.
G : Carry-generate-output.
P : Carry-propagate-output.

NOTE: Observe the output on F0,F1,F2,F3 output and ignore other glowing LED’s.

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Diagram: Block Diagram of the ALU

Procedure

1. Connect logic inputs to A0, A1, A2, A3, B0, B1, B2, B3, B0, S0, S1, S2, & S3
through patch cords.
2. Connect logic output F0, F1, F2, F3 , P,G, A=B, Cn +4 to logic output
indicators through patch cords.
3. To perform the logic functions apply logic ‘1’ on mode control (M) pin
through patch card whereas applies logic ‘1’ or ‘0’ on Cn.
4. To perform the arithmetic operations apply logic ‘0’ on mode control (M)
pin through patch cord. Apply logic ‘1’ on pin Cn for no carry and apply
logic ‘0’ on pin Cn with carry as shown in observation table.
5. Switch on the instrument using ON/OFF toggle switch provided on the front
panel and verify the observation Table no.(1).

Note: For any doubts related to configuring or approaching the theoretical aspects
of experiments, please reach out to your concerned faculty members or teachers
during the lab session.

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 Observation Table No. 1

Standard Accessories

1. Twenty two single point patch cords for interconnections.

2. Instruction manual (DOC 738)Rev.01

Sample calculation
For example, we take two Data’s

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To verify this truth Table No.1

Let for
M=1 and Cn =0 or 1 then, the ALU is working for logical operations.

Let’s Input Data

A3 A2 A1 A0 B3 B2 B1 B0
0 1 1 0 0 1 0 1

S. Selection Lines Logic Theoretical Output Data Observed Output Data

No S3 S2 S1 S0 Function Cn+4 F3 F2 F1 F0 Cn+4 F3 F2 F1 F0
1 0 0 0 0 F = 𝐴̅ 1 1 0 0 1
2 0 0 0 1 F= 𝐴+𝐵 1 1 0 0 0
3 0 0 1 0 F = 𝐴̅. 𝐵 1 0 0 0 1
4 0 0 1 1 F= 0 1 0 0 0 0
5 0 1 0 0 F = 𝐴. 𝐵 1 1 0 1 1
6 0 1 0 1 F= 𝐵 1 1 0 1 0
7 0 1 1 0 F= A⊕B 0 0 0 1 1
8 0 1 1 1 F = 𝐵. 𝐴̅ 0 0 0 1 0
9 1 0 0 0 F = 𝐴̅ + 𝐵 1 1 1 0 1
10 1 0 0 1 F= 𝐴⊕𝐵 1 1 1 0 0
11 1 0 1 0 F= B 0 0 1 0 1
12 1 0 1 1 F = AB 0 0 1 0 0
13 1 1 0 0 F= 1 1 1 1 1 1
14 1 1 0 1 F= 𝐴+𝐵 1 1 1 1 0
15 1 1 1 0 F= 𝐴+𝐵 0 0 1 1 1
16 1 1 1 1 F= A 0 0 1 1 0

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To verify this truth Table No.2
Now for the value of M=0, and Cn=1. We can do the arithmetic operation without any input
carry

S. Selection Lines Theoretical Output Data Observed Output Data

Logic Function
No S3 S2 S1 S0 Cn+4 F3 F2 F1 F0 Cn+4 F3 F2 F1 F0
1 0 0 0 0 F= A 1 0 1 1 0
2 0 0 0 1 F= 𝐴+𝐵 1 0 1 1 1
3 0 0 1 0 F= 𝐴+𝐵 1 1 1 1 0
4 0 0 1 1 F = minus 1 1 1 1 1 1
5 0 1 0 0 F = A plus 𝐴. 𝐵 1 1 0 0 0

6 0 1 0 1 F =(A+B) plus 1 1 0 0 1
𝐴. 𝐵
7 0 1 1 0 F = A minus B 0 0 0 0 0
minus 1
8 0 1 1 1 F = 𝐴. 𝐵 minus 0 0 0 0 1
1
9 1 0 0 0 F = A plus 𝐴. 𝐵 1 1 0 1 0

10 1 0 0 1 F = A plus B 1 1 0 1 1

11 1 0 1 0 F = (𝐴 + 𝐵) 0 0 0 1 0
plus A.B
12 1 0 1 1 F = A.B minus 1 0 0 0 1 1
13 1 1 0 0 F = A plus A 1 1 1 0 0

14 1 1 0 1 F = (𝐴 + 𝐵) 1 1 1 0 1
plus A
15 1 1 1 0 F = (𝐴 + 𝐵) 0 0 1 0 0
plus A.
16 1 1 1 1 F = A minus 1 0 0 1 0 1

Result:-…………………………………………………………….

Conclusion:

Precautions: -

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Questions:

1. Define arithmetic logic unit (ALU) ?

2. What is the function of ALU?

3. What are the components of CPU? What is its role? What is the function of control unit
of CPU?

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 Roll No............................ Date ……………..

EXPERIMENT NO. 15

OBJECT: To study the V-I Characteristics of a solar cell.

(i)To observe the relationship of current, voltage and power in a solar cell.
(ii) To plot the I-V curve of a solar cell, and to identify the maximum power point,
the short circuit current, and the open circuit voltage
APPARATUS REQUIRED: One solar module, one ammeter, One voltmeter, Variable.
Resistor, Artificial Light Source, Alligator clips and wire
DIAGRAM: Below figure represents solar panel and schematic setup for measuring the
IV curve for a solar cell.

Fig. 1

THEORY: Solar energy can be part of a mixture of renewable energy sources used to meet
the need for electricity. Using photovoltaic cells (also called solar cells), solar energy can
be converted into electricity. Solar cells produce direct current (DC) electricity, and an
inverter can be used to change this to alternating current (AC) electricity.
Photo Voltaic are made from silicon and other semiconductor materials. Silicon
crystals have all four valence electrons bound with other silicon valence electrons.
When silicon is “doped” with atoms of with fewer valence electrons is brought in
contact with silicon doped with atoms with extra valence electrons, an electric field is
created the electrons from atoms with extra valence electrons fill “holes” created by
atoms with fewer electron. When sunlight enters a PV cell, the light can separate an
electron from an atom and the electric field helps move the electrons to charge
collecting areas. The electrons are then gathered on the surface of the solar cell by a
grid of metal connected to a circuit.
The circuit allows the electrons to flow to the electron-poor back of the cell
from the electron-rich front of the cell. Photovoltaic panels are oriented to maximize
the use of the sun’s light, and the system angles can be changed for winter and
summer. When a panel is perpendicular to the sunlight, it intercepts the most energy.
Generation of photocurrent in Solar Cell:

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 With semiconductors, it is possible to convert the energy of the solar radiation into
electric energy. Theoretically, each absorbed light quantum (photon) could generate an
electron-hole pair. If the energy of the photon surpasses the band gap, then such a
generation takes place. The surplus energy is converted into heat. In order to generate more
than one electron-hole pair (EHP), the photon must provide a multiple of the energy of the
band gap.

Figure2: Generation of electron-hole pairs

Figure3: Generation of photocurrent in a diode

Fig. 4 V-I characteristics of Solar Cell

If the minority carrier created from the EHP diffuses toward the junction, it will
be swept to the opposite side by the internal field. Due to the larger number of charges

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crossing the junction, the drift current increases. The charges then begin to build up on
the other side, holes on the p side and electrons on the n-side, making the p-side positive
and the n-side negative. The excess majority charge carriers begin diffusing away from
the junction. This creates diffusion current, called the photo generation current (I PH) that
opposes the diode current.

Instructions:
1. All connections should be made properly.
2. The light source must be intense enough to impart sufficient intensity of light.
3. The light must fall on entire surface of cell.
4. The current and voltage measuring device must be sensitive enough.

PROCEDURE:
1. Set up the circuit from figure 1.
2. Now set the value of load resistance at zeroohm and record the value of voltage
in the voltmeter and current in milliameter.
3. Begin with short-circuit: Short the output terminals of the PV panel with a wire.
Measure the short circuit current and panel output voltage. The panel voltage will be
small for this case. Record both the voltage and current in a table.
4. Now increase the value of load resistance in steps for the same intensity of the
lamp. Again record the corresponding value of voltage and current.
5. Measure the voltage and current when the panel is open-circuit. Record the panel
voltage and current in the table.
6. Repeat above procedure for another position of cell.
7. Now plot a graph for current ‘I’ vs Voltage ‘V’ for both the positions of solar
cell.

Note: For any doubts related to configuring or approaching the theoretical

aspects of experiments, please reach out to your concerned faculty members or
teachers during the lab session.

OBSERVATIONS: -
Least count of scale on bench = ……………cm
Position of bulb = …………….cm
a) Position I
Position of cell = …………….cm
Open circuit voltage =………………
Short circuit current =………………

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 Voltage V Current I Load Resistance RL Power
S. No.
( ) ( ) ( ) ( )
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.

b) Position-II
Position of cell = …………….cm
Open circuit voltage =………………
Short circuit current =………………

Voltage V Current I Load Resistance RL Power

S. No.
( ) ( ) ( ) ( )
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.

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RESULTS:

Maximum Power = …………

Voltage at maximum power point = ……….

Current at maximum power point =

CONCLUSION:

PRECAUTIONS:

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QUESTIONS:

1. What do you mean by photovoltaic cell?

2. Why it is called solar cell?

3. Explain working of solar cell?

4. What is the use of solar cell?

5. How is internal electric field generated?

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 6. Draw the symbol of Solar Cell

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