0% found this document useful (0 votes)
55 views5 pages

Hardware Modeling Using Verilog - Unit 8 - Week 5

The document outlines Week 5 of the NPTEL course 'Hardware Modeling using Verilog', which includes lectures on Verilog test benches and modeling finite state machines. It provides details on assignment submissions, including due dates and feedback forms. Students can submit their assignments multiple times before the deadline for grading.

Uploaded by

abhinendra
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
55 views5 pages

Hardware Modeling Using Verilog - Unit 8 - Week 5

The document outlines Week 5 of the NPTEL course 'Hardware Modeling using Verilog', which includes lectures on Verilog test benches and modeling finite state machines. It provides details on assignment submissions, including due dates and feedback forms. Students can submit their assignments multiple times before the deadline for grading.

Uploaded by

abhinendra
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

8/27/25, 8:02 AM Hardware Modeling using Verilog - - Unit 8 - Week 5

([Link] ([Link]

abhinendra7singh@[Link] 

NPTEL ([Link] » Hardware Modeling using Verilog (course)


Click to register
for Certification
exam
Week 5 : Assignment 5
([Link]
Your last recorded submission was on 2025-08-24, 16:26 Due date: 2025-08-27, 23:59 IST.
IST
If already
registered, click 1) 1 point
to check your
payment status

Course
outline

About a.
NPTEL () b.
c.
How does an
d.
NPTEL
online
course 2)
work? ()

Week 0 ()

Week 1 ()

Week 2 ()

Week 3 ()

Week 4 ()

Week 5 ()

[Link] 1/5
8/27/25, 8:02 AM Hardware Modeling using Verilog - - Unit 8 - Week 5

Lecture 21 :
VERILOG
TEST BENCH
(unit?
unit=51&lesso
n=52)

Lecture 22 :
WRITING
VERILOG
TEST
BENCHES
(unit?
unit=51&lesso
n=53)

Lecture 23 :
MODELING
FINITE STATE
MACHINES
(unit? 3
unit=51&lesso 1 point
n=54)
3) 1 point
Lecture 24 :
MODELING
FINITE STATE
MACHINES
(Contd.) (unit?
unit=51&lesso
n=55)

Week 5
Lecture
Material (unit?
unit=51&lesso
n=56)

Feedback
Form of Week
5 (unit? a.
unit=51&lesso
b.
n=57)
c.
Quiz: Week 5
d.
: Assignment
5
(assessment? 4) 1 point
name=151)

Week 6 ()

Text
Transcripts
()

a.
Books ()
b.

[Link] 2/5
8/27/25, 8:02 AM Hardware Modeling using Verilog - - Unit 8 - Week 5

c.
d.

5)

23

Hint

1 point

6) 1 point

a.
b.
c.
d.

7) 1 point

a.
b.
c.
d.

8) 1 point

[Link] 3/5
8/27/25, 8:02 AM Hardware Modeling using Verilog - - Unit 8 - Week 5

a.
b.
c.
d.

9) 1 point

a.
b.
c.
d.

10) 1 point

a.
b.
c.
d.

You may submit any number of times before the due date. The final submission will be
considered for grading.
Submit Answers

[Link] 4/5
8/27/25, 8:02 AM Hardware Modeling using Verilog - - Unit 8 - Week 5

[Link] 5/5

You might also like