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555 Timer Basics

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0% found this document useful (0 votes)
33 views11 pages

555 Timer Basics

Uploaded by

Ronnie Solomon
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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555 Timer basics

By reading the article below we hope that you will become familiar with the basics of the amazing 555
timer. After being familiar with the basics, you may refer to the 555 circuits section of our website to
explore many more.
Indroduction
Block Diagram
Pinout
Operating modes
Astable
Monostable
Bistable

Indroduction
The “555 Timer” is an integrated circuit (IC) that has been around since the early days of IC’s and has
itself become something of an industry “standard”. The 555 timer is very popular due to its low price,
ease of use, and stability.
Basically, the 555 timer is capable of functioning as an accurate time-delay generator and as a free
running multivibrator (relaxation oscillator). When used as an oscillator the frequency and duty cycle
are accurately controlled by only two external resistors and a capacitor. Some basic applications of the
555 are delay timers, pulse generation, saw-tooth generators, flashers, tone generation, alarms,
clocks, frequency division, power converters etc, in fact any circuit that requires some form of time
control as the list is endless.
The 555 timer chip in its basic form is available in an 8-pin Dual-in-line package (DIP). There are two
basic versions of the 555. Those are the SE and the NE versions. The two versions are similar except for
maximum temperature ratings. The precision type SE maintains its essential characteristics over a
temperature range of -55o C to +125o C while the general purpose type NE operates reliably only over a
range of 0 to 70o C. Both types have a maximum rating of 15 volts and can handle power dissipation of
up to 600 mW.
The basic 555 device consists of some 25 transistors, 2 diodes and about 16 resistors arranged to form
two comparators, an RS flip-flop and a high current output stage as shown in figure 1. There are also
low power CMOS versions of the 555 timer such us the 7555 and the LMC555 which use MOSFET
transistors instead. There is also available the NE556 Timer which combines two individual 555’s within
a single 14-pin DIP package.
Figure 1. 555 Timer Block Diagram

The two comparators inside the 555 use reference voltages which are developed across an internal
voltage divider consisting of three equal resistors R of 5K ohms each. The first comparator is the
threshold comparator and is referenced at 2/3 of Vcc and the second comparator is the trigger
comparator and is referenced at 1/3 Vcc (Vcc is the power supply voltage). The two comparators control
the flip-flop, which, in turn controls the state of the output.
The 5-5-5K resistive network consists of three equal resistors and acts as a voltage divider.
The threshold comparator compares the threshold voltage with a reference voltage of +2/3 VCC
volts.
The trigger comparator compares the trigger voltage with a reference voltage of +1/3 VCC volts.
The internal transistor T1 saturates or cuts-off according to the output state of the flip-flop. The
saturated transistor acts as a switch which can be used to provide a discharge path to a capacitor
connected externally.

The typical pinout of the 555 is as follows:

Pin 1. – Ground, The ground pin connects the 555 timer to the ground reference voltage (0 volts).
Pin 2. – Trigger, The inverting input of the trigger comparator. A negative pulse on this pin “sets”
the internal Flip-flop when the voltage drops below 1/3Vcc causing the output to switch from a
“LOW” to a “HIGH” state.
Pin 3. – Output, The output pin can drive any TTL circuit and is capable of sourcing or sinking up to
200mA. The output uses a push-pull architecture and can drive from 0V to approximately Vcc –
1.7V. (Note: CMOS timer parts can drive output up to VCC rail.)
Pin 4. – Reset, This pin is used to “reset” the internal Flip-flop controlling the state of the output,
pin 3. This is an active-low input and is generally connected to a logic “1” level when not used to
prevent any unwanted resetting of the output.
Pin 5. Control Voltage. This pin controls the timing of the 555 by overriding the 2/3Vcc level of
the voltage divider network. By applying a voltage to this pin the width of the output signal can be
varied independently of the RC timing network. In most applications, this pin is not used, thus it is
recommended to connect a low-noise 10 nF decoupling capacitor (film or ceramic) between Control
pin and Ground pin to filter noise. The control pin input can be used to build an astable multivibrator
with a frequency-modulated output.
Pin 6. Threshold. The non inverting input (positive input) of the threshold comparator. This pin is
used to reset the Flip-flop when the voltage applied to it exceeds 2/3Vcc causing the output to
switch from “High” to “Low”.
Pin 7. Discharge. The discharge pin is connected directly to the Collector of an internal NPN
transistor which may be used to “discharge” a capacitor between intervals. The transistor acts as a
switch which is in phase with output.
Pin 8. Positive supply (+Vcc). The guaranteed voltage range of bipolar parts are typically 4.5 volt
to 15 volts (some parts rated up to 16 volts or 18 volts), though most bipolar parts will operate at
voltages as low as 3 volts. (Note: CMOS timer parts have a lower minimum voltage rating.) It is
recommended that a 100 nF decoupling capacitor be connected as close as possible to this pin, and
optionally a 10 to 100uF reservoir capacitor depending on the size of the load on the output pin.

Operating Modes
The IC 555 has three operating modes:

1. Astable (free-running) mode. In this mode the 555 can operate as an electronic oscillator by
triggering itself and free-running as a multivibrator.
2. Monostable mode. In this mode of operation, the 555 acts as a "one-shot" pulse generator.
3. Bistable (schmitt trigger) mode. In this mode the 555 can operate as a flip-flop.
In the astable mode, the 555 may be used for pulse generation, tone generation, clocks, flashers and
may be also used as a sensor (e.g., selecting a thermistor or a photo-resistor as a timing resistor allows
the use of the 555 in a temperature or in a light sensor and the period of the output pulse is determined
by the temperature or by the light intensity). Possibly applications in the monostable mode include
timers, frequency dividers, missing pulse detection, bounce-free switches, capacitance measurement,
pulse width modulation (PWM) etc. In the bistable mode, the 555 can operate as a flip-flop and may be
used for bounce-free latched switches.

Astable operation

An astable timer operation is achieved by configuring as shown on Figure 2. In the astable operation,
the trigger terminal and the threshold terminal are connected so that a self-trigger is formed, operating
as a multivibrator. When the timer output is high, its internal discharging Transistor (T1) turns off and
the C1 is charged from Vcc.

Figure 2. The 555 timer in astable mode


During charging, the voltage across the external capacitor C1, VC1, increases exponentially with the
time constant (RA+RB)×C1. That is because C1 is charged from the current flowing through RA and RB.
When the VC1, or the threshold voltage, reaches 2Vcc/3, the threshold comparator’s output becomes
high, resetting the F/F and causing the timer output to become low. This in turn turns on the
discharging Transistor and the C1 discharges through the discharging channel formed by RB and the
discharging Transistor.

Figure 3. Waveforms of Astable Operation

When the VC1 falls below Vcc/3, the trigger comparator’s output becomes high and the timer output
becomes high again. The discharging Transistor turns off and the VC1 rises again.
In the above process, the section where the timer output is high is the time it takes for the VC1 to rise
from Vcc/3 to 2Vcc/3, and the section where the timer output is low is the time it takes for the VC1 to
drop from 2Vcc/3 to Vcc/3.

When timer output is high, the equivalent circuit for charging capacitor C1 is as follows:

Figure 4. Equivalent circuit for charging


capacitor C1

We know that the current IC, which flows through a capacitor C is given by IC=C×dVc/dt.
For the circuit of figure 4:
IC1=C1×dVC1/dt=(Vcc-VC1)/(RA+RB)
(1)
We also know that at t=0

VC1(t=0)=Vcc/3
(2)
This is due to the fact that VC1 rises from Vcc/3 to 2Vcc/3.
Equation (1) is a linear differential equation. By taking into consideration the initial condition which is
described by equation (2), we are able to find the solution of (1), which is:
VC1(t)=Vcc – (2Vcc/3)×exp[-t/(RA+RB)×C1]
(3)
Since the duration of the timer output high state (tH) is the amount of time it takes for the VC1(t) to
reach 2Vcc/3,

2Vcc/3 = Vcc – (2Vcc/3)×exp[-tH/(RA+RB)×C1]


(4)
which is equivalent to

tH = C1×(RA + RB)×In2 = 0.693×(RA + RB)×C1


(5)
The equivalent circuit for discharging capacitor C1, when timer output is low is, as follows:

Figure 5. Equivalent circuit for


discharging capacitor C1

For the circuit of figure 5:

C1×dVC1/dt+VC1/(RB+RE)=0
(6)
and
VC1(t=0)=2Vcc/3
(7)
By taking into consideration the initial condition which is described by equation (7), we are able to find
the solution of (6), which is:
VC1(t)=(2Vcc/3)×exp[-t/(RB+RE)×C1]
(8)
Since the duration of the timer output low state(tL) is the amount of time it takes for the VC1(t) to
reach Vcc/3,

Vcc/3=(2Vcc/3)×exp[-tL/(RB+RE)×C1]
(9)
which is equivalent to

tL = C1×(RB + RE)×In2 = 0.693×(RB + RE)×C1


(10)
Since RE is normally very small compared to RB (RB>>RE), equation (10) can be furthermore simplified
and become:

tL=0.693×RB×C1
(11)
Consequently, the period T, is the same with

T=tH+tL=0.693×(RA+RB)×C1+0.693×RB×C1=0.693×(RA+2RB)×C1
(12)
because the period is the sum of the charge time and discharge time. And since frequency f, is the
reciprocal of the period, the following applies.

f=1/T=1.44/[(RA+2RB)×C1]
(13)
By altering the time constant of just one of the RC combinations, the Duty Cycle better known as the
“Mark-to-Space” ratio of the output waveform can be accurately set. The Duty Cycle, DT, for the 555
Oscillator, which is the ratio of the “ON” time divided by the period T, is given by:

DT=tH/T=tH/(tH+tL)=(RA+RB)/(RA+2RB) %
(14)
The duty cycle has no units as it is a ratio but can be expressed as a percentage ( % ).

As the timing capacitor, C1, charges through resistors RA and RB but only discharges through resistor
RB the output duty cycle can be varied between 50 and 100% by changing the value of resistor RB. By
decreasing the value of RB the duty cycle increases towards 100% and by increasing RB the duty cycle
reduces towards 50%.
In the basic astable circuit the duty cycle will never go below 50% as the presence of resistor RB
prevents this. In other words we cannot make the outputs “ON” time shorter than the “OFF” time, as
(RA + RB)×C1 will always be greater than the value of RB×C1. However, there are some circuit
arrangements which overcome this problem by using additional components (usually, some bypass
diodes).
Monostable operation

In this mode of operation the timer acts as a one shot. Details of the external connections and the
wave-forms are shown in figures 6-1 and 6-2, respectively.

Figure 6-1. The 555 timer in monostable mode

The external timing capacitor C1 is held initially discharged by the transistor T1 inside the timer. Upon
application of a negative pulse to pin 2, the flip-flop is set which releases the short circuit across the
external capacitor and drives the output high. The voltage across the capacitor, now, rises exponentially
with the time constant RT×C1. When the voltage across the capacitor equals 2Vcc/3, the threshold
comparator resets the flip-flop which, in turn, discharges the capacitor rapidly and drives the output to
its low state. The circuit rests in this state till the arrival of next pulse.
The larger the time constant RT×C1, the longer it takes for the capacitor voltage to reach 2Vcc/3. In
other words, the RC time constant controls the width of the output pulse.
Figure 6-2. Waveforms of Monostable Operation

The circuit triggers on a negative going input signal when the level reaches Vcc/3. Once triggered the
circuit will remain in this state until the set time is elapsed, even if it is triggered again during this
interval.
When timer output is high, the equivalent circuit for charging capacitor C1 is as follows:

Figure 7. Equivalent circuit for


charging capacitor C1 on
Monostable mode

We know that the current IC, which flows through a capacitor C is given by IC=C×dVc/dt.
For the circuit of figure 7:
IC1=C1×dVC1/dt=(Vcc-VC1)/RT
(15)
We also know that at t=0
VC1(t=0)=0
(16)
Equation (15) is a linear differential equation. By taking into consideration the initial condition which is
described by equation (16), we are able to find the solution of (15), which is:
VC1(t)=Vcc – Vcc×exp[-t/(RT)×C1]
(17)
Substituting VC1 = 2Vcc/3 in the above equation we get the time tH, taken by the capacitor to charge
from 0 to 2Vcc/3:

2Vcc/3 = Vcc – Vcc×exp[-tH/(RT)×C1] or tH = RT×C1×ln 3 = 1.0986 RΤ×C1


(18)
Thus, the pulse width is:
tH≈ 1.1× RT×C1
(19)

Bistable operation

The 555 timer can also function as a bistable flip-flop. This flip-flop offers the advantage that it operates
from many different supply voltages, uses low power and requires no external components other than
bypass capacitors in noisy environments. It also provides a high current output which can sink or source
as much as 200mA.
A basic bitable circuit which uses the 555 is shown in figure 8:

Figure 8. 555 timer in bistable mode

As shown in figure 8, a negative pulse applied to the trigger input terminal (pin 2) sets the flip-flop and
the output goes high. A positive going pulse to the threshold terminal (pin 6) will reset the flip-flop and
will drive the output low.
Besides the basic bistable circuit of figure 8, there is also another configuration where the two
comparator inputs (pin 2 and pin 6) are tied together and biased at VE through a voltage divider R1 and
R2. This arrangement is shown in figure 9. It is also a bistable circuit but it moreover, it is a Schmitt
trigger.

Figure 9. 555 timer as Schmitt trigger

Since the threshold comparator will trip at 2Vcc/3 and the trigger comparator will trip at Vcc/3, the bias
provided by the resistors R1 and R2 should be within the comparator’s trip limits. For instance, we may
use identical R1 and R2 to make VE equal to Vcc/2. Any signal of sufficient amplitude to exceed the
reference levels is applied on the input of the Schmitt trigger, will cause the internal flip-flop to be set or
reset. In this way, any input signal will create a square wave at the output and the circuit can be used
as a signal shaper/buffer with the advantage of the availability of a high output current.

Conclusion

Now that you have studied the basics about the 555, we hope that you became more familiar with this
amazing timer. If you want to study more or to explore many more features and circuits based on the
555 timer, please refer to the 555 circuits section of our website.

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