DIGITAL ELECTRONICS
Questions Based on Logic Gate
Questions Based on Logic Gate
A Σm (4, 6) B Σm (4, 8)
C Σm (6, 8) D Σm (4, 6, 8)
Questions Based on Logic Gate
A x B x+y
C 0 D None
Questions Based on Logic Gate
Ex.3. Minimized expression will be Y = A ⨁ (A + B)
A A⨁B B A⨀B
C D A+B
Questions Based on Logic Gate
Ex.4. If the output y = 1
Then correct input is/are-
A 1111, 0000
B 1010, 0111
C 0101, 0101
D 1100, 1110
Questions Based on Logic Gate
Ex.5. Output y will be-
A 0
B 1
C A⨁B
D A⨁B⨁C⨁D
Questions Based on Logic Gate
Ex. 6. The logic gates shown in the digital circuit below use strong pull-down nMOS transistors for LOW
logic level at the outputs. When the pull-downs are off, high-value resistors set the output logic
levels to HIGH (i.e. the pull-ups are weak). Note that some nodes are intentionally shorted to
implement “wired logic”. Such shorted nodes will be HIGH only if the outputs of all the gates whose
outputs are shorted are HIGH.
The number of distinct values of X3X2X1X0 (out of the 16 possible values) that given Y = 1 is
__________.
Questions Based on Logic Gate
Ex. 7. If delays through, the gate are given as
OR gate = 5 sec
NAND gate = 4 sec
AND gate = 2 sec
Inverter gate = 1 sec
The worst case propagation delay is
A 12 sec B 16 sec
C 13 sec D 5 sec
Questions Based on Logic Gate
Ex. 8. Consider the circuit shown in figure below
If propagation delay of NOT gate is 10 nsec, AND gate is 20 nsec and X-OR gate is 10 nsec.
If A is connected to VCC at t = 0, then waveform for output Y is
A B
C D
Questions Based on Logic Gate
Discussion
Questions Based on Logic Gate
Ex.9. Find the minimum number of two input NAND GATE required to implement the Boolean
function-
f = AB + CD + F
A 9 B 8
C 6 D 12
Questions Based on Logic Gate
Ex. 10. Find the minimum number of two input NAND GATE required to implement the function-
f(A, B, C, D) = AB + BC + CD + DA
A 9 B 8
C 6 D 12
Questions Based on Logic Gate
Ex.11. Find the minimum number of two input NAND GATE to implement function given below.
A 3 B 4
C 5 D 6
Questions Based on Logic Gate
[GATE-2010-CS]
A m2 + m4 + m6 + m7
B m0 + m1 + m3 + m5
C m0 + m1 + m6 + m7
D m2 + m3 + m4 + m5
Questions Based on Logic Gate
If P, Q, R are Boolean variables, then (P+Q’)(P.Q’ + P.R)(P’.R’+Q') Simplifies to
[GATE-2008-CS]
A
D
1. Which one is redundant GATE for the
given logic circuit?
A. 1
B. 2
C. 3
D. 4
3. If A * B = AB + and C = A * B.
Then which one is/are correct
A. A = B * C
B. B = A * C
C. A B C=1
D. A = B
4.
In this function Number of min term and
max term will be-
A. 10, 5
B. 5, 10
C. 10, 6
D. 6, 10
5. Consider the given logic circuit with the inputs
A, B and C, then f(A, B, C) will be-
6. The output f for the given logic circuit
will be-
A. AB
B. A + B
C.
D.
7. Output f for the given logic circuit will be-
A. 0
B. 1
C. A + B
D. None
8. The simplified form of the Boolean
expression (x + y + xy) (x + z) is
A. x + y + z
B. x + yz
C. xy + yz
D. xz + y
9.
A. A + B + C + ……
B.
C. 1
D. 0
10. The simplified form of the Boolean
expression
A.
B.
C.
D.
11. The following logic gate circuit is
equivalent to
A. NAND
B. OR
C. XOR
D. NOT
12. If a, b, c, d are inputs to a gate and x is its
output then as per the following time
graph, the gate is:
A. NOT
B. AND
C. OR
D. NAND
