Microprocessor and
Microcontroller Fundamentals
Lecturer: Nguyen Quoc Dinh, PhD
Faculty of Electrical Engineering
The University of Danang, University of Science
and Technology
Spring 2017
1
Admin
Students are encouraged to print lecture slides in
advance and use them to take notes in class
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Microcontrollers
Embedded Systems
Operations managed behind the scenes by a
microcontroller
Microcontroller (MCU)
Integrated electronic computing device that
includes three major components on a single chip
Microprocessor (MPU)
Memory
I/O (Input/Output) ports
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Microcontrollers
Support Devices
Timers
A/D converter
Serial I/O
Common communication lines
System Bus
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Block Diagram
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Microprocessor (MPU)
MPU (CPU)
Read instructions
Process binary data
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Memory
Storage Device
Addresses
Registers
Major Categories
Read/Write Memory
(R/W)
Read-only-Memory
(ROM)
D7 D0
330_01 7
Input/Output (I/O)
Input Devices
Switches and Keypads
Provide binary information to the MPU
Output devices
LEDs and LCDs
Receive binary information from the MPU
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Microprocessor-Based Systems
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Microprocessor Architecture
MPU communicates with Memory and I/O
using the System Bus
Address bus
Unidirectional
Memory and I/O Addresses
Data bus
Bidirectional
Transfers Binary Data and Instructions
Control lines
Read and Write timing signals
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Microprocessor-Based System
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Example Microprocessor System
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Software
Machine Language
Binary Instructions
Difficult to decipher and write
Error-prone
All programs converted into machine language
for execution
Instruction Hex Mnemonic Description Processor
10000000 80 ADD B Add reg B to Acc Intel 8085
00101000 28 ADD A, R0 Add Reg R0 to Acc Intel 8051
00011011 1B ABA Add Acc A and B Motorola 6811
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Software
Assembly Language
Machine instructions represented in mnemonics
One-to-one correspondence
Efficient execution and use of memory
Machine-specific
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Software
High-Level Languages
BASIC, C, and C++
Written in statements of spoken languages
Machine independent
Easy to write and troubleshoot
Larger memory and less efficient execution
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Data Format (8-bit)
Unsigned Integers
All eight bits represent the magnitude of a number
Bit7 to Bit0
Range 00H to FFH (010 to 25510)
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Data Format (8-bit)
Signed Integers
2's Complement
Bit7 is sign bit
Positive numbers: 00H to 7FH (010 to 12710)
Negative numbers: 80H to FFH (-110 to -12810)
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Data Format (8-bit)
Binary Coded Decimal Numbers (BCD)
8-bit number divided into two groups of four
Each group represents a decimal digit from 0 to 9
AH through FH are invalid
Example: 0010 0101BCD = 2510
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Data Format (8-bit)
American Standard Code for Information
Interchange (ASCII)
7-bit alphanumeric code with 128 combinations
(00H to 7FH)
Represents English alphabet, decimal digits from
0 to 9, symbols, and commands
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MPU-Based Systems
System hardware
Discrete components
Microprocessor, Memory, and I/O
Components connected by buses
Address, Data, and Control
System software
Group of programs that monitors the functions of
the entire system
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MPU-Based System
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MCU-Based Systems
Microprocessor, memory, I/O ports, and
support devices on a single chip
Buses generally not available to a system
designer
I/O ports generally multiplexed and can be
programmed to perform different functions
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MCU-Based System
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Computer Architectures
Princeton versus Harvard Architecture
CISC versus RISC processors
Microprocessors and Microcontrollers
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Microcontroller Architecture
PIC18F Family
Faculty of Electrical Engineering
The University of Danang, University of Science
and Technology
Spring 2017
1
PIC18F Microcontrollers
Microcontroller Unit (MCU)
Microprocessor unit (MPU)
Harvard Architecture
Program memory for instructions
Data memory for data
I/O ports
Support devices such as timers
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Microcontroller Unit
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PIC18F – MPU and Memory
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Microprocessor Unit
Includes Arithmetic Logic Unit (ALU),
Registers, and Control Unit
Arithmetic Logic Unit (ALU)
Instruction decoder
16-bit instructions
Status register that stores flags
5-bits
WREG – working register
8-bit accumulator
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Microprocessor Unit
Registers
Program Counter (PC)
21-bit register that holds the Program Memory address
Bank Select Register (BSR)
4-bit register used in direct addressing the Data Memory
File Select Registers (FSRs)
12-bit registers used as memory pointers in indirect
addressing Data Memory
Control unit
Provides timing and control signals
Read and Write operations
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PIC18F - Address Buses
Address bus
21-bit address bus for Program Memory
Addressing capacity: 2 MB
12-bit address bus for Data Memory
Addressing capacity: 4 KB
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Data Bus and Control Signals
Data bus
16-bit instruction/data bus for Program Memory
8-bit data bus for Data Memory
Control signals
Read and Write
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PIC18F452/4520 Memory
Program Memory: 32 K
Address range: 000000 to 007FFFH
Data Memory: 4 K
Address range: 000 to FFFH
Data EEPROM
Not part of the data memory space
Addressed through special function registers
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PIC18F452/4520 Memory
Program Memory Data Memory
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Data Memory Banks
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PIC18F452 I/O Ports
Five I/O ports
PORT A through PORT E
Most I/O pins are multiplexed
Generally have eight I/O pins
Addresses already assigned to these ports
Each port is identified by its assigned SFR
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I/O Ports A and B
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Data Transfer
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MCU Support Devices
Timers
Capture, Compare and PWM (CCP Modules)
Serial Communications
Master Synchronous Serial Port (MSSP)
Addressable USART
A/D converter
Parallel Slave Port (PSP)
Data EEPROM
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MCU Support Devices
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PIC18F Special Features
Sleep mode
Watchdog timer (WDT)
Code protection
In-circuit serial programming
In-circuit debugger
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PIC18F4X2
Architecture
Block Diagram
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PIC18F452 Programming Model
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PIC18F Instructions
77 assembly language instructions
Earlier PIC families have 33 or 35 instructions
PIC18F instruction set
Most instructions are 16-bit word length
Four instructions are 32-bit length
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Instruction Descriptions
Copy (Move) 8-bit number (Literal) into W register
Mnemonics: MOVLW 8-bit
Binary format:
0000 1110 XXXX XXXX (any 8-bit number)
Copy (Move) contents of W register into PORTC (File)
Mnemonics: MOVWF PORTC, a
(‘a’ indicates that PORTC is in the Access Bank)
Binary format:
0110 1110 1000 0010 (82H is PORTC address)
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Illustrative Program
Problem statement:
Write instructions to light up alternate LEDs at
PORTC
Hardware:
PORTC
Bidirectional (input or output) port
Setup as output port for display
Logic 1 will turn on an LED
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Illustration
Interfacing LEDs to PORTC
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Illustration
Program (software)
Logic 0 to TRISC sets up PORTC as an output port
Byte 55H turns on alternate LEDs
MOVLW 00 ;Load W register with 0
MOVWF TRISC ;Set up PORTC as output
MOVLW 0x55 ;Byte 55H to turn on LEDS
MOVWF PORTC ;Turn on LEDs
SLEEP ;Power down
330_02 25
Illustration
Address Hex Mnemonics Comments
000000 0E00 MOVLW 00 ;Load W with 0s
000002 6E94 MOVWF TRISC ;Set PORTC as output
000004 0E55 MOVLW 0x55 ;Load 55 to turn on LEDs
000006 6E82 MOVWF PORTC ;Turn on LEDs
000008 0003 SLEEP ;Power Down
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Illustration
Execution of the
instruction:
MOVWF PORTC
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PIC18 Simulator IDE
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Embedded System
MCU-based
System
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PIC18F Programming Model
and Instruction Set
Faculty of Electrical Engineering
The University of Danang, University of Science
and Technology
Spring 2017
1
Review: MPU and Memory
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Review: Data Memory
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PIC18F Programming Model
Representation of the internal architecture
necessary to write assembly language programs
Divided into two groups
Arithmetic Logic Unit (ALU) and Registers
From Microprocessor Unit (MPU)
Special Function Registers (SFRs)
From Data (File) Memory
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PIC18F Programming Model
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ALU
Instruction Decoder
16-bit Instructions
Table Latch
8-bit Data
STATUS: Flag Register
5 individual bits called flags
WREG (W): Working Register
8-bit Accumulator
Product
16-bit Product of 8-bit by 8-bit Multiply
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Flags in Status Register
N (Negative Flag)
Set when bit B7 is one as the result of an arithmetic/logic operation
OV (Overflow Flag)
Set when result of an operation of signed numbers goes beyond 7-bits
Z (Zero Flag)
Set when result of an operation is zero
DC (Digit Carry Flag) (Half Carry)
Set when carry generated from Bit3 to Bit4 in an arithmetic operation
C (Carry Flag)
Set when an addition generates a carry (out)
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Registers
Program Counter (PC)
21-bit register used as a pointer to Program
Memory during program execution
Table Pointer
21-bit register used as a pointer to copy bytes
between Program Memory and data registers
Stack Pointer (SP)
5-bit register used to point to the stack
Stack
31 registers used for temporary storage of memory
addresses during execution of a subroutines
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Registers
BSR: Bank Select Register (0H to FH)
4-bit Register
Provides upper 4-bits of 12-bit address of Data Memory
FSR: File Select Registers
FSR0, FSR1, and FSR2
FSR: composed of two 8-bit registers
FSRH and FSRL
Used as pointers for Data Memory
Holds 12-bit address of data register
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Special Function Registers
SFRs: Table 5-1
Data registers associated with I/O ports, support
devices, and processes of data transfer
I/O Ports (A to E)
Interrupts
EEPROM
Serial I/O
Timers
Capture/Compare/PWM (CCP)
Analog-to-Digital (A/D) Converter
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PIC18 Instruction Set
Includes 77 instructions
73 one word (16-bit) long
4 two words (32-bit) long
Divided into seven groups
Move (Data Copy) and Load
Arithmetic
Logic
Program Redirection (Branch/Jump)
Bit Manipulation
Table Read/Write
Machine Control
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Addressing Modes
Method of specifying of an operand
Immediate (Literal) addressing
The operand is a number that follows the opcode
Direct addressing
The address of the operand is a part of the instruction
Indirect addressing
An address is specified in a register (pointer) and the
MPU looks up the address in that register
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Move and Load Instructions
MOVLW 8-bit ;Load an 8-bit Literal into WREG
MOVLW 0xF2 ;Load F2H into W
MOVWF F,a ;Copy WREG into File (Data) Reg.
;If a = 0, F is in Access Bank
;If a = 1, Bank is specified by BSR
MOVWF 0x25,0 ;Copy W into F Reg25H
MOVWF 0x25 ;Alternate format
MOVFF fs,fd ;Copy from one File Reg. to
;another File Reg.
MOVFF 0x20,0x30 ;Copy F Reg20H into Reg30H
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Move and Load Instructions
MOVF F,d,a ;Copy F into itself or W
;If d = 0 (or W), destination is W
;If d = 1 (or F), destination is F
;Affects N & Z flags
MOVF 0x25,0,0 ;Copy F Reg25H into W
MOVF 0x25,W ;Alternate format
CLRF F,a ;Clear F Reg.
;Sets Z flag
CLRF 0x25 ;Clear Reg25H
SETF F,a ;Sets all bits to 1 in F Reg.
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Points to Remember
Each instruction has two parts
Opcode and Operand
When instructions copy data from one
register to another, the source is not modified
In general, these instructions do not affect
flags
Except CLRF and MOVF
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Arithmetic Instructions
ADDLW 8-bit ;Add 8-bit number to W & set flags
ADDLW 0x32 ;Add 32H to W
ADDWF F,d,a ;Add W to F & set flags
;Save result in W if d = 0 (or W)
;Save result in F if d = 1 (or F)
ADDWF 0x20,0 ;Add W to REG20H and
;save result in W
ADDWF 0x20,W ;Alternate format
ADDWF 0x20,1 ;Add W to REG20H and
;save result in REG20H
ADDWF 0x20,F ;Alternate format
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Arithmetic Instructions
ADDWFC F,d,a ;Add W to F with carry
;and save result in W or F
SUBLW 8-bit ;Subtract W from literal
SUBWF F,d,a ;Subtract W from F
SUBWFB F,d,a ;Subtract W from F with borrow
INCF F,d,a ;Increment F
DECF F,d,a ;Decrement F
NEGF F,a ;Take 2’s Complement of F
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Arithmetic Instructions
MULLW 8-bit ;Multiply 8-bit Literal and W
;Save result in PRODH:PRODL
MULWF F,a ;Multiply W and F
;Save result in PRODH:PRODL
DAW ;Decimal adjust W for BCD
;Addition
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Points to Remember
Arithmetic instructions
Can perform operations on W and 8-bit literals
Save the result in W
Can perform operations an W and F
Save the result in W or F
In general, affect all flags
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Logic Instructions
COMF F,d,a ;Complement (NOT) F
;and save result in W or F
ANDLW 8-bit ;AND Literal with W
ANDWF F,d,a ;AND W with F and
;save result in W or F
IORLW 8-bit ;Inclusive OR Literal with W
IORWF F,d,a ;Inclusive OR W with F
;and save result in W or F
IORWF 0x12,F ;OR W with REG12H and
;save result in REG12H
XORLW 8-bit ;Exclusive OR Literal with W
XORWF F,d,a ;Exclusive OR W w/ F
;and save result in W or F
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Points to Remember
Logic instructions
Can perform operations on W and 8-bit literals
Save the result in W
Can perform operations an W and F
Save the result in W or F
In general, affect only two flags: N and Z
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Branch Instructions
BC n ;Branch if C flag = 1, -128 ≤ n ≤ +127
;to PC+2+2n
BC 5 ;Branch on Carry to PC+2+10
BC Label ;Alternate: Branch to Label
BNC n ;Branch if C flag = 0
BZ n ;Branch if Z flag = 1
BNZ n ;Branch if Z flag = 0
BN n ;Branch if N flag = 1
BNN n ;Branch if N flag = 0
BOV n ;Branch if OV flag = 1
BNOV n ;Branch if OV flag = 0
BRA nn ;Branch always, -1024 ≤ nn ≤ +1023
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Branch Example
Address Label Opcode Operand Comment
000020 START: MOVLW BYTE1 ;Load BYTE1 into W
000022 MOVWF REG0 ;Save into REG0
000024 MOVLW BYTE2 ;Load BYTE2 into W
000026 MOVWF REG1 ;Save into REG1
000028 ADDWF REG0,W ;Add REG0 to REG1
00002A BNC SAVE ;Branch if no carry
00002C MOVLW 0x00 ;Clear W
00002E SAVE: MOVWF REG2 ;Save Result
000030 SLEEP
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Call and Return Instructions
RCALL nn ;Relative Call subroutine
; -1024 ≤ nn ≤ +1023
CALL 20-bit,s ;Call subroutine
;If s = 1, save W, STATUS, BSR
RETURN s ;Return subroutine
;If s = 1, retrieve W, STATUS, BSR
RETFIE s ;Return from interrupt
;If s = 1, retrieve W, STATUS, BSR
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Points to Remember
Eight conditional relative branch instructions
Based on four flags
Range is -128 ≤ n ≤ +127 (words)
Unconditional relative branch instruction
Range is -1024 ≤ nn ≤ +1023 (words)
If the operand is positive, the jump is forward
If negative, the jump is backward
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Bit Manipulation Instructions
BCF F,b,a ;Clear bit b of F, b = 0 to 7
BCF 0x2,7 ;Clear bit 7 of Reg2
BSF F,b,a ;Set bit b of F, b = 0 to 7
BTG F,b,a ;Toggle bit b of F, b = 0 to 7
RLCF F,d,a ;Rotate bits left in F through
;carry and save in W or F
RLNCF F,d,a ;Rotate bits left in F
;and save in W or F
RRCF F,d,a ;Rotate bits right in F through
;carry and save in W or F
RRNCF F,d,a ;Rotate bits right in F
;and save in W or F
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Points to Remember
Any bit in a File (data) register
Set, reset, or complemented
There are two types of rotate instructions
8-bit and 9-bit (include C)
Any file (data) register can be rotated left or right
Saved in W or F
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Test and Skip Instructions
BTFSC F,b,a ;Test bit b in F and skip the
;next instruction if bit is cleared (bit=0)
BTFSC 0x2,7 ;Test bit B7 in REG2
;if B7=0 then skip next instruction
BTFSS F,b,a ;Test bit b in F and skip the
;next instruction if bit is set (bit=1)
CPFSEQ F,a ;Compare F with W, skip if F = W
CPFSGT F,a ;Compare F with W, skip if F > W
CPFSLT F,a ;Compare F with W, skip if F < W
TSTFSZ F,a ;Test F, skip if F = 0
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Increment/Decrement
and Skip Next Instruction
DECFSZ F,d,a ;Decrement F and skip the
;next instruction if F = 0
DECFSNZ F,d,a ;Decrement F and skip the
;next instruction if F ≠ 0
INCFSZ F,d,a ;Increment F and skip the
;next instruction if F = 0
INCFSNZ F,d,a ;Increment F and skip the
;next instruction if F ≠ 0
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Points to Remember
Any File (data) register or single bit in a File
(data) register can be tested for 0
A File (data) register can be compared with
W for equality, greater than, and less than
A File (data) register can be incremented or
decremented and tested for 0
If a condition is met, the next instruction is
skipped (no flags are affected)
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Table Read/Write Instructions
TBLRD* ;Read Program Memory pointed by TBLPTR
;into TABLAT
TBLRD*+ ;Read Program Memory pointed by TBLPTR
;into TABLAT and increment TBLPTR
TBLRD*- ;Read Program Memory pointed by TBLPTR
;into TABLAT and decrement TBLPTR
TBLRD+* ;Increment TBLPTR and Read Program
;Memory pointed by TBLPTR into TABLAT
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Table Read/Write Instructions
TBLWT* ;Write TABLAT into Program Memory pointed
;by TBLPTR
TBLWT*+ ;Write TABLAT into Program Memory pointed
;by TBLPTR and increment TBLPTR
TBLWT*- ;Write TABLAT into Program Memory pointed
;by TBLPTR and decrement TBLPTR
TBLWT+* ;Increment TBLPTR and Write TABLAT into
;Program Memory pointed by TBLPTR
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Machine Control Instructions
CLRWDT ;Clear Watchdog Timer
RESET ;Reset all registers and flags
SLEEP ;Go into standby mode
NOP ;No operation
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Instruction Format
The PIC18F instruction format divided into
four groups
Byte-Oriented operations
Bit-Oriented operations
Literal operations
Branch operations
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Instruction Format
Byte-oriented instruction – ADDWF F, d, a
ADDWF 0x1,F ;Add W to REG1, save in REG1
Bit-oriented instruction – BCF F, b, a
BCF 0x15,7 ;Clear bit7 in REG15H
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Instruction Format
Literal instruction — MOVLW k
MOVLW 0x7F ;Load 7FH into W
Branch instruction — BC n
BC 0x15 ;Branch if carry +15H words
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Illustration: Addition
Problem Statement
Load two bytes (37H and 92H) in registers REG0 and REG1
Add the bytes and store the sum in REG2
Address Hex Opcode Operand Comments
0020 0E37 MOVLW 0x37 ;Load first byte in W
0022 6E00 MOVWF REG0 ;Save first byte in REG0
0024 0E92 MOVLW 0x92 ;Load second byte in W
0026 6E01 MOVWF REG1 ;Save second byte in REG1
0028 2400 ADDWF REG0,W ;Add bytes and save sum in W
002A 6E02 MOVWF REG2 ;Save sum in REG2
002C 0003 SLEEP ;Power Down
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Bus Contents
Execution of the
instruction:
MOVLW 0x37
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Pipeline Fetch and Execution
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