Digital Logic Design Assignment
1. Half Adder
A Half Adder is a combinational logic circuit that performs the addition of two single-bit
binary numbers. It has two inputs (A and B) and two outputs: Sum (S) and Carry (C).
Truth Table
A B Sum Carry
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
Boolean Expressions:
Sum = A XOR B
Carry = A AND B
Applications: Used in digital calculators, processors for basic addition operations.
2. Full Adder
A Full Adder is a combinational circuit that performs addition of three bits: A, B, and Carry-
in (Cin). It has three inputs and two outputs: Sum (S) and Carry-out (Cout).
Truth Table
A B Cin Sum Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
Boolean Expressions:
Sum = A XOR B XOR Cin
Cout = (A AND B) OR (B AND Cin) OR (A AND Cin)
Applications: Used in processors, ALUs, and digital systems for multi-bit binary addition.
3. Multiplexer & Demultiplexer
3.1 Introduction
A Multiplexer (MUX) is a combinational logic circuit that selects one input from multiple
inputs and forwards it to a single output line, based on select lines. A Demultiplexer
Page | 1
(DEMUX) does the opposite: it takes one input and channels it to one of several output lines,
based on select lines.
3.2 Multiplexer (MUX)
3.2.1 Definition
A MUX is often called a data selector. It has multiple input lines, one output line, and select
lines to choose which input goes to the output.
3.2.2 Working Principle
If there are n select lines, the MUX can handle 2^n input lines. The binary value on the select
lines decides which input is connected to the output.
3.2.3 Truth Table Example for 4-to-1 MUX
Select Lines (S1 S0) Output (Y)
00 I0
01 I1
10 I2
11 I3
3.2.4 Boolean Expression
Y = S1'S0'I0 + S1'S0I1 + S1S0'I2 + S1S0I3
3.3 Demultiplexer (DEMUX)
3.3.1 Definition
A DEMUX is also called a data distributor. It has one input line, multiple output lines, and
select lines to determine which output gets the input signal.
3.3.2 Working Principle
If there are n select lines, the DEMUX has 2^n output lines. The binary value on select lines
decides which output line gets the input signal.
3.3.3 Truth Table Example for 1-to-4 DEMUX
Select Lines (S1 Y0 Y1 Y2 Y3
S0)
00 D 0 0 0
01 0 D 0 0
10 0 0 D 0
11 0 0 0 D
3.4 Applications
• Data Routing: Used in communication systems to route data to desired channels.
• Memory Selection: Selects specific memory locations in computer architecture.
• Signal Switching: Used in signal routing in digital circuits.
Page | 2
4. Encoder & Decoder
4.1 Introduction
An Encoder is a combinational logic circuit that converts 2^n input lines into an n-bit binary
code. A Decoder performs the opposite operation, converting an n-bit binary input into 2^n
distinct output lines.
4.2 Encoder
4.2.1 Definition
An encoder takes multiple input lines, only one of which is active at a time, and produces a
binary code representing the active input line.
4.2.2 Working Principle
If there are 2^n inputs, the encoder will have n output lines. The output is the binary
representation of the index of the active input.
4.2.3 Truth Table Example for 4-to-2 Encoder
Inputs (D3 D2 D1 D0) Outputs (Y1 Y0)
0001 00
0010 01
0100 10
1000 11
4.2.4 Boolean Expressions
Y1 = D2 + D3
Y0 = D1 + D3
4.3 Decoder
4.3.1 Definition
A decoder takes an n-bit binary input and activates exactly one of 2^n output lines.
4.3.2 Working Principle
If there are n input lines, there will be 2^n output lines. Only the output line corresponding
to the binary input is activated.
4.3.3 Truth Table Example for 2-to-4 Decoder
Inputs (A1 A0) Y3 Y2 Y1 Y0
00 0 0 0 1
01 0 0 1 0
10 0 1 0 0
11 1 0 0 0
4.3.4 Boolean Expressions
Y0 = A1' A0'
Y1 = A1' A0
Page | 3
Y2 = A1 A0'
Y3 = A1 A0
4.4 Applications
• Keyboard Encoding: Converts key presses into binary codes.
• Address Decoding: Used in microprocessors to select memory locations.
• Data Compression: Encoders help reduce data size for transmission.
• Digital Display Systems: Decoders are used to drive 7-segment displays.
Page | 4