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Microprocessor

The document provides an overview of the 8085 microprocessor architecture, detailing its various pins, functions, and interrupt handling mechanisms. It explains the roles of different registers, including general-purpose and special-purpose registers, as well as the significance of control signals like RESET, RD, and WR. Additionally, it categorizes interrupts into maskable and non-maskable types, highlighting their priorities and functionalities.
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0% found this document useful (0 votes)
10 views18 pages

Microprocessor

The document provides an overview of the 8085 microprocessor architecture, detailing its various pins, functions, and interrupt handling mechanisms. It explains the roles of different registers, including general-purpose and special-purpose registers, as well as the significance of control signals like RESET, RD, and WR. Additionally, it categorizes interrupts into maskable and non-maskable types, highlighting their priorities and functionalities.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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each pio oF &085

& Explain the noNKi0nA funeion of

40k Vec
inpuk HLDS
HOLD
38K
Reset oule QLK UT
8ID
Serial (36 ESET IN
\/0
SOD 5
35k
READY Timing cand
TRAP Control
34
RST 75 33.
RST 65 32 RD
RST 55 31
ALE
INTR
29)
JNTA 28’ Ai
ADy
AD 12 26
As - A1s
AOo-Aa ADa 14 25
Adäroess bul
Addeess (15 24 A11
data 23 ’ Ao
bus
AD4 22
AD5 Ag

’ +5V Powe. Supply


Vss
A oryta! is aonnected a these two pirs
N> QLK (QUr) This can be used a the system
signad
@beK for oHhen devices
RESE T N 2 RESET OUT ’
cleaoing the pe and IR
bisabing du inter oupts (encept TRAP)
the 80D pin.
Disabting
aroe troi statod.
AL tHe buges (data address. controot
Gives HIGH Otpw to RESET 6UT Pin

PESET 0UT

and othen ieA


. I is Wsed to Bese the peroiphena devices
0n the cincuit

II is an outp signal
I is an aehive high signau. RESET IN
high whenever
The otput on this pin g0e4
is given low Signa IN is Kept
as RESET
high os long
The output emaíns
low

SID:
(suoial l0pu dta)
room sorial Porot oF 8085 Accumulasn.
bit input Posthon (MsB) of
the
the 8th
Storoes the bit o
uzed t troansern the bir
instsucion is
nteoro upt MOsK)
RiM (ROod
(seRial otPut daBa)
seroia!: Pot o 8085
bit Proom Acc um ulotoo to
It tave
POsiion
Froom the (Mse of the A0cumulakt
g
Tves he bi
MaK) insruction is uzed to troansfern
SIM (3et Interoroupt
the bit

Addoess Bus
is usod to send addroess to memog
Ihe adress bus
loctiors in memorg
mony
The 800ets gne of he
Ths Site is s6-bit
Dota Bus
" I is Usod to toonsor data between mfonopRoceRIon and

Dota bui is of 8 -bit


ix) ALE

" I is usod to enabie Addroess Ladch


It indicodes whehero bus PuncioM as addess bus or0 data by
"I ALE 1 then
" Bus unchng os addoess bus.
= 0 4hen
" Bus tunctions as data bus.
X)

C So and ane alled tatus pi%.


the cUDOent aperatorn whih is n
They teu prooqea
in 8085
oo
St Opeoahon
Halt
turoite
Read
A opcode Pekh

IO M:
" This pin tels whemero /0 oro memoroy openion is beîng
Poroformecd

I/o opergion is teing pertomed


J (0/ M 0 ther

Momoroy operckon is baing penoomed


Machine cycle sttus signal ContooI signat

oropE FE TCH RD

Memray nead
MeMony
4

Tnterpupt Ak

HOLD

ane ued Poro dinect memosy acess


HOLO and Shnas
HLDA
signals pequess he cse oF 4he addness and
(PMA) HOLD
equest.
data buses HLDA signal acknowedes he toLD

"This pin is uSed to synchroonie sbuero periphenal


devices wih fast micboproessoro
I Sense whethero a peripheal iS Deady to tnansten
data or ngt" If READY s hign U) 4he pehiphenl
iS peOdy If ir is lou () the micnoprs¢ceLsoD Nas tiL
gpes nigh t is useRu Rorn interfauing bw specd
devices.
iy RD
Stands Poro Read
I} is an achve locw signal
It is a contool Signa used fo Read cpertien eitmen
froom memorsy ors oom Input device
A Ow signal indiaos that data on the dta bus
must be placed eihorn aorn soloded memoay Locatio n
ra Procnm inpu deie
" I s dio achve ow signa.
" It is a contool Signat used forn woie opeRaton inh
Memany oro into output cevice

A low Sana! indicates that data on the dta hus


mus be wroiten into selectd Memorsy location on
into qutput device

O what is inhuopupt ?
n the 8085 micOO
PROCEASO0 , an intupnup Rs a signa that
tempornaroiy
and
Sugpends the norrmal eecution of a
radecs the contaol to a speuHe prooqnam
Nouine (1sR) Inteonupts alon inlernup genvke
the
espord to eonterral eenk, Such as meropreoerOR to
u3ers inpu
evets
ors harduane Sglem
siavt pouing Bignas, wiHaout the need fr
iNerroupt

Harodwaroe Softwae

mOsKae NON- maKalble

vector Non - vetoro


) MasKble Inerroupt
MaSKable intenupts ane those inteupts ihih cgn be
enabed ors di'sabled

"Enabling and Disabling is done by sotuare insteuctory.


list oF MasKabie interoroupkS:

RST
RST 6 5
RST 55
INTR

» NOn - maskabie InherRupt

The inerorupks which arne always in enabled mode ase


ealled DGn-mag kable interrrups.

ineboups an neve be disa bied


These by ang
SoYtwaroe inshrouebn

TRAP is a non- mahabk interapt

Intepn upts :

The inteppts Which have ixed memorgy Location oro


troansforo of controol oom noromal mecution
Foch ve ctors ed inteopupte point to the Paficularo
1ocaion in memoro
List af yectorsed intennups:
R&T
RST 6

5
TRAP
ip Non- vetoed Tnteproups

Fe tnienroapks which don't have fined memory tbathon


or tnagfer oP oonoo! room omal enecuhon.

The addness of the memmoroy lochon is ent


the ineNUpt
" INTRis a non vectored inerpupt

HardwaQ intennupt:

when micpoproressoro Qeve inteorupt signals thoough


Pins (hoandare) of micropeoceASoR . they aroe known as
Hazdwone internuph Thene are 5 Hardwahe
inlerpupts in 8085 miusspro0eASOS They arse INTR
RST T RST Ga) RST 5-5, TRAP

vi) 8o'Nare inteDNUpt;


&twarre inerroups ane those uwhich arre ingeroted in
MONCR
Deren he pra09 Dam uwhidh mean nese arse MAe
0f mioo proocegson Thase aRe &ofwaree interoraupts in
BO85 mnicrtoprocesso. They aroe
AST O, RST 1RST 2, RST 9 RST Y, RsT 5, RST 6
,RSI
Thene arQ

1RAP The 1RAP nlornNupt is a non- maKa bie internupt that is


qeneoated by an entororol device, Sueh as a Power
inerooupt has
bañune gn a haredware malfunchon . The TRAP
preioroity and eannot be disabl ed
te highest

RST7 ; The RST 5 ineoroupt 1S a masvabie morooupt


tat is genertd by a stwaroe isituctien I
has the sQ Cond highest eriorsity
RST 6-5 The RsT 65 inteeraup 1S a nmagkabie interraupt
that is gereraed by a soFtware instrouction

I has 4he thiyod hhghest prioraty ·

FS1 * 5e RST 55 inteurrupt is a masvob iniennupt


that is generoated by a softuore ingtrouchion
T has the Fouroth highet

INTR Ihe NTR intenroupt. S a masKable ioterasupt


fhat is generated by an emternal deke
Such asa keyb0 arr Or a moUse. T has. the ouest

baioraily and ab Can bR disabie


8086 micooprooceAsOYS
Regiskero oP

pes oP Aogistorns
in 8085

genernal puppose Regishers rspecia! Registers

B(S) (8) Aceumulahor l&)


D(8) Flsg Regisyer (6)
H() L(6) Insuchion Aegister s)
Poogroam counter (16)
8fack ponters (16)
Temporany Regisiaa
genuroal Puopase Rog iskeres

The 8085 has sn general- Purepase roegisterat to stune


R. bit dota these aroe Tdenhhfed as B,0,D E,H,andL
these ean be eoAARr Conmbined aA roegis teres pajns

Be DE , and HL to perfora Some so bit operdion

These Regisreas ape used to stone ore copy temporay


data by using Instuctions, during the eicuticn
o he prograa m:
i Speoial puRpase Regisierss

The accumuatoro is a 8- bit egisters(cantoroe &-blr


ond logica! unit
data) that is te Porct of the Arithmehie ogiccl opanaho
(ALU) "Afrero peraforing anithmehca! or
Hhe rnesul is tored n accumulcton
Accumuloton is also deined ad pegistere A
Counteo:
foogroam
the eoeeution oY the
The roeg ksten is used to sequence
insouahons The funehon of the preogbam counten is to
which the
Point o the memory addroeas Proom
be fèhed when a byte (machine code)
e t byte is, to inre mented
fobehed , he proograam cOunero is
is beong
point to the net memoroy locaion.
by one to

3) stacK poinier
Pointero I points to a memorey
I is used as a memomy called the stac.
Locchion in nead/ wrire memorst
nted/decrsemented by duroing
incroeme
IT fs always
pop operoaion
Push and po

4) Instroueton Registero: (TR)


the CupInent inghouelion being eneeuted
HOLDS
instouehon raegister in 8085 holds the opcode of the
Tñe micooprocexsors s QMeutng
urrnt instrouchon thaF the
contol unt to de code and eqecute the
enabling the
inghouchion

Flog Regislen
roegisten and
The Rag roegiste is a 8peoial purpose registerns in
it is compleBe errent Proom other
I consists of 8 - bik and ony 5 of them
aroe geul The ohe thoee are (eFt vacent and aroe
usod in he futurse 4nel verasiong These 5 Plags ane
8e oro roeset (twhen alue of fag is 4 , hen it is said
ts be set and when vallee is 0. then it is said to be
Pe8et) after an operrtion accorrding to daa condihon
o ne nest in the aceumuuaton and oher negiSe
Bu B3 B. Bo
szAc-|P p
Datu 100nsen (MioPr•OCeLSOa) ingtrouc'on
) MOV mov bata froomn SounO roogistuo to
degtinahon

ENampe :

MOV M, Rs
1 mou pato treom Sounce Regisero to memoroy
locahon : whose addroess is iven by the
HL Pio:
HL
Rs
Example
mou M,O
3
MOV Rs M Mo Dta fom
Memony lgeion to Souce
Rs HL

EXample: In the value OF HL = 2000H


2400 H 05 H.

MOV C,M
4) MVI RA , data
’ Mo given data to destination pegisen.
Rd data

Exompe: MVI C ,05H


MVI M data’ MOU given data to Menorsy tocation
Pointed by the HL Poir
HL data
Exomple: MVI M, 05 t
6 Xe HG the conton H and L with
exohange
Dand E H D LE)

ExaMple 1f H = A5 H, L= 70H D= Q5H = 90 H

Aers exhang eonQcuhion -


H 25H L= 90 H,D= SH, E = 0H
) LXI Rp
teinhing cunNent
Memoray tooatiÝn using negisen
faie Load egister pain gmidiabe ingouction.

ExaMple LXI H 2000 H


LXI D ) 2020 H
LXI B , 2030 H

mulator with centaint content of


LOA Addroess Lood Accu
Locatin
Menory
Addrsess
Accumulators Dinet
LDA L0ad

55 H
If 8000 H =
EXOMPR H
LDA 3 000
Accumlator
oF
LOad eAein ef content
$TA AdcraesS locaton
into given memoy

A
55 H
Exanpe
8TA qO00 H

Memoroy
Aecumulatoro wih content oF
’ LOod
LDAX Rp paio.
Locatin potnted by Registeo

Rp

Example 25 H [Cj- 15 H
2515H=20 H
LDA X B
U

204
44) STAX Rp ’ Lood content oP AccuMalatoro tno Memoy laa
binied by Rogisle paio
A ’Rpl
EXample: 8TA X D |Aecumulatoo vae Registen

LHLD Addness ’content of Memory loQhiÝn hihose odoer


is specifed in the inahauehon aNe
Loados
into Register L and onient of Ne
Memory locaton is loaded in H .
Load H and L Registen Dirnect
Example ’I 2400 H

LHLD 2)00 H

SHLD is ino he
Addoess conlent of
L'TroansPenets
Locaon Whoge oddness is speoifed the
Memooy Locahan and content o is
TRangorped into the
Locion
Successing mermory
Exomple’ 4’32 H
20H

SHLD
2000 2 4
Aroihmetta
and
Rogistero value to aucumutotoro valwe
4 ADD R Add
acumulatoro
8oroe Rinal value in
A A+R
AD AODIO Ae
Ex ADD to acCumubtoro
conten
QOntesn oP the value
2 A0D M Add Memoroy occumulator .
Store final oesult n
value and

ADD M
Acumulaton
EX A^and place the
daa to
3 ADT dda Add immedicle
in Accumlato0

A+ data
A

ADI O5 H
wit
AccUmulator value
value to accumulator.
4 ADQ R Add raegishen sesull in
ond toroe Anl

A A+R+carneg

Ex ADO AceumuCctoro value


Qontent value to
Acoumulator
ADQ M Add oesult store in
and final
with carory
eanry
A A + HL] t Accumulatoro with
carry.
imomediote ata to
ALI data Atd
caeiny
A + deta +
A

8UB R
Logicd
aocumelator, ,
Rotated accomulaorn LEfT 8 bit of
by one one pit witho ut caory
SbiPred toucnas teft

Example
JP A =55H

find RLO
to

14
Ac

la 32 4 4 2 1
Accumdato o GHT 8 bit of accumton is
Rotate
one bit without ca gy
shifred twanis night by one
Symbol:

EXQMple

A Ao
A

ROTATE Accumuiatorn LEFT


RAL;
shiftcd towands iefr ba one one
0ccumdatoro is
8 bit of
bit wìh aany

Exampk:
A A As Au A, A Ai Ao

A As As Au A3
4

RAR ROTATE Accumuatop kIGtT


of accumuator is shifres towaris nighi by cne cne
bit with canny

rEIEEI
l Bponch GacuP

conhocl is Aroanstenred
TUMP Uncoraihinaiy
uncorditioally to the memory loation whoe
addnessis speciod in the instrouchòn .

Symbci : [re] -[ackiness


Exampe : JMP 20OT H

JUMP Conditonally Controgl is tranafenned condihionaly to the


memory tocaton » whase addness is SpecRed in the
Example o
insttaud:n
Jump on not zeno(20)
JE addrs
Tump on zerro ( )
JNC addn :
Tump on not canoy
Tump on Caroy CH 1)(Cye)
JP addo
Jump on Odd
" TPE adds
Tump on even
Panity (p=0)
panity (P=9
Tump n plus
(s-0)
JUmp on Minus (s z1)
2) DiYerence beween CAL and JMP ingtrouchion

Pooqnam
CALLLA PC I L1:Addns

’ LA Addnes Physica'
Addness of
nemt PoP pe; PA one RET
instouchon
CALL
TMP
instouehon is used to eneuto sub
ingtrouehion used to jumps
new loa ction. oouine
to a
oeun addroes
> CALL insouchon stores
JMP inshouchion puts new
i looaion staok aften tha it goes on
new
into pe. 43t on
locahion.

has condihona and Ti 886 has conoional and uncondiional


() S085
unconditoral JMP. CALL 2 RET
roeturn odres
is vses stack to stose
RET to rootuTn back to man
Deed RET. Vs Needs
Progroom

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