Digital Fundamentals (BE03000071) Sem 3
<Logo of Respective College>
A Laboratory Manual for
Digital Fundamentals (BE03000071)
2025-2026 (Odd Term)
B.E SEMESTER - 3
< NAME OF COLLEGE>
Department of Computer Engineering
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
< NAME OF COLLEGE>
Department of Computer Engineering
<College Logo>
CERTIFICATE
This is to certify that
Mr./Ms.__________________________________________ Enrollment No.
_______________ of B. E. Semester – III from Computer Engineering
Department of this Institute (GTU Code: ___) has satisfactorily completed the
Practical / Tutorial work for the subject Data structure (BE03000081) for the
academic year 2025-26.
Place: ___________
Date: ___________
Signature of Course Faculty Head of the Department
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Digital Fundamentals (BE03000071) Sem 3
Preface
Main motto of any laboratory/practical/field work is for enhancing required skills as well as
creating ability amongst students to solve real time problems by developing relevant
competencies in the psychomotor domain. By keeping in view, GTU has designed competency
focused outcome-based curriculum for engineering degree programs where sufficient weightage
is given to practical work. It shows the importance of enhancement of skills amongst the students
and it pays attention to utilize every second of time allotted for practical amongst students,
instructors and faculty members to achieve relevant outcomes by performing the experiments
rather than having merely study type experiments. It is essential for effective implementation of
competency focused outcome-based curriculum that every practical is keenly designed to serve
as a tool to develop and enhance relevant competency required by the various industries among
every student. These psychomotor skills are very difficult to develop through traditional chalk
and board content delivery methods in the classroom. Accordingly, this lab manual is designed
to focus on the industry-defined relevant outcomes, rather than the old practice of conducting
practical to prove concepts and theory.
By using this lab manual students can go through the relevant theory and procedure in advance
before the actual performance which creates an interest and students can have basic ideas prior
to performance. This in turn enhances predetermined outcomes amongst students. Each
experiment in this manual begins with competency, industry relevant skills, course outcomes as
well as practical outcomes (objectives). The students will also achieve safety and necessary
precautions to be taken while performing practical.
This manual also provides guidelines to faculty members to facilitate student centric lab
activities through each experiment by arranging and managing necessary resources in order that
the students follow the procedures with required safety and necessary precautions to achieve the
outcomes. It also gives an idea of how students will be assessed by providing rubrics.
Digital Fundamentals is a core course in all computer science and electronics undergraduate
curricula. The course provides the foundation for understanding the principles of digital logic and
the design of digital systems. It forms the basis for several advanced subjects such as computer
architecture, embedded systems, microprocessors, VLSI design, and operating systems. The
course is typically accompanied by a lab component in most universities in India. The associated
lab focuses on the practical implementation of digital circuits and logic designs, i.e., designing and
simulating combinational and sequential circuits using hardware description languages or logic
simulators.
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Digital Fundamentals (BE03000071) Sem 3
Institute’s Vision
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Institute’s Mission
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Department’s Vision
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Department’s Mission
<Write your department’s mission here>
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Digital Fundamentals (BE03000071) Sem 3
Sr. Marks %
Course Outcome (CO) Statement
No. Weightage
Solve the given problem using fundamentals of Number systems
CO-1 and Boolean algebra and design simple circuits using various 10%
gates for a given problem.
Design and implement various Combinational logic circuits and
CO-2 25%
verify their working in a simulator.
Design and implement Sequential logic circuits and verify their
CO-3 30%
working in a simulator.
Understand memory types, organization, and operations, along
CO-4 with the application of programmable logic devices in modern 20%
systems.
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Digital Fundamentals (BE03000071) Sem 3
Programme Outcomes (POs)
1. Engineering knowledge: Apply the knowledge of mathematics, science, engineering
fundamentals, and an engineering specialization to the solution of complex engineering
problems.
2. Problem analysis: Identify, formulate, review research literature, and analyse complex
engineering problems reaching substantiated conclusions using first principles of
mathematics, natural sciences, and engineering sciences.
3. Design/development of solutions: Design solutions for complex engineering problems and
design system components or processes that meet the specified needs with appropriate
consideration for the public health and safety, and the cultural, societal, and environmental
considerations.
4. Conduct investigations of complex problems: Use research-based knowledge and research
methods including design of experiments, analysis and interpretation of data, and synthesis
of the information to provide valid conclusions.
5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern
engineering and IT tools including prediction and modelling to complex engineering
activities with an understanding of the limitations.
6. The engineer and society: Apply reasoning informed by the contextual knowledge to assess
societal, health, safety, legal and cultural issues and the consequent responsibilities relevant
to the professional engineering practice.
7. Environment and sustainability: Understand the impact of the professional engineering
solutions in societal and environmental contexts, and demonstrate the knowledge of, and need
for sustainable development.
8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities and
norms of the engineering practice.
9. Individual and team work: Function effectively as an individual, and as a member or leader
in diverse teams, and in multidisciplinary settings.
10. Communication: Communicate effectively on complex engineering activities with the
engineering community and with society at large, such as, being able to comprehend and
write effective reports and design documentation, make effective presentations, and give and
receive clear instructions.
11. Project management and finance: Demonstrate knowledge and understanding of the
engineering and management principles and apply these to one’s own work, as a member and
leader in a team, to manage projects and in multidisciplinary environments.
12. Life-long learning: Recognize the need for, and have the preparation and ability to engage
in independent and life-long learning in the broadest context of technological change
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Digital Fundamentals (BE03000071) Sem 3
Department of Computer Engineering
Subject Name: - Digital Fundamentals (BE03000071)
Term: - 2025-2026 (Odd Term)
Rubrics Need
Criteria Marks Good(2) Satisfactory(1)
ID Improvement(0)
Moderate (50-
RB1 Regularity 05 High(>75%) Poor(<50%)
75%)
Apt & Full Limited
Problem Very Less
Identification Identification
Understanding Identification of
of the of the
& the Problem /
RB2 05 Problem Problem /
Implementation Very Less
& Complete Incomplete
of the Solution Solution for the
Solution for Solution for
in Simulator Problem
the Problem the Problem
Correct Partially Correct Incorrect
Testing of the
RB3 05 Solution as Solution for the solution for the
Solution
required Problem problem
RB4 Documentation 03 Excellent Above Average Below Average
Very few
All questions Delayed &
questions
RB5 Mock viva test 02 responded partially correct
answered
Correctly response
correctly
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Digital Fundamentals (BE03000071) Sem 3
INDEX
Sr.
Practical Date Grade Sign
no.
To implement all basic logic gate and derived gates in
1
Logisim Simulator.
Solve the given function using appropriate postulate
2 rules and draw logic circuit diagram of each in
Logisim Simulator.
Solve the given function using K-map and draw logic
3
circuit diagram of each in Logisim Simulator.
Solve the given function using Tabulation Method
4 and draw logic circuit diagram of each in Logisim
Simulator.
To implement BCD to Excess-3 Code Convertor in
5
Logisim Simulator.
To implement BCD to Gray Code Convertor in
6
Logisim Simulator.
To implement Full Adder and Half Adder in Logisim
7
Simulator
To implement Full Subtractor and Half Subtractor in
8
Logisim Simulator.
9 To implement four bit by three bit binary multiplier.
10 To implement BCD Adder in Logisim Simulator.
To implement Magnitude Comparator in Logisim
11
Simulator.
12 To implement 3 X 8 decoder in Logisim Simulator.
To implement 4 X 16 decoder with the help of 3 X 8
13
decoder.
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Digital Fundamentals (BE03000071) Sem 3
Draw Combinational circuit diagram for Full Adder
14
and Full Subtractor using decoder.
To implement 8 X 1 Multiplexer in Logisim
15
Simulator.
a) To implement Boolean function F(a,b,c,d) =
∑(0,2,5,8,10,14) with a multiplexer.
b) To implement Boolean function F(a,b,c,d) = π
16 (2,6,11) with a multiplexer.
c) To implement Boolean function F(a,b,c,d) =
∑(1,3,4,11,12,13,14,15) with a multiplexer.
Design 5 to 32 line decoder using basic decoders 9 (as
17
asked in examination).
Design parallel adder circuit which can decrement
18
given input value (as asked in examination).
Design the circuit diagram which can explain the
19
cascading concept in De-multiplexer.
Design the circuit diagram which can explain the
20
cascading concept in Multiplexer.
Design the circuit diagram which can explain the
21
utility of MUX-DEMUX.
Design the circuit diagram to show a common adder-
22
cum-subtraction.
Explain the working of all the following flip flop in
Logisim simulator.
a. S-R flip flop
23 b. D flip flop
c. J-K flip flop
d. T flip flop
24 Design master slave flip flop (using every flip flops).
25 Prepare J-K, D and T flip flop using S-R Flip flop.
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Digital Fundamentals (BE03000071) Sem 3
26 Prepare S-R, D and T flip flop using J-K Flip flop.
27 Prepare J-K, S-R and T flip flop using D Flip flop.
28 Prepare J-K, D and S-R flip flop using T Flip flop.
Prepare a sequential circuit diagram to explore the
functionality of given state diagram.
29
Prepare a sequential circuit diagram using D flip flop
of the given state diagram.
30
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Digital Fundamentals (BE03000071) Sem 3
Practical 1
AIM: To implement all the basic and derived gates in Logisim Simulator
Theory: -
● AND
● OR
● NOT
● NOR
● NAND
● XOR
● XNOR
Implementation: -
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 2
AIM: To Implement the given Sum-of-product and Product-of-sum
Boolean function in Logisim Simulator. (Using Boolean Algebra)
Theory: -
● SOP (SUM OF PRODUCT)
1. AB+AB’+A’B’
2. ABC+ABC’+AB’C+A’BC
● POS (PRODUCT OF SUM)
1. (A’+B’+C) (A’+B’+C’) (A+B+C) (A’+B+C)
2. (A+B+C) (A+B+C’) (A+B’+C’)
Implementation: -
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 3
AIM: Solve the given function using K-MAP Method and draw logic
circuit diagram of each in Logisim Simulator
Theory: -
1. F (A, B, C, D) = m (1,3,4,5,10,11,12,13,14,15)
2. F (A, B, C, D) = m (1,3,4,5,10,11,12,13,14,15)
3. F (A, B, C, D) = m (1,3,4,5,10,11,12,13,14,15)
Implementation: -
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 4
AIM: Solve the given function using Tabulation Method and draw
logic circuit diagram of each in Logisim Simulator
Theory: -
1. F (A, B, C, D) = m (1,3,4,5,10,11,12,13,14,15)
2. F (A, B, C, D) = m (1,3,4,5,10,11,12,13,14,15)
3. F (A, B, C, D) = m (1,3,4,5,10,11,12,13,14,15)
Implementation: -
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 5
AIM: To implement BCD to Excess-3 Code Convertor in Logisim
Simulator
Theory: -
Implementation:
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 6
AIM: To implement BCD to Gray Code Convertor in Logisim
Simulator
Theory: -
Implementation:
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 7
AIM: To implement Full Adder and Half Adder in Logisim Simulator.
Theory: -
● HALF ADDER
● FULL ADDER
Implementation:
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Digital Fundamentals (BE03000071) Sem 3
Faculty Signature
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Digital Fundamentals (BE03000071) Sem 3
Practical 8
AIM: To implement Full Subtractor and Half Subtractor in Logisim
Simulator
● HALF SUBTRACTR
● FULL SUBTRACTOR
Implementation:
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Digital Fundamentals (BE03000071) Sem 3
Faculty Signature
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Digital Fundamentals (BE03000071) Sem 3
Practical 9
AIM: To implement four bit by three-bit binary multiplier
Theory:
Implementation:
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 10
AIM: To implement BCD adder in Logisim simulator
Theory:
Implementation:
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 11
AIM: To implement Magnitude Comparator in Logisim Simulator
Theory:
Implementation:
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 12
AIM: To implement 3 X 8 decoder in Logisim Simulator
Theory:
Implementation:
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 13
AIM: To implement 4 X 16 decoder with the help of 3 X 8 decoder
Theory:
Implementation:
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 14
AIM: Draw Combinational circuit diagram for Full Adder and Full
Subtractor using decoder
● FULL ADDER USING 3X8 DECODER
● FULL SUBTRACTOR USING 3X8 DECODER
Implementation
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 15
AIM: To implement 8 X 1 Multiplexer in Logisim Simulator
Theory:
Implementation
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 16
AIM: To implement Boolean function
Theory:
F (a, b, c, d) = ∑(0,2,5,8,10,14) with a multiplexer
D0 D1 D2 D3 D4 D5 D6 D7
2
A’
0 1 2 3 4 5 6 7
A 8 9 10 11 12 13 14 15
Mux i/p 1 0 1 0 0 A’ A 0
F(a, b, c, d) = π (2,6,11) with a multiplexer
D0 D1 D2 D3 D4 D5 D6 D7
2
A’
0 1 2 3 4 5 6 7
A 8 9 10 11 12 13 14 15
Mux i/p 1 1 A A’ 1 1 A 1
c) F (a, b, c, d) = ∑(1,3,4,11,12,13,14,15) with a multiplexer.
D0 D1 D2 D3 D4 D5 D6 D7
2
A’
0 1 2 3 4 5 6 7
A 8 9 10 11 12 13 14 15
Mux i/p 0 A’ 0 1 1 A A A
Implementation: -
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Digital Fundamentals (BE03000071) Sem 3
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 17
AIM: Design 5 to 32 line decoder using basic decoders
Theory:
Implementation
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 18
AIM: Design parallel adder circuit which can decrement
given input value
Theory:
Implementation
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 19
AIM: Design the circuit diagram which can explain the cascading
concept in De-multiplexer
Theory:
Implementation
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 20
AIM: Design the circuit diagram which can explain the cascading
concept in Multiplexer
Theory:
Implementation
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 21
AIM: Design the circuit diagram which can explain the utility of
MUX-DEMUX
Theory:
Implementation
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 22
AIM: Design the circuit diagram to show a common
adder-cum-subtraction
Theory:
Implementation
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 23
AIM: Explain the working of all the following flip flop in Logisim
simulator a) S-R flip flop b) D flip flop c) J-K flip flop d) T flip flop
● S-R FLIP FLOP
● D FLIP FLOP
● J-K flip flop
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Digital Fundamentals (BE03000071) Sem 3
● T flip flop
TRUTH TABLE
Implementation
Faculty Signature
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Digital Fundamentals (BE03000071) Sem 3
Practical 24
AIM: Design master slave flip flop (using every flip flops)
SR-MASTER SLAVE
JK-MASTER SLAVE
D-MASTER SLAVE
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Digital Fundamentals (BE03000071) Sem 3
T-MASTER SLAVE
TRUTH TABLE
Implementation
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 25
AIM: Prepare J-K, D and T flip flop using S-R Flip flop
Theory: -
Implementation
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 26
AIM: Prepare S-R, D and T flip flop using J-K Flip flop
Theory: -
Implementation
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 27
AIM: Prepare J-K, S-R and T flip flop using D Flip flop
Theory: -
Implementation
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 28
AIM; Prepare J-K, D and S-R flip flop using T Flip flop
Theory: -
Implementation
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 29
AIM: Prepare a sequential circuit diagram to explore the
functionality of given state diagram
Theory: -
Implementation
Faculty Signature
Enrolment No: - Page No
Digital Fundamentals (BE03000071) Sem 3
Practical 30
AIM: Prepare a sequential circuit diagram using D flip flop of the
given state diagram
Implementation
Faculty Signature
Enrolment No: - Page No
