THE QUAIDE MILLETH COLLEGE FOR MEN

THE QUAIDE MILLETH COLLEGE FOR MEN – SHIFT II

MEDAVAKKAM, CHENNAI – 100
DEPARTMENT OF COMPUTER APPLICATIONS
MICROPROCESSOR AND ITS APPLICATIONS - SAZ3B
QUESTION BANK & ANSWER KEY

1. What are the various registers in 8085?

- Accumulator register, Temporary register, Instruction register, Stack Pointer,
Program Counter are the various registers in 8085.

2. In 8085 name the 16 bit registers?

- Stack pointer and Program counter all have 16 bits.

3. What are the various flags used in 8085?

- Sign flag, Zero flag, Auxillary flag, Parity flag, Carry flag.

4. What is Stack Pointer?

- Stack pointer is a special purpose 16-bit register in the Microprocessor, which
holds the address of the top of the stack.

5. What is Program counter?

- Program counter holds the address of either the first byte of the next
instruction to be fetched for execution or the address of the next byte of a multi
byte instruction, which has not been completely fetched. In both the cases it gets
incremented automatically one by one as the instruction bytes get fetched. Also
Program register keeps the address of the next instruction.

6. Which Stack is used in 8085?

- LIFO (Last In First Out) stack is used in 8085.In this type of Stack the last stored
information can be retrieved first.

7. What happens when HLT instruction is executed in processor?

- The Micro Processor enters into Halt-State and the buses are tri-stated.

8. What is meant by a bus?

- A bus is a group of conducting lines that carriers data, address, & control
signals.

9. What is Tri-state logic?

- Three Logic Levels are used and they are High, Low, High impedance state. The
high and low are normal logic levels & high impedance state is electrical open
circuit conditions. Tri-state logic has a third line called enable line.
THE QUAIDE MILLETH COLLEGE FOR MEN

10. Give an example of one address microprocessor?

- 8085 is a one address microprocessor.

11. In what way interrupts are classified in 8085?

- In 8085 the interrupts are classified as Hardware and Software interrupts.

12. What are Hardware interrupts?

- TRAP, RST7.5, RST6.5, RST5.5, INTR.

13. What are Software interrupts?

- RST0, RST1, RST2, RST3, RST4, RST5, RST6, RST7.

14. Which interrupt has the highest priority?

- TRAP has the highest priority.

15. Name 5 different addressing modes?

- Immediate, Direct, Register, Register indirect, Implied addressing modes.

16. How many interrupts are there in 8085?

- There are 12 interrupts in 8085.

17. What is clock frequency for 8085?

- 3 MHz is the maximum clock frequency for 8085.

18. What is the RST for the TRAP?

- RST 4.5 is called as TRAP.

19. In 8085 which is called as High order / Low order Register?

- Flag is called as Low order register & Accumulator is called as High order
Register.

20. What are input & output devices?

- Keyboards, Floppy disk are the examples of input devices. Printer, LED / LCD
display, CRT Monitor are the examples of output devices.

21. Can an RC circuit be used as clock source for 8085?

- Yes, it can be used, if an accurate clock frequency is not required. Also, the
component cost is low compared to LC or Crystal.

22. Why crystal is a preferred clock source?

- Because of high stability, large Q (Quality Factor) & the frequency that doesn’t
drift with aging. Crystal is used as a clock source most of the times.
THE QUAIDE MILLETH COLLEGE FOR MEN

23. Which interrupt is not level-sensitive in 8085?

- RST 7.5 is a raising edge-triggering interrupt.

24. What does Quality factor mean?

- The Quality factor is also defined, as Q. So it is a number, which reflects the loss
of a circuit. Higher the Q, the lower are the losses.

25. What are level-triggering interrupt?

- RST 6.5 & RST 5.5 are level-triggering interrupts

26. Which Stack is used in 8085?

LIFO (Last In First Out) stack is used in 8085.In this type of Stack the last stored
information.

27. What are the various registers in 8085?

Accumulator register, Temporary register, Instruction register, Stack Pointer,
Program Counter are the various registers in 8085.

28. What are the various registers in 8085?

Accumulator register, Temporary register, Instruction register, Stack Pointer,
Program Counter are the various registers in 8085.

29. In 8085 name the 16 bit registers?

Stack pointer and Program counter all have 16 bits.

30. What is Stack Pointer?

Stack pointer is a special purpose 16-bit register in the Microprocessor, which
holds the address of the top.

31. Which Stack is used in 8086?

FIFO (First In First Out) stack is used in 8086.In this type of Stack the first stored
information is retrieved.

32. How can I handle a destructor that fails?

Write a message to a log-file. But do not throw an exception. The C++ rule is that
you must never throw.

33. In what way interrupts are classified in 8085?

In 8085 the interrupts are classified as Hardware and Software interrupts.

34.What method is used to place a value onto the top of a stack?

push() method, Push is the direction that data is being added to the stack. push()
member method places a value.
THE QUAIDE MILLETH COLLEGE FOR MEN

35. What is clock frequency for 8085?

3 MHz is the maximum clock frequency for 8085.

36. What is clock frequency for 8085?

3 MHz is the maximum clock frequency for 8085.

37. Give an example of one address microprocessor?

8085 is a one address microprocessor.

38. Give examples for 8 / 16 / 32 bit Microprocessor?

8-bit Processor - 8085 / Z80 / 6800; 16-bit Processor - 8086 / 68000 / Z8000;
32-bit processor - 80386 / 80486

39. What is meant by a bus?

A bus is a group of conducting lines that carriers data, address, & control signals.

40. What are the various registers in 8085?

Accumulator register, Temporary register, Instruction register, Stack Pointer,
Program Counter are the various registers in 8085.

41. Why crystal is a preferred clock source?

Because of high stability, large Q (Quality Factor) & the frequency that doesn’t
drift with aging. Crystal is used as a clock source most of the times.

42. In 8085 which is called as High order / Low order Register?

Flag is called as Low order register & Accumulator is called as High order
Register.

43. Name 5 different addressing modes?

Immediate, Direct, Register, Register indirect, Implied addressing modes.

44. In what way interrupts are classified in 8085?

In 8085 the interrupts are classified as Hardware and Software interrupts.

45. What is the difference between primary & secondary storage device?
In primary storage device the storage capacity is limited. It has a volatile
memory. In secondary storage device the storage capacity is larger. It is a non
volatile memory. Primary devices are: RAM / ROM. Secondary devices are:
Floppy disc / Hard disk.

46. Which Stack is used in 8085?

LIFO (Last In First Out) stack is used in 8085.In this type of Stack the last stored
information can be retrieved first.
THE QUAIDE MILLETH COLLEGE FOR MEN

47. What is Program counter?

Program counter holds the address of either the first byte of the next instruction
to be fetched for execution or the address of the next byte of a multi byte
instruction, which has not been completely fetched. In both the cases it gets
incremented automatically one by one as the instruction bytes get fetched. Also
Program register keeps the address of the next instruction.

48.What is the RST for the TRAP?

RST 4.5 is called as TRAP.

49.What are level-triggering interrupt?

RST 6.5 & RST 5.5 are level-triggering interrupts.

50.Which interrupt is not level-sensitive in 8085?

RST 7.5 is a raising edge-triggering interrupt.

51.What are Software interrupts?

RST0, RST1, RST2, RST3, RST4, RST5, RST6, RST7.

52.What are the various flags used in 8085?

Sign flag, Zero flag, Auxiliary flag, Parity flag, Carry flag.

53.In 8085 name the 16 bit registers?

Stack pointer and Program counter all have 16 bits.

54.What is Stack Pointer?

Stack pointer is a special purpose 16-bit register in the Microprocessor, which
holds the address of the top of the stack.

55.What happens when HLT instruction is executed in processor?

The Micro Processor enters into Halt-State and the buses are tri-stated.

56.What does Quality factor mean?

The Quality factor is also defined, as Q. So it is a number, which reflects the loss
of a circuit. Higher the Q, the lower are the losses.

57. How many interrupts are there in 8085?

There are 12 interrupts in 8085.

58. What is Tri-state logic?

Three Logic Levels are used and they are High, Low, High impedance state. The
high and low are normal logic levels & high impedance state is electrical open
circuit conditions. Tri-state logic has a third line called enable line.
THE QUAIDE MILLETH COLLEGE FOR MEN

59. Which interrupt has the highest priority?

TRAP has the highest priority

60. What are Hardware interrupts?

TRAP, RST7.5, RST6.5, RST5.5, INTR

61. Can an RC circuit be used as clock source for 8085?

Yes, it can be used, if an accurate clock frequency is not required. Also, the
component cost is low compared to LC or Crystal

5 Marks

62. Explain about Counter and time delay in 8085?

It is a procedure used to design a specific delay.

A register is loaded with a number, depending on the time delay required and
then the register is decremented until it reaches zero by setting up a loop with
conditional jump instruction.

Given here is a flowchart depicting the process for making time delays using a
single register in the 8085 Microprocessor.
THE QUAIDE MILLETH COLLEGE FOR MEN

63. Explain about Programming techniques in 8085?

PROGRAMMING TECHNIQUES:

Microprocessor is very fast and accurate in processing the data. It is more

efficient than human beings when it is required to perform the repeated tasks.
To perform repetitions tasks programmer must use different programming
techniques such as looping, indexing etc.

Looping:

Looping is the programming technique which is used to tell the processor to

repeat the task. A loop can be constructed by using jump instructions.
Continuous loops can be constructed by using unconditional jump instructions.
Unless you reset the system continuous loop does not stop repeating the tasks.
For example: modulo ten counter which will be discussed later.

Conditional loops can be constructed by using conditional jump instructions. The

specified tasks will be repeated only when the conditions are met. For example:
the delay loop, which will be discussed in the next section.

INDEXING:

Indexing is the programming technique in which objects will be sorted in a

sequential manner. In this data bytes are stores in memory locations sequentially
& those data bytes are referred to by their memory address.

64. Write a short note on Logical Operation of Micro processor?

COMPARE INSTRUCTIONS: The Compare Register (CMP r) and Compare

Memory (CMP M) instructions compare the contents of the specified byte, either
in a register or in the address contained in the H&L registers, to the contents of
the accumulator. This is accomplished by subtracting the outside byte from the
contents of the accumulator. The contents of the accumulator remain unchanged,
and the actual answer of subtraction is lost. The condition flags are all affected,
and are set to indicate the conditions of the lost answer. Particularly, the Zero
flag, if set on, will indicate that the two values compared are equal, since the
result of subtracting one from the other is zero. Also, the Carry flag will be set if
the value in the A reg is smaller than the outside byte. If neither the Z nor the C
flags are left on, the value in the A register is larger than the outside byte.

COMPARE IMMEDIATE: The Compare Immediate (CPI data) instruction

compares the contents of the accumulator to a fixed value provided by the
second byte of the instruction. The first value must be loaded into the A register
prior to the execution of the instruction. The function occurs by a subtraction
with lost answer, as described above. The contents of the A register are left
unchanged. The condition codes act as above.
THE QUAIDE MILLETH COLLEGE FOR MEN

ROTATE INSTRUCTIONS: The Rotate Left (RLC) and Rotate Right (RRC)
instructions rotate the accumulator’s contents one bit position left or right,
respectively. In the RLC, all the bits move one position to the left; the high order
bit which is shifted out of the A register is moved around to the low order bit
position. It is also moved to the Carry flag. In the RRC, all the bits move one
position to the right; the bit shifted out of the low order position of the A register
is moved around to the high order position. It is also moved to the Carry flag.
Thus, the Carry flag in either case indicates whether a bit was shifted out of the
accumulator. Only the Carry flag is affected by these instructions.

ROTATE THROUGH CARRYS: The Rotate Left through Carry (RAL) and the
Rotate Right through Carry (RAR) instructions rotate the accumulator’s contents
one bit position left or right, respectively. Unlike the rotates above, however,
these instructions use the Carry flag as a ninth bit in the circle. In the RAL, the
bits in the A register are shifted left one position; the high order bit moved to the
Carry flag; the Carry flag is moved to the low order position of the A register. In
the RAR, the bits in the A register are shifted right one position; the low order bit
is moved to the Carry flag; the Carry flag is moved to the high order position of
the A register. Only the Carry flag is affected.

65. Explain about data transfer operations in Microprocessor?

Following is the table showing the list of Data-transfer instructions with their
meanings.

Opcode Operand Meaning Explanation

This
instruction
copies the
contents of
Rd, Sc Copy from the the source
MOV source (Sc) to register into
M, Sc
the the
Dt, M destination(Dt) destination
register
without any
alteration.

Example −
THE QUAIDE MILLETH COLLEGE FOR MEN

MOV K, L

The 8-bit
data is
stored in the
Rd, data Move destination
MVI immediate 8- register or
M, data bit memory.

Example −
MVI K, 55L

The contents
of a memory
location,
specified by
a 16-bit
address in
16-bit Load the
LDA the operand,
address accumulator
are copied to
the
accumulator.

Example −
LDA 2034K

The contents
of the
designated
register pair
Load the
B/D Reg. point to a
LDAX accumulator
pair memory
indirect location.
This
instruction
copies the
contents of
THE QUAIDE MILLETH COLLEGE FOR MEN

that memory
location into
the
accumulator.

Example −
LDAX K

The
instruction
loads 16-bit
data in the
register pair
Load the
Reg. pair, 16- designated
LXI register pair
bit data in the
immediate
register or
the memory.

Example −
LXI K, 3225L

The
instruction
copies the
contents of
the memory
location
pointed out
16-bit Load H and L by the
LHLD
address registers direct address into
register L
and copies
the contents
of the next
memory
location into
register H.
 THE QUAIDE MILLETH COLLEGE FOR MEN

Example −
LHLD 3225K

The contents
of the
accumulator
are copied
into the
memory
location
specified by
the operand.

This is a 3-
byte
16-bit instruction,
STA 16-bit address
address the second
byte
specifies the
low-order
address and
the third
byte
specifies the
high-order
address.

Example −
STA 325K

66. Explain about binary to BCD conversion in 8085?

Source Program:

LXI SP, 27FFH : Initialize stack pointer

LDA 6000H : Get the binary number in accumulator
CALL SUBROUTINE : Call subroutine
HLT : Terminate program execution
 THE QUAIDE MILLETH COLLEGE FOR MEN

Subroutine to convert binary number into its equivalent BCD number:

PUSH B : Save BC register pair contents

PUSH D : Save DE register pair contents
MVI B, 64H : Load divisor decimal 100 in B register
MVI C, 0AH : Load divisor decimal 10 in C register
MVI D, 00H : Initialize Digit 1
MVI E, 00H : Initialize Digit 2
STEP1: CMP B : Check if number < Decimal 100
JC STEP 2 : if yes go to step 2
SUB B : Subtract decimal 100
INR E : update quotient
JMP STEP 1 : go to step 1
STEP2: CMP C : Check if number < Decimal 10
JC STEP 3 : if yes go to step 3
SUB C : Subtract decimal 10
INR D : Update quotient
JMP STEP 2 : Continue division by 10
STEP3: STA 6100H : Store Digit 0
MOV A, D : Get Digit 1
STA 6101H : Store Digit 1
MOV A, E : Get Digit 2
STA 6102H : Store Digit 2
POP D : Restore DE register pair
POP B : Restore BC register pair

67. Binary to ASCII conversion in 8085?

Source program:

LXI SP, 27FFH : Initialize stack pointer

LXI H, 2000H : Source memory pointer
LXI D, 2200H : Destination memory pointer
MVI C, O5H : Initialize the counter
BACK: MOV A, M : Get the number
CALL ASCII : Call subroutine ASCII
STAX D : Store result
INX H : Increment source memory pointer
INX D : Increment destination memory pointer
DCR C : Decrement count by 1
CJNZ : if not zero, repeat
HLT : Stop program execution subroutine ASCII
ASCII: CPI, OAH : Check if number is OAR
JNC NEXT : If yes go to next otherwise continue
ADI 30H
JMP LAST
NEXT: ADI 37H
LAST: RET : Return to main program
 THE QUAIDE MILLETH COLLEGE FOR MEN

68. Explain about Hexadecimal counter in 8085?

Source Program:

LXI SP, 27FFH : Initialize stack pointer

MVI C, OOH : Initialize counter
BACK: CALL Display : Call display subroutine
CALL Delay : Call delay subroutine
INR C : Increment counter
MOV A, C
CPI OOH : Check counter is > FFH
JNZ BACK : If not, repeat
HLT : Stop
Delay Subroutine:
Delay: LXI B, count : Initialize count
BACK: DCX D : Decrement count
MOV A, E
ORA D : Logically OR D and E
JNZ BACK : If result is not 0 repeat
RET : Return to main program

69. Explain about dynamic debugging in 8085?

DYNAMIC DEBUGGING:

Checking for logical and syntax errors in the program is called as debugging.

TYPES:
1.STATIC
2.DYNAMIC

STATIC DEBUGGING:

Checking for errors in the program manually using paper and pencil is known as static
debugging.

DYNAMIC DEBUGGING:

Checking for errors in the program by observing the execution of instructions is called
as dynamic DEBUGGING.

TOOLS FOR DYNAMIC DEBUGGING:

1. SINGLE STEP
2.REGISTER EXAMINE
3.BREAK POINT
 THE QUAIDE MILLETH COLLEGE FOR MEN

SINGLE STEP:

Allows you to execute one instruction at a time and observe the results of each
instruction.
A Single step facility is built with a hard wired logic circuit.
By pressing Single-step key in the microprocessor ,able to observe addresses and codes
as they are executed.
Single-step technique will be able to spot
incorrect address
incorrect jump locations for loops
incorrect data or missing codes.
To effectively use this technique reduce the number of loops and delay counts
to minimum number.
Better to use this technique for short programs.
This technique helps to infer the flag status by observing the execution of jump
instructions.

REGISTER EXAMINE:

Register Examine Key in the microprocessor allows to examine the contents of the
microprocessor register.
By pressing appropriate keys,the monitor program displays the contents of the
registers.
This technique is used in conjunction with either the single step or break point facilities.
After executing a block of instructions ,we can examine the register contents of the
program at a critical juncture and compare the contents with the expected outcomes.

BREAK POINT:

Breakpoint facility is a software routine that allows to execute a program in sections.

The break point in a program can be set in a program using RST instructions.
When we push the EXECUTE key, program will be executed until the Breakpoint, using
monitor we can check the registers for expected results.
If the segment of the program found satisfactory, a second breakpoint can be set at a
subsequent memory address to debug the next segment of the program.
With Breakpoint facility we can isolate the segment of the program with errors.
Then that segment of the program can be debugged with the single step facility.
The break point technique can be used to check out the timing loop, I/O section and
Interrupts.
 THE QUAIDE MILLETH COLLEGE FOR MEN

10 Marks

70. Explain about Pin diagram of 8085?

8085 Microprocessor

4 Pin Diagrams of 8085

Fig: pin diagram of 8085

8085 up is an 8-bit general purpose microprocessor capable of addressing 64Kb
of memory.
The device has 40 pins,+5 V power supply, operate on 3 to 5 MHZ frequency
single phase clock.
All the signals can be classified in 8085 up pin diagram into six groups –
1) Address Bus: in this 16 signals lines. These lines are splits into two segments
a) A15-A8 – unidirectional and used for the higher order address (MSB).
b) AD7-AD0 – Dual purpose such as data bus as well as lower address data
bus(LSB).
THE QUAIDE MILLETH COLLEGE FOR MEN

2) Control and status signals: these signals are used to identify the nature of
operation.
Three control signals that are-
RD – it is a active low signal. Which indicate that the selected IO or Memory
device is to be read and data is available on the data bus.
WR-it is a active low signal which indicate that the data on the data bus are to be
written into a selected memory or IO location.
ALE- it is a +ve going pulse generated every time the 8085 begins an operation
(machine cycle): which indicate that the bits on AD7-AD0are address bits.
Three status signals that are –
IO/M- this is a status signal used to differentiate between IO and Memory
operations. When it is high then IO operation and When it is low then Memory
operation.
S1 and S0- status signals, similar to IO/M, can identify various operations. that
are rarely used in the systems.

71. Explain about Bus Architecture of 8085?

The microprocessor MPU performs various operations with peripheral devices

or a memory location by using three sets of communication lines called buses:
the address bus, the data bus and the control bus. And these three combined
lines is called as system bus.

The 8085 Bus Structure

Address bus:

The address bus is a group of 16 lines generally called as A0 – A15 to carry a 16-
bit address of memory location.
In a computer system, each peripheral or memory location is identified by a
binary number called an address. This is similar to the postal address of a house.
The address bus is unidirectional, that means bit flow in only one direction from
MPU to peripheral.
MPU carries 16-bit address i.e. 216 = 65,536 or 64K memory locations.
THE QUAIDE MILLETH COLLEGE FOR MEN

Data Bus:

The data bus is a group of eight bidirectional lines used for data flow in both the
directions between MPH and peripheral devices.
The 8 data lines are manipulating 8-bit data ranging from 00 to FF i.e.
(28 = 256) numbers from 0000 0000 -1111 1111
This 8 bit data is called as word length and the register size of a microprocessor
and MPH is called 8–bit microprocessor.

Control bus:

Control bus is having various single lines used for sending control signals in the
form of pulse to the memory and I/O devices.
The MPU generates specific control signals to perform a particular operations.
Some of these control signals are memory read, memory write, I/O read and I/O
write.

72. Explain about Programming model of 8085?

The 8085 programming model includes six registers, one accumulator, and one
flag register, Figure. In addition, it has two 16-bit registers: the stack pointer and
the program counter. They are described briefly as follows.

Register Diagram

Registers
The 8085 has six general-purpose registers to store 8-bit data; these are
identified as B,C,D,E,H, and L as shown in the figure. They can be combined as
register pairs - BC, DE, and HL - to perform some 16-bit operations. The
programmer can use these registers to store or copy data into the registers by
using data copy instructions.
THE QUAIDE MILLETH COLLEGE FOR MEN

Accumulator
The accumulator is an 8-bit register that is a part of arithmetic/logic unit (ALU).
This register is used to store 8-bit data and to perform arithmetic and logical
operations. The result of an operation is stored in the accumulator. The
accumulator is also identified as register A.
ACCUMULATOR A (8) FLAG REGISTER
B (8)
D (8)
H (8)
Stack Pointer (SP) (16)
Program Counter (PC) (16)
C (8)
E (8)
L (8)
Data Bus Address Bus
8 Lines Bidirectional 16 Lines unidirectional

Flags
The ALU includes five flip-flops, which are set or reset after an operation
according to data conditions of the result in the accumulator and other registers.
They are called Zero(Z), Carry (CY), Sign (S), Parity (P), and Auxiliary Carry (AC)
flags; their bit positions in the flag register are shown in the Figure below. The
most commonly used flags are Zero, Carry, and Sign. The microprocessor uses
these flags to test data conditions.

Flags

For example, after an addition of two numbers, if the sum in the accumulator id
larger than eight bits, the flip-flop uses to indicate a carry -- called the Carry flag
(CY) -- is set to one. When an arithmetic operation results in zero, the flip-flop
called the Zero(Z) flag is set to one. The first Figure shows an 8-bit register,
called the flag register, adjacent to the accumulator. However, it is not used as a
register; five bit positions out of eight are used to store the outputs of the five
flip-flops. The flags are stored in the 8-bit register so that the programmer can
examine these flags (data conditions) by accessing the register through an
instruction.
These flags have critical importance in the decision-making process of the
microprocessor. The conditions (set or reset) of the flags are tested through the
software instructions. For example, the instruction JC (Jump on Carry) is
implemented to change the sequence of a program when CY flag is set. The
thorough understanding of flag is essential in writing assembly language
programs.
THE QUAIDE MILLETH COLLEGE FOR MEN

Program Counter (PC)

This 16-bit register deals with sequencing the execution of instructions. This
register is a memory pointer. Memory locations have 16-bit addresses, and that
is why this is a 16-bit register.
The microprocessor uses this register to sequence the execution of the
instructions. The function of the program counter is to point to the memory
address from which the next byte is to be fetched. When a byte (machine code) is
being fetched, the program counter is incremented by one to point to the next
memory location.

Stack Pointer (SP)

The stack pointer is also a 16-bit register used as a memory pointer. It points to a
memory location in R/W memory, called the stack. The beginning of the stack is
defined by loading 16-bit address in the stack pointer.
This programming model will be used in subsequent tutorials to examine how
these registers are affected after the execution of an instruction.

73. Explain about Instruction classification of 8085?

An instruction is a binary pattern designed inside a microprocessor to perform a

specific function. The entire group of instructions, called the instruction set,
determines what functions the microprocessor can perform. These instructions
can be classified into the following five functional categories: data transfer (copy)
operations, arithmetic operations, logical operations, branching operations, and
machine-control operations.

Data Transfer (Copy) Operations

This group of instructions copy data from a location called a source to another
location called a destination, without modifying the contents of the source. In
technical manuals, the term data transfer is used for this copying function.
However, the term transfer is misleading; it creates the impression that the
contents of the
Source are destroyed when, in fact, the contents are retained without any
modification. The various types of data transfer (copy) are listed below together
with examples of each type:
Arithmetic Operations
These instructions perform arithmetic operations such as addition, subtraction,
increment, and decrement.

Addition - Any 8-bit number, or the contents of a register or the contents of a

memory location can be added to the contents of the accumulator and the sum is
stored in the accumulator. No two other 8-bit registers can be added directly
(e.g., the contents of register B cannot be added directly to the contents of the
THE QUAIDE MILLETH COLLEGE FOR MEN

register C). The instruction DAD is an exception; it adds 16-bit data directly in
register pairs.

Subtraction - Any 8-bit number, or the contents of a register, or the contents of a

memory location can be subtracted from the contents of the accumulator and the
results stored in the accumulator. The subtraction is performed in 2's
compliment, and the results if negative, are expressed in 2's complement. No two
other registers can be subtracted directly.

Increment/Decrement - The 8-bit contents of a register or a memory location

can be incremented or decrement by 1. Similarly, the 16-bit contents of a register
pair (such as BC) can be incremented or decrement by 1. These increment and
decrement operations differ from addition and subtraction in an important way;
i.e., they can be performed in any one of the registers or in a memory location.

74. Explain about DMA Controller of 8085?

During any given bus cycle, one of the system components connected to the
system bus is given control of the bus. This component is said to be the master
during that cycle and the component it is communicating with is said to be the
slave. The CPU with its bus control logic is normally the master, but other
specially designed components can gain control of the bus by sending a bus
request to the CPU. After the current bus cycle is completed the CPU will return a
bus grant signal and the component sending the request will become the master.

Taking control of the bus for a bus cycle is called cycle stealing. Just like the bus
control logic, a master must be capable of placing addresses on the address bus
and directing the bus activity during a bus cycle. The components capable of
becoming masters are processors (and their bus control logic) and DMA
controllers. Sometimes a DMA controller is associated with a single interface, but
they are often designed to accommodate more than one interface.

The 8086 microprocessor receives bus requests through its HOLD pin and issues
grants from the hold acknowledge (HLDA) pin. A request is made when a
potential master sends a 1 to the HOLD pin. Normally, after the current bus cycle
is complete the 8086 will respond by putting a 1 on the HLDA pin. When the
requesting device receives this grant signal it becomes the master. It will remain
master until it drops the signal to the HOLD pin, at which time the 8086 will drop
the grant on the HLDA pin. One exception to the normal sequence is that if a
word, which begins at an odd address is being accessed, then two bus cycles are
required to complete the transfer and a grant will not be issued until after the
second bus cycle.

When a DMA controller becomes master it places an address on the address bus
and sends the interface the necessary signals to cause it to put data on, or receive
data from, the data bus. Since the DMA controller determines when the bus
request is dropped, it can return control to the CPU after each data byte is
 THE QUAIDE MILLETH COLLEGE FOR MEN

transferred and then request control again when the next data byte is ready, or it
can retain control until the entire block is moved. The former is the usual case
because this allows the CPU to continue its work until the next data byte is
available.

During a block input byte transfer, the following sequence occurs as the data byte
is sent from the interface to the memory:

1. The interface sends the DMA controller a request for DMA service.
2. A Bus request is made to the HOLD pin (active High) on the 8086
microprocessor and the controller gains control of the bus.
3. A Bus grant is returned to the DMA controller from the Hold Acknowledge
(HLDA) pin (active High) on the 8086 microprocessor.
4. The DMA controller places contents of the address register onto the address bus.
5. The controller sends the interface a DMA acknowledgment, which tells the
interface to put data on the data bus. (For an output it signals the interface to
latch the next data placed on the bus.)
6. The data byte is transferred to the memory location indicated by the address bus.
7. The interface latches the data.
8. The Bus request is dropped, the HOLD pin goes Low, and the controller
relinquishes the bus.
9. The Bus grant from the 8086 microprocessor is dropped and the HLDA pin goes
Low.
The address register is incremented by 1.
The byte count is decremented by 1.
If the byte count is non-zero, return to step 1, otherwise stop.
THE QUAIDE MILLETH COLLEGE FOR MEN

75. Explain about Interrupts in 8085?

NEED FOR INTERRUPTS
Interrupt is a signal send by an external device to the processor, to the processor
to perform a particular task or work. Mainly in the microprocessor based system
the interrupts are used for data transfer between the peripheral and the
microprocessor.
When a peripheral is ready for data transfer, it interrupts the processor by
sending an appropriate signal to the interrupt pin of the processor. If the
processor accepts the interrupt then the processor suspends its current activity
and executes an interrupt service subroutine to complete the data transfer
between the peripheral and processor. After executing the interrupt service
routine the processor resumes its current activity. This type of data transfer
scheme is called interrupt driven data transfer scheme.

TYPES OF INTERRUPTS
The interrupts are classified into software interrupts and hardware interrupts.
• The software interrupts are program instructions. These instructions are
inserted at desired locations in a program. While running a program, lf a
software interrupt instruction is encountered, then the processor executes an
interrupt service routine (ISR).
• The hardware interrupts are initiated by an external device by placing an
appropriate signal at the interrupt pin of the processor. If the interrupt is
accepted, then the processor executes an interrupt service routine (ISR).

SOFTWARE INTERRUPTS OF 8085

The software interrupts are program instructions. When the instruction is
executed, the processor executes an interrupt service routine stored in the vector
address of the software interrupt instruction. The software interrupts of 8085
are RST 0, RST 1, RST 2, RST 3, RST 4, RST 5, RST 6 and RST 7.
The vector addresses of software interrupts are given in table below.
THE QUAIDE MILLETH COLLEGE FOR MEN

The software interrupt instructions are included at the appropriate (or required)
place in the main program. When the processor encounters the software
instruction, it pushes the content of PC (Program Counter) to stack. Then loads
the Vector address in PC and starts executing the Interrupt Service Routine (ISR)
stored in this vector address. At the end of ISR, a return instruction - RET will be
placed. When the RET instruction is executed, the processor POP the content of
stack to PC. Hence the processor control returns to the main program after
servicing the interrupt. Execution of ISR is referred to as servicing of interrupt.

All software interrupts of 8085 are vectored interrupts. The software interrupts
cannot be masked and they cannot be disabled. The software interrupts are
RST0, RST1, … RST7 (8 Nos).

HARDWARE INTERRUPTS OF 8085

An external device, initiates the hardware interrupts of 8O85 by placing an

appropriate signal at the interrupt pin of the processor. The processor keeps on
checking the interrupt pins at the second T -state of last machine cycle of every
instruction. If the processor finds a valid interrupt signal and if the interrupt is
unmasked and enabled, then the processor accepts the interrupt. The acceptance
of the interrupt is acknowledged by sending an INTA signal to the interrupted
device.

The processor saves the content of PC (program Counter) in stack and then loads
the vector address of the interrupt in PC. (If the interrupt is non-vectored, then
the interrupting device has to supply the address of ISR when it receives INTA
signal). It starts executing ISR in this address. At the end of ISR, a return
instruction, RET will be placed. When the processor executes the RET
instruction, it POP the content of top of stack to PC.

Thus the processor control returns to main program after servicing interrupt.
The hardware interrupts of 8085 are TRAP, RST 7.5, RST 6.5, RST 5.5 and INTR.
Further the interrupts may be classified into VECTORED / NON-VECTORED and
MASKABLE / NON-MASKABLE INTERRUPTS.

76. Explain about stack and subroutine?

The stack is an area of memory identified by the programmer for temporary

storage of information.

• The stack is a LIFO structure. – Last In First Out.

• The stack normally grows backwards into memory. In other words, the
programmer defines the bottom of the stack and the stack grows up into
reducing address range.
THE QUAIDE MILLETH COLLEGE FOR MEN

Given that the stack grows backwards into memory, it is customary to place the
bottom of the stack at the end of memory to keep it as far away from user
programs as possible.

• In the 8085, the stack is defined by setting the SP (Stack Pointer) register.

• LXI SP, FFFFH

• This sets the Stack Pointer to location FFFFH (end of memory for the 8085).

• The Size of the stack is limited only by the available memory Information is
saved on the stack by PUSHing it on. – It is retrieved from the stack by POPing it
off.

• The 8085 provides two instructions: PUSH and POP for storing information on
the stack and retrieving it back. – Both PUSH and POP work with register pairs
ONLY.

PUSH B (1 Byte Instruction) – Decrement SP – Copy the contents of register B to

the memory location pointed to by SP – Decrement SP – Copy the contents of
register C to the memory location pointed to by SP

POP D (1 Byte Instruction) – Copy the contents of the memory location pointed
to by the SP to register E – Increment SP – Copy the contents of the memory
location pointed to by the SP to register D – Increment SP

The 8085 recognizes one additional register pair called the PSW (Program Status
Word). – This register pair is made up of the Accumulator and the Flags registers.

• It is possible to push the PSW onto the stack, do whatever operations are
needed, then POP it off of the stack. – The result is that the contents of the
Accumulator and the status of the Flags are returned to what they were before
the operations were executed.