Department of Electronics and Communication Engineering
BMS College of Engineering, Bengaluru – 19
(Autonomous College under VTU)
Course Title HDL PROGRAMMING
Course Code 23EC3ESHDL Credits 3 L–T–P 3:0:0
CIE 50 Marks (100% weightage) SEE 100 Marks (50% weightage)
Course outcomes: At the end of the course, the student will have the ability to:
Sl. No. Course Outcomes PO PSO
CO1 Apply the knowledge of HDL for modeling and functional verification of 1 3
Digital circuits.
CO2 Analyze digital circuits using suitable Verilog HDL modeling. 2 3
CO3 Design and synthesize a digital circuit for complex systems using Verilog 3 3
HDL and state machines.
UNIT – I
Introduction: VLSI design flow, importance of HDLs, Verilog HDL and Design Methodologies, mod-
ules, instances, components of simulation, example, basic concepts. Modules and ports: Modules, ports,
Rules.
UNIT – II
Gate Level Modeling: Gate Types, Gate Delays, Examples. Dataflow Modeling: Continuous assignment,
Delays, Expressions, Operators, Operands, Operator Types, and Examples.
UNIT – III
Behavioral Modeling: Structured procedure, procedural assignments, timing control, conditional state-
ments, multi-way branching, loops, sequential and parallel blocks, generate blocks, Examples.
UNIT – IV
Logic Synthesis with Verilog HDL: Logic synthesis, Verilog HDL Synthesis, Interpretation of Verilog
Constructs, Synthesis Design flow, examples, verification of the gate-level netlist, modeling tips for logic
synthesis.
4
Department of Electronics and Communication Engineering
UNIT – V
Synchronous sequential circuits: Moore and Mealy FSM, Design and implementation of sequence de-
tector, serial adder, code converter. FPGA based systems: Introduction, basic concepts, Digital design
with FPGAs, FPGA based system design.
Choice: Unit-III and Unit-V
Text Books:
1. “Verilog HDL-A Guide to Digital Design and Synthesis,” Sameer Palnitkar, 2nd Edition, Pearson
Edition 2003.
Reference Books:
1. “Fundamentals of Digital Logic with Verilog Design,” Stephan Brown and Zvonk Vranesic, 2nd
Edition, McGraw-Hill, 2008.
E-Books:
1. http://access.ee.ntu.edu.tw/course/dsd_99second/2011_lecture/W2_HDL_Funda
mentals_2011-03-02.pdf
2. http://www.ics.uci.edu/œalexv/154/VHDL-Cookbook.pdf
3. http://ece.niu.edu.tw/œchu/download/fpga/verilog.pdf
MOOCs:
1. Electronic Design Automation: http://nptel.ac.in/courses/106105083/
2. Digital System Design with PLDs and FPGAs: http://nptel.ac.in/courses/117108040/
3. Fundamentals of HDL (Lecture #008): https://www.youtube.com/watch?v=rdAPXzxeaxs&
index=8&list=PLE3BC3EBC9CE15FB0
