INTEGRATED CIRCUITS

DATA SHEET

TDA1541
Dual 16-bit DAC
Product specification November 1985
File under Integrated Circuits, IC01
Philips Semiconductors Product specification

Dual 16-bit DAC TDA1541

GENERAL DESCRIPTION
The TDA1541 is a monolithic integrated dual 16-bit digital-to-analogue converter (DAC) designed for use in hi-fi digital
audio equipment such as Compact Disc players, digital tape or cassette recorders.

Features
• Selectable two-channel input format: offset binary or two’s complement
• Internal timing and control circuit
• TTL compatible digital inputs
• High maximum input bit-rate and fast settling time.

QUICK REFERENCE DATA

Supply voltages
pin 28 VDD typ. 5 V
pin 26 VDD1 typ. −5 V
pin 15 VDD2 typ. −15 V
Supply currents
pin 28 IDD typ. 45 mA
pin 26 IDD1 typ. 45 mA
pin 15 IDD2 typ. 25 mA
Signal-to-noise ratio
(full scale sine-wave)
at analogue outputs (AOL; AOR) S/N typ. 95 dB
Non-linearity
at Tamb = −20 to +70 °C typ. 1⁄
2 LSB
Current settling time to ± 1 LSB tcs typ. 1 µs
Maximum input bit rate
at data input (pin 3) BRmax min. 6 Mbits/s
Maximum clock frequency
at clock input (pin 2) fBCKmax min. 6 MHz
at clock input (pin 4) fSCKmax min. 12 MHz
Full scale temperature coefficient
at analogue outputs (AOL; AOR) TCFS typ. ± 200 × 10−6 K−1
Operating ambient temperature range Tamb −20 to +70 °C
Total power dissipation Ptot typ. 850 mW

PACKAGE OUTLINE
28-lead DIL; plastic (with internal heat spreader) (SOT-117); SOT117-1; 1996 August 14.

November 1985 2
Philips Semiconductors Product specification

Dual 16-bit DAC TDA1541

Fig.1 Block diagram.

November 1985 3
Philips Semiconductors Product specification

Dual 16-bit DAC TDA1541

PINNING
latch enable input
1 LE/WS*
word select input
2 BCK* bit clock input
data left channel input
3 DATA L/DATA* data input (selected
format)
data right channel input
4 DATA R/SYS*
system clock input
5 GND (A) analogue ground
6 AOR right channel output
7 DECOU
8 DECOU
9 DECOU
10 DECOU decoupling
11 DECOU
12 DECOU
13 DECOU
14 GND (D) digital ground
15 VDD2 −15 V supply voltage
16 n.c. Fig.2 Pinning diagram.
not connected
17 n.c.
18 DECOU
19 DECOU
20 DECOU
21 DECOU decoupling
22 DECOU
23 DECOU
24 DECOU
25 AOL left channel output
26 VDD1 −5 V supply voltage
27 OB/TWC* mode selection input
28 VDD +5 V supply voltage

* See Table 1 data selection input.

November 1985 4
Philips Semiconductors Product specification

Dual 16-bit DAC TDA1541

FUNCTIONAL DESCRIPTION
The TDA1541 accepts input sample formats in time multiplexed mode or simultaneous mode with any bit length.
The most significant bit (MSB) must always be first. This flexible input data format allows easy interfacing with signal
processing chips such as interpolation filters, error correction circuits, pulse code modulation adaptors and audio signal
processors (ASP).
The high maximum input bit-rate and fast settling time facilitates application in 4 × oversampling systems (44,1 kHz to
176,4 kHz) with the associated simple analogue filtering function (low order, linear phase filter).

Input data selection (see also Table 1)

With input OB/TWC connected to ground, data input (offset binary format) must be in time multiplexed mode. It is
accompanied with a word select (WS) and a bit clock input (BCK) signal. A separate system clock input (SCK) is provided
for accurate, jitter-free timing of the analogue outputs AOL and AOR.
With OB/TWC connected to VDD the mode is the same but data format must be in two’s complement.
When input OB/TWC is connected to (VDD1) the two channels of data (L/R) are input simultaneously via (DATA L) and
(DATA R), accompanied with BCK and a latch-enable input (LE). With this mode selected the data must be in offset
binary.
The format of data input signals is shown in figures 3, 4 and 5.
True 16-bit performance is achieved by each channel using three 2-bit active dividers, operating on the dynamic element
matching principle, in combination with a 10-bit passive current-divider, based on emitter scaling. All digital inputs are
TTL compatible.

Input data selection

OB/TWC MODE PIN 1 PIN 2 PIN 3 PIN 4
−5 V simultaneous LE BCK DATA L DATA R
0V time MUX OB WS BCK DATA OB SCK
+5 V time MUX TWC WS BCK DATA TWC SCK

Where:
LE = latch enable
WS = word select
BCK = bit clock
DATA L = data left
DATA R = data right
DATA OB = data offset binary
DATA TWC = data two’s complement
MUX OB = multiplexed offset binary
MUX TWC = multiplexed two’s complement

November 1985 5
Philips Semiconductors Product specification

Dual 16-bit DAC TDA1541

RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Supply voltage ranges
pin 28 VDD 0 to +7 V
pin 26 VDD1 0 to −7 V
pin 15 VDD2 0 to −17 V
Crystal temperature range TXTAL −55 to +150 °C
Storage temperature range Tstg −55 to +150 °C
Operating ambient temperature range Tamb −20 to +70 °C
Electrostatic handling(1) Ves −1000 to +1000 V

Note
1. Discharging a 250 pF capacitor through a 1 kΩ series resistor.

THERMAL RESISTANCE
From junction to ambient Rth j-a = 35 K/W

November 1985 6
Philips Semiconductors Product specification

Dual 16-bit DAC TDA1541

CHARACTERISTICS
VDD = + 5 V; VDD1 = −5 V; VDD2 = −12 V; Tamb = + 25 °C; measured in Fig. 1; unless otherwise specified.

PARAMETER SYMBOL MIN. TYP. MAX. UNIT

Supply
Supply voltage ranges
pin 28 VDD 4,0 5,0 6,0 V
pin 26 −VDD1 4,5 5,0 6,0 V
pin 15 −VDD2 14 15 16 V
Supply currents
pin 28 IDD − 45 tbf mA
pin 26 −IDDI − 45 tbf mA
pin 15 −IDD2 − 25 tbf mA
Resolution Res − 16 − bits
Inputs
Input current (pin 3 and pin 4)
digital inputs LOW (< 0,8 V) IIL − − tbf mA
digital inputs HIGH (> 2,0 V) IIH − − tbf µA
Input frequency
at clock input (pin 4) fSCK − − 12 MHz
at clock input (pin 2) fBCK − − 6 MHz
at data inputs (pin 3 and pin 4) fDAT − − 6 MHz
at word select input (pin 1) fWS − − 200 kHz
Input capacitance of digital inputs CI − 12 − pF
Oscillator
Oscillator frequency
with internal capacitor fosc 150 200 250 kHz
Analogue outputs (AOL; AOR)
Output voltage compliance VOC tbf − tbf mV
Full scale current IFS 3,4 4,0 4,6 mA
Zero scale current ± IZS − tbf − nA
Full scale temperature coefficient
Tamb = −20 to +70 °C TCFS − ± 200 × 10-6 − K−1
Linearity error integral
at Tamb = 25 °C E1 − 0,5 − LSB
at Tamb = −20 to +70 °C E1 − tbf − LSB
Linearity error differential
at Tamb = 25 °C Ed1 − 0,5 1 LSB
at Tamb = −20 to +70 °C Ed1 − tbf − LSB

November 1985 7
Philips Semiconductors Product specification

Dual 16-bit DAC TDA1541

PARAMETER SYMBOL MIN. TYP. MAX. UNIT

Signal -to-noise ratio + THD* S/N 90 95 − dB
Settling time to ± 1 LSB tcs − 1 − µs
Channel separation α 80 tbf − dB
Unbalance between outputs ∆IFS − 0,1 0,2 dB
Time delay between outputs td − − 1 µs
Power supply ripple rejection**
VDD = +5 V RR − tbf − dB
VDD1 = −5 V RR − tbf − dB
VDD2 = −15 V RR − tbf − dB
Signal-to-noise ratio
at bipolar zero S/N − −100 − dB
Timing (see Figs 3, 4 and 5)
Rise time tr − − 35 ns
Fall time tf − − 35 ns
Bit clock cycle time tCY 160 − − ns
Bit clock HIGH time tHB 48 − − ns
Bit clock LOW time tLB 48 − − ns
Bit clock fall time to latch rise time tFBRL 0 − − ns
Bit clock rise time to latch fall time tRBFL 0 − − ns
Data set-up time to bit clock tSDB 32 − − ns
Data hold time to bit clock tHDB 0 − − ns
Data set-up time to system clock tSDS 32 − − ns
Word select hold time to system clock tHWS 0 − − ns
Word select set-up time to system clock tSWS 32 − − ns
Bit clock fall time to system clock rise time tFBRS 32 − − ns
System clock rise time to bit clock fall time tRSFB 32 − − ns
System clock fall time to bit clock rise time tFSRB 50 − − ns
Bit clock rise time to system clock fall time tRBFS 0 − − ns
Latch enable LOW time tLLE 20 − − ns
Latch enable HIGH time tHLE 32 − − ns

* Signal-to-noise ratio + THD with 1 kHz full scale sinewave generated at a sampling rate of 176,4 kHz.
** Vripple = 1% of supply voltage and fripple = 100 Hz.

November 1985 8
Philips Semiconductors Product specification

Dual 16-bit DAC TDA1541

Fig.3 Format of input signals; time multiplexed at fSCK = fBCK (I2S format).

Fig.4 Format of input signals; time multiplexed at fSCK = 2 × fBCK.

November 1985 9
Philips Semiconductors Product specification

Dual 16-bit DAC TDA1541

Fig.5 Format of input signals; simultaneous data.

November 1985 10
Philips Semiconductors Product specification

Dual 16-bit DAC TDA1541

PACKAGE OUTLINE

DIP28: plastic
handbook, full pagewidthdual in-line package; 28 leads (600 mil) SOT117-1
seating plane

D ME

A2 A

L A1

c
Z e w M
b1
(e 1)
b
28 15 MH

pin 1 index

1 14

0 5 10 mm
scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A A1 A2 Z (1)
UNIT max. min. max. b b1 c D (1) E (1) e e1 L ME MH w max.
1.7 0.53 0.32 36.0 14.1 3.9 15.80 17.15
mm 5.1 0.51 4.0 2.54 15.24 0.25 1.7
1.3 0.38 0.23 35.0 13.7 3.4 15.24 15.90
0.066 0.020 0.013 1.41 0.56 0.15 0.62 0.68
inches 0.20 0.020 0.16 0.10 0.60 0.01 0.067
0.051 0.014 0.009 1.34 0.54 0.13 0.60 0.63

Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC EIAJ PROJECTION

92-11-17
SOT117-1 051G05 MO-015AH
95-01-14

November 1985 11
Philips Semiconductors Product specification

Dual 16-bit DAC TDA1541

SOLDERING The device may be mounted up to the seating plane, but

the temperature of the plastic body must not exceed the
Introduction specified maximum storage temperature (Tstg max). If the
There is no soldering method that is ideal for all IC printed-circuit board has been pre-heated, forced cooling
packages. Wave soldering is often preferred when may be necessary immediately after soldering to keep the
through-hole and surface mounted components are mixed temperature within the permissible limit.
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for Repairing soldered joints
printed-circuits with high population densities. In these
Apply a low voltage soldering iron (less than 24 V) to the
situations reflow soldering is often used.
lead(s) of the package, below the seating plane or not
This text gives a very brief insight to a complex technology. more than 2 mm above it. If the temperature of the
A more in-depth account of soldering ICs can be found in soldering iron bit is less than 300 °C it may remain in
our “IC Package Databook” (order code 9398 652 90011). contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
Soldering by dipping or by wave
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

November 1985 12