PRIYADARSHINI BHAGWATI COLLEGE OF ENGINEERING
Session 2022-23
Department of Electronics & Communication Engineering
Semester : VII - Sem Subject : Advanced Digital System Design
Assignment : 2 Topic : Unit 3 and 4
Date of Display : Date of Submission :
Q.No. Question CO BL
1 Explain Assignment statement, concurrent statement and Se- 3 2
quential statement.
2 Write a syntax for ’If-Else’ statement and design a 4:1 MUX us- 3 2 & 5
ing If-Else statement.
3 Design BCD to Seven Segment decoder and write a VHDL code 3 5
for it.
4 Explain’CASE’ statement and write a VHDL code for Full adder 3 1 & 2
using CASE statement.
5 Write a VHDL code for 2:4 decoder using structural description. 3 3
6 Write difference between ’Procedure’ and ’Function’ in VHDL. 4 1&2
7 Design 3:8 a priority encoder using VHDL. 4 5
8 Write a VHDL code for 3-bit ’Up-Counter’. 4 3
9 Explain the various loop statements in VHDL. 4 2
10 Write a VHDL code to detect a sequence ’1101’ using Moore 4 3
Machine.
Dr. P. R. Bokde Dr. D. M. Kate
Subject Teacher HoD