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Computer Architecture-Lecture Note 2

The document discusses the Von Neumann architecture, which is the foundational model for modern computers, highlighting its components and the fetch-execute cycle. It explains the stored-program concept and the system bus model, detailing how data and instructions are processed within a computer. The lecture aims to educate students on these fundamental concepts and their relevance in contemporary computing.
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0% found this document useful (0 votes)
25 views5 pages

Computer Architecture-Lecture Note 2

The document discusses the Von Neumann architecture, which is the foundational model for modern computers, highlighting its components and the fetch-execute cycle. It explains the stored-program concept and the system bus model, detailing how data and instructions are processed within a computer. The lecture aims to educate students on these fundamental concepts and their relevance in contemporary computing.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Computer Architecture

Lecture Two
Topic: Von Neumann model and Fetch-execute cycle
Introduction
Now that you have understood what Computer Architecture is, it is
necessary to examine the Von Neumann architecture, which is the first
computer architecture. The main aim of this lecture is to explain the
Von Neumann architecture, the principle of stored-program concept
and the Fetch-execute cycle.

Objectives
Lecture Objectives
The objectives of this lecture are to teach students:
 What the Von Neumann architecture is,
 What the stored-program concept is,
 How the computer runs a program (fetch-execute cycle) and
 What the system bus model is.

Pre-test
1. Who is the progenitor of modern computing?
2. What was it about the Von Neumann architecture that distinguished it
from its predecessors?
3. Name the characteristics present in a Von Neumann architecture.
4. What are the relationship and differences between the Von Neumann
architecture and the System bus model?
5. How does the fetch-decode-execute cycle work?

Content
Von Neumann Model
In the earliest electronic computing machine, programming was synonymous
with connecting wires and plugs. No layer architecture existed, so
programming was much of a feat of electronic/electrical engineering as it was
an exercise in algorithm design.

John Von Neumann, a Hungarian mathematician (Progenitor of the modern,


electronic PC) invented the architecture for an electronic digital computer
based on the stored-program concept in the 1945. Von Neumann divided a
computer’s hardware into four primary groups:
 A Central Processing unit (CPU) with a control unit(containing
instruction register and program counter), an arithmetic logic unit,
processor registers (small storage areas) ,
 Input/Output mechanism,
 Working storage which is the main memory that holds data and
programs instructions that control the computer operation, and
 Permanent storage which is the massive, external storage (
secondary memory) that holds programs and data that are not
currently needed for execution
Other features/characteristics of the Von Neumann architecture are:
 Capacity to carry out sequential instruction processing,
 Contains a single path, either physically or logically, between the main
storage and the control unit of the CPU, forcing alternation of
instruction and execution cycle. This single path often referred to as a
bus does not allow instruction fetch and data operations to occur at
the same time is often referred to as the Von Neumann bottle neck
which often limits the performance of the system.
This model provided the actual foundation for the modern PC, as Von
Neumann was the first person to construct a computer which had working
storage (what we today call RAM). And the amazing thing is, his model is still
completely applicable today.
The diagram below shows how these features work together in a modern
computer system. Note that all the I/O operations passes through the ALU.
Actually, it passes through the Accumulator in the ALU.

CENTRAL PROCESSING UNIT

Program Counter

Registers
Main

Memory

(RAM)

Control

Unit
ALU

Input/Output

Systems

VON NEUMANN ARCHITECTURE

System Bus Model


The idea presented in Von Neumann architecture have been extended so that
programs and data stored in a slow-to access storage (like hard disk), can
be copied to a fast-access, volatile medium (such as RAM) prior to execution.
The architecture has also been streamlined into what is currently called the
System Bus Model. This is shown below
CPU Memory
(ALU, Registers & Input/ output
(RAM)
Control)

DATA BUS

ADDRESS BUS

CONTROL BUS

A bus is a shared group of wires through which data is transmitted from one
part of the computer to another. Buses are the information highway for the
CPU and other components of the computer system. The three most
important buses are: the Data, Address and Control buses.

The data bus moves data from main memory to CPU registers and vice
versa. The address bus holds the address of the data that the data bus is
currently accessing. The control bus carries the necessary control signals
that specify how the information transfer is to take place.

Other enhancement to the Von Neumann architecture include index register


for addressing, adding floating point data, using interrupts and asynchronous
I/O, adding virtual memory and adding general registers.

THE FETCH-DECODE-EXECUTE CYCLE


This Von Neumann architecture runs programs in what is known as Von
Neumann execution cycle. Note that both inputs (instruction and data) to the
CPU are stored in memory, and the CPU functions by following a cycle of
fetching an instruction, decoding it, and executing it. This process is known
as the fetch-decode-execute cycle and describes of how the machine works.
The cycle is presented below:

1. The cycle begins when the control unit (CU) fetches the next program
instruction from the memory, using the address in the Program Counter
(PC). The PC is the register that holds the address of the next instruction.
2. The instruction decoded by the decoder in the CU into a language that the
ALU understands identifying the operations code (which defines the
operations that bit patterns represents and activate the correct circuitry
to perform the operation) and the operands.
3. Any data required to execute the instruction are fetched from memory
and placed into registers within the CPU
4. The ALU executes the instruction by performing the necessary
mathematical operation and store the result in registers or memory.
5. The cycle begins again with the next instruction. The CPU always knows
where to find the next instruction because the Program Counter holds the
address of the current instruction. Each time an instruction is completed,
the program counter is advanced by one memory location.

Basically, this is the instruction cycle a computer follows to execute a


program.

Summary
Von Neumann architecture provided the foundation for modern
personal computers even though it had the Von Neumann bottleneck.
It provided the basis for the fetch-execute cycle which is still valid till
tomorrow even in the bus model.

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