North South University Department of Electrical & Computer Engineering LAB REPORT- ‘Course Code: ¢SE231L. ‘Course Title: Digital Logie Design [Section: 09 Lab Number: 01 Experiment Name: Experiment Date: 06" Horch, 2024 Date of Submission: 13t) March , 2024 ‘Submitted by Group Number: 02. [Group members: Name @ ‘Obainei Nek] Ofeined ark Simulation 5] | Lab Report (5) 1. Md. Ragho Shuvrif Rofsun | 222247204 2. ® Sudipto Roy 2992756042 3 Shakil Ahmed 2011853042. 4 Munem Bulbul 021314 642. Course Instructor: Omoe Tone Shahid (05D) Submitted To: Pritthika DharFage-o} A. Expervinunt Name * Digitak bogie Gealey ond Boolean Fanetions 2+ Objects 3 Om of the mayor goals of -this lab 15 +e Pamitlarige the skdents atth the prooes equipinene and dechniques ond become Sam) Niarired with cambinationad [Ele ely cuits + "7 shay the basic logic gates such > AND, OR, NOT, NAND, NOR, and X-OR+ a wih jh derription oF Avecdh tables, logic Algebra - +S get ocaueinte boslean fenctions usin Aign ems ond Beelean ae 7404 Hex devertex (NOT acter)» pl. 2 et or gate, cinpek KOR gmers Quadruple z-inpuk 3. Appovotas + Ee F43R Quo dtu ge 74ts Quadruple 2 Trosne Board 2IG TAO NAND gate 4. Theoty *¢ We vrew logic getter ase the elementory fou laing blocks of digit Ureuits . By Perfor ming one of mote Logica inpuby , ie produces a Single output Digitek logic gates operate ok 490 neretea voltogr levels rreprosentings the es] valuey © Chogi car Low) and A( begicak High). Now tthe tue ond False stotemards , off stote WIN be considered False ond On Statepage 02 will be eonsideyed ‘We. O-> off > F = OY 4 —20n > T7595 Experiment -1 * Our titat experiment was do check, and verify the fundonardal logic gotey onc also Oriversal gate Wee NAND gate , Nor gate ond a speciak gake yok gota. To verity their death teble we We % np. voaich + En this boord We took on ore fs © voltage which nosHort Hod power howre ond Krom “the also implie off —stete ane oncthit Wo BY Which tmpin 4 On Stade We alse asnnect the te +e the Aoimar voord ond Fox input we ook two wire and eonrwet ther with too switeh + For out output ceetion »te chock cohother we get out expestect output OF ee acoeel aah wire emnnerto th ye oceorcting +o the logic gate oma onothat nck connart +e dns ootont LEO Settos. =)- => AND OR NOTp4ge-03 —)-=p- ab- NAND NOR x OR A lp FzA J [4 7 =A:8 | €-ase| pecan) |p = aoe) Fecono -——___ sefo fot fot | fe a] { tot titi fe pet oT | Thy \ \ \ 0 ° | \ \ oO o | © avle: Truth table of logic gore his seeond excertment we Med Experiment 02% An and Binpvk OF gate As we Zinout AND gote yews in tne frath able of pnd gote, 15 ome week ts 0 rhen the oukput will also oe o Sort creo owerk +7 ne dmee input must be 4° Ager gn the OF gore ayuth table , ve now thot eS) ow papuk iB ahi the Fingh oodpnk weit! algo PE 4 and iv om gate ohn all the aman the final output yneee Input ie O07 need 4 too But to perform we show 2e7°- we our Te hey too Input gote.. will ge AND gote Peco For trok Fiat P& put Ie 740 onk we LC pin 44 will be eon marlea to the verb (5) 8 to the Hone boordpege—og and $C pin F will be connoclech do GND. We connactch Whoo wlyey ay input ON 1,2 + Thin we connacted Ahi 2 Wivey Lith seme seiteh 14,43 and For ook seeond gate we dook the output wire from 3 ond q onk Pin 5 we conmeck wire Switth fs compete: anh & wire qid the samme tien fo¥ connect 12. They our Binput ANG gote fev final ovkpuk we took Pin & conrecteck to & mnondom LED. We diig fr OR gote beewre tha configater te F4og and LO 743% ts Some- Alol¢le-ase | eoa+e4e 0;0 O 0 O;}0O}) Oo ji Ol1fo 0 i Ofi fi 0 1 _folol oo | violy 0 ; {i }o Oo i Pi It 1 ; input AND ond OKesge-05 Exper : periment 3) Tn etic thivd experimen’ wo wa Ke given a aigram , a ath table of byolenn expression - $0, wv eYove thok , we could Gnd ont Ane we neeh ond 1G 140% AND qoke, nor gete + Xe yazr OF gote and one te 7404 we hove to ure AWree (ogic In this experiment goke ardalso oe lege APANO gale , two Logic OF Not gate. First of alt, ti, we took ent inpuk A ond ye pina, divertly aontutead te Ly CAND Gode). For Fr, ©% \mput @. we connect tb te tommact woth NOT and onothes input dook A One onothey ping and curr® Pind exmmect to Pe O82 7404 nod IC qA08 i ye Te eR 743 pin 6 outeut wire, ve pin 3 ank 2 ein Lond 2. fot J3, eran | we took ineuk Band e@ and comet tH de 4re other ciate of FC aaog gete rin 40 and >. Novo ECTS? gin 2 ond pe F408 pin @ are wareted 0 te T4382 pin 4 nk & onal Hue for the Anal oureut o we took Pr 6 on® correct fo x vendom LED- A——po—\ 41 ¢=——————— 4 ———____ i 2 ——t>0—_ p 6 ————— \33 an+gt-06 Question A oye a B-inpul NAND oF MOR or Now gated Is \+ possible to maye gate volt 2-\input NAND We con gud fy Apa answese. Yes, t+ Ts possible: won ards Ufreutt Magor- Using boolean logic express Srinpwk NANO Gale. ‘ Awe \ Sainpuk NOR Gade : A ———_ = Ate 3 =) \ te S (ars) te A Ate Ate =. SB —~ ye Ato te e y = Arete”“=e ela? Dis jon n - We, Were Cg Gi ‘ A —eee ‘In Wis whole lab-od ° Introduced. “te Amdamondad logie gotes stheir Propevidise , Huth table and howd to work with re. Every Je ho» thets own ton figaration to work with: TC 7400 , 10 74q0e ,TO 7432 ond, FO F4QK ove Some with nie eantiguroction But Te zg0q which W Logie Not gate he? OO Uile uit Sfgent «The NOR logic aate vokich f6 TC Faor hay & Configuration vorth pin 2 output anod pin 2,3 inpuk » Sim'lorly uk ank 5, inpuk. Experiment 1 coe frnadtruntal loge diveutt and their 4 oukp Prove drath able Expetimernk 2, We Ome Shown 1 input = AND anck OF gore 2 &inol yy in the ,we build & a Grewit wring expeximank % three terenk Te ond ouv lnb ins huctor deld wy +0 compreke th avewit: “To but ld th ed becamr Uroit we deck — sevevak cena vot Roxil of +e AC. despite of chonging severak C's of 4 Finck Abe goodie. nastrwator andy then ywe still cound informed ore 100 fe dhok could totally wove “Then do findgh the Firak took. wot gate Finally we gare wo a we were able