PIN DIAGRAM OF 8051
XTAL PO.0- P.7/AD,-AP
XTAL
PI.0 P1.7
Reset
P2.0-P2.7/ As-Ag
ALE
PSEN
8 P3.0 P3.7
EA 0 Alternate Functions of Port3
5 P3.0
P3.1
RD
TD Serial Port
1 P3.2
P3.3
- INTo nterrupts
INT
P3.4
Vcc Timer Jnputs
P3.5 T
Vss
P3.6 WR
Control Signals
P3.7 RD
8051 has 40 pins.
The function of these
pins is briefly explained as follows.
These are connected to the
XTAL1 The typical crystal oscillator.
& In Serial
operatingfrequency is 12 MHz.
communication based applications, the
XTAL2 chosen to be 11.0592 operating frequency is
MHz, in order to derive the standard universal baud
rates. This will be discussed in
detail in the further
chapters.
It is used to reset the 8051
On reset PC becomes 0000H.
microcontroller.
Reset This address is called the reset vector
address.
From here, 8051 executes the BIOS
program also called the Booting
program or the monitor program. It is used to
it ready, to be used set-up the system and make
by the end-user.
It is used to enable the latching of the address.
ALE The address and data buses are
multiplexed.
Address This is done to reduce the number of pins on the 8051 IC.
LatchEnable Once out of the chip, address and data have to be
separated that is called
de-multiplexing.
This is
done by
a latch, with the help of ALE signal.
ALE is "1" when the bus carries address and "0" when the bus carries data.
This informs the latch, when the bus is carrying address so that the latch captures only address and
not the data.
It decides whether the first 4 KB of program memory space (0000H... OFFFH)
EA will be assigned to internal ROM or External ROM.
If EA = 0, the External ROM begins from 0000H.
Enable External
A In this case the Internal ROM is discarded.
8051 now uses only External ROM.
If EA = 1, the External ROM begins from 1000H.
In this case the Internal ROM is used. It occupies the space 0000H... OFFFH.
In modern FLASH ROM versions, this pin also acts as VPP (12 Volt programming voltage) to write
into the FLASH ROM.
8051 has a 16-bit
address bus (A15 Ao).
This should allow 8051 to access 64 KB of external
PSEN Memory as 2 = 64 KB.
Program Interestingly though, 8051 can access 64 KB of External ROM and 64 KB
of External RAM, making a total of 128 KB.
Status Enable
Both have the same address range 0000H to FFFFH.
This does not lead to any confusion because there are
for External RAM and External ROM. separate control signals
RD and WR are control signals for External RAM.
PSEN is the READ signal for External ROM.
It is called Program Status Enable as it allows
reading from ROM also known as Program Memory.
Having separate control signals for External RAM and External ROM actually allows us to double
the size of the external memory to a total of 128 KB from the original 64 KB.
These are power supply pins.
Vcc 8051 works at +5V / oV power supply.
&
GND
These are 8 pins of Port 0.
We can perform a byte operation (8-bit) on port 0.
the whole
We can also a c c e s s every bit of port 0 individually by
performing bit
PO.0. PO.7 operations like set, clear, complement
etc.
The bits are called PO.0... PO.7.
alternate function.
Additionally, Port 0 also has an
address data lines.
It carries the multiplexed into ADO-AD7.
and D0-D7 (8 bits of data) are multiplexed
A0-A7 (the lower 8 bits of address)
data are not issued simultaneously.
In any operation address and
then data is transferred.
First, address is given,
reduces the number of pins.
Using a c o m m o n bus for both, address or data, we look at the ALE signal.
To identify if the bus is carrying
carries address,
If ALE = 1, the bus
data.
If ALE= 0, the bus carries
These are 8pins of Port 1. the whole port 1.
perform a byte operation (8-bit)
on
We can bit
also access port individually by performing
every bit of
1
We can P1.7.
P1.0 P1.7 complement etc. on P1.0...
operations like set, clear,
alternate function.
Port 1 also has NO
These are 8 pins of Port 2.
We canperform a byte operation (8-bit) on the whole port 2.
P2.0 P2.7 We can also access
every bit of port 2 individually by performing bit
operations like set, clear, complement etc. on P2.0... P2.7.
Additionally, Port 2 also has an alternate function.
It carries the higher order address lines
A8-A15.
These are 8 pins of Port 3.
We can perform a byte operation (8-bit) on the whole port
P3.0 P3.7 We can also access every bit of port 3 individually. 3.
The bits are called PO.0... PO.7.
The various pins of Port 3 have a lot of alternate functions.
P3.0 (Rxd) and P3.1 (Txd): They are used to receive and transmit serial data.
This forms the serial port of 8051.
P3.2 ( INTO ) and P3.3 ( INT1 ): They are external hardware interrupts of 8051.
If they occur simultaneously, INTO is by default higher priority.
P3.4 (TO) and P3.5 (T1): They are used timer clock inputs.
They provide external clock inputs to Timer 0 and Timer 1.
P3.6 (WR ) and P3.7 ( RD ): They are used as control signals for External RAM.
8051 can access 64 KB External RAM from 00o0H to FFFFH.
8051 BLOCK DIAGRAM
Anthmetic Special
and Function A0A7
Logic Unit Registers DO-07
RAM
8-Bit Data and
Address Bus
0
DPTR
PC DPH ROM
A8-A15
16-8it Adress Bus
Speciat Interrupt
EA Byte/Bit Function Counter
Syslem Addresses
ALE Timing Registers Serial Data
PSEN RD-WR
XTAL System Register
XTAL2 Internupts Bank 3
RESET Fimers PCON
Data Bulfers Register
SBUF
Memory Control Bank 2 SCON
GND
TCON
Register TMOD
8ank1 TLO
THO
Register TLI
Bank 0
THI
Inlenal RAM Structure
- - -
Alternate diagram
ALTERNATE DIAGRAM FOR 8051
ARCHITECTURE BLOCK DIAGRAM
Extemal
IntemuptsS
Intemupt 4k Timor 1
128 Counter
Control ROM RAM Timor 0 Inputs
CPU
B0s Four iO Ports Senal
Osc Control Port
TXD RXD
PO P2 P1 P3
Addross/Data
SO51 is a
microcontroller.
This means it has an
internal processor, internal memory and
section, The architecture of an I/o
8051 is thus divided into three
The CPU main sections:
Internal Memory
1/0 components.
8051 has an 8 bit CPU.
CPU This is where all 8-bot arithmetic and
logic operations
It has the
are performed.
following components.
ALU-ARITHMETIC LoGIC UNIT
It performs 8-bit arithmetic and logic operations.
It can also perform some bit operations.
Example
ADD A, RO Adds contents of A register and RO register and stores the result in A register.
ANL A, RO Logically ANDs contents of Aregister and RO register and stores the result in A register
CPL PO.0 Complements the value of PO.0 pin.
A-REGISTER (AccUMULATOR)
It is an 8-bit register.
In most arithmetic and logic operations, A register hold the first operand and also gets the
result of the operation.
transfers to and from external memory.
Moreover, it is the only register to be used for data
Example the result in A register.
ADD A, R1 Adds contents of Aregister and R1 register and stores
A gets the data from External RAM location pointed by DPTR
MOVX A, @DPTR
B-REGISTER
It is an 8-bit register.
and Division.
It is dedicated for Multiplication
It can also be used in other operations.
Example B and Aregisters.
MUL AB Multlples contents ofAand B reglsters, Stores 16-bit result in
Stores quotient in A and remainder in B.
DIV AB Divldes contents of A by those of B.
PC-PROGRAM CoUNTER
It is an 16-bit
It holds register.
address of the next
PC gets instruction in
automatically incremented as soon asprogram
That's what
memory (ROM).
any instruction
makes the program move is fetched.
In the case of ahead in a sequential
a
branch, a new address is loaded into PC. manner.
DPTR-DATA PoINTER
It is 16-bit register.
an
It holds address data in data
DPTR is divided into two memory (RAM).
registers DPH (higher byte) and DPL
It is typically used
by the programmer to transfer data from(lower byte).
It can also be used as a External RAM.
pointer to a look up table in ROM, Indexed using addressing mode.
Example:
MOVX A, @DPTR A gets the
MOVC A, @A+DPTR;
data from External RAM location pointed by DPTR
A gets the data
from ROM ocation pointed by A + DPTR
SP-STACK PoINTER
It is an 8-bit register.
It contains address of the top of stack.
The Stack is present in the Internal RAM.
Internal RAM has 8-bit addresses from 00H... 7FH.
Hence SP is an 8-bit register.
It is affected during Push and Pop operations.
During a Push, SP gets incremented.
During a Pop, SP gets decremented.
PSW-PROGRAM STATUs WORD
It is an 8-bit register.
It is also called the "Flag register", as it mainly contains the status flags.
These flags indicate status of the current result.
They are changed by the ALU after every arithmetic or logic operation.
The flags can also be changed by the programmer.
PSW is a bit addressable register.
Each bit can be individually set or reset by the programmer.
The bits can be referred to by their bit numbers (PSW.4) or by their name (RS1).
Example
SETB PSW.3 Makes PSW.31
CLR PSW.4 Makes PSW.40
