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Lab 1

The document details Experiment 1 of the Digital Electronic Circuits Laboratory at IIT Delhi, focusing on the construction of a full adder circuit using XOR and NAND gates. It includes the aim, apparatus used, observations, sources of error, precautions, and post-lab questions. The experiment was conducted by students Krushnansh Jain, Ishant Anandkumar Bansal, and Shivam Meena on August 6, 2024, with a report submission date of August 17, 2024.

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0% found this document useful (0 votes)
53 views6 pages

Lab 1

The document details Experiment 1 of the Digital Electronic Circuits Laboratory at IIT Delhi, focusing on the construction of a full adder circuit using XOR and NAND gates. It includes the aim, apparatus used, observations, sources of error, precautions, and post-lab questions. The experiment was conducted by students Krushnansh Jain, Ishant Anandkumar Bansal, and Shivam Meena on August 6, 2024, with a report submission date of August 17, 2024.

Uploaded by

anonymous7ds
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Indian Institute of Technology Delhi

ELL 201: Digital Electronic Circuits Laboratory


Experiment 1: Combinational Logic Circuits
Krushnansh Jain 2023EE10365
Table Number 8
Tuesday Batch
Date of Experiment /Completion: 6 August, 2024
Name of TA: Wridheeman Bhattacharya
Name Entry Number
Krushnansh Jain 2023EE10365
Ishant Anandkumar Bansal 2023EE10447
Shivam Meena 2023EE10348

Experiment 1: Combinational Logic Circuits ->

Contents->
1. Experiment Details 2
a) Aim 2
b) Apparatus 2
c) Briefing what we did 2
d) My own inferences / what I learned 2
e) Observation/Observation Table 3
f) Circuit Image 3
2. Sources of Error 4
3. Precautions 4
4. IC’s Description 4
5. Post Lab Question 5-6

1|Page
Date of Report Submission: 17 August 2024
Indian Institute of Technology Delhi
ELL 201: Digital Electronic Circuits Laboratory
Experiment 1: Combinational Logic Circuits
Aim: Make a full adder circuit using XOR and NAND Gates.
Apparatus:
1. XOR and NAND Gates (IC 7486 and IC 7400)
2. LED and Resistors
3. Power Source (5V with ground support)
4. Connecting Wires

Briefing what we did:

As we were told we implemented the circuit given in the experiment by using XOR and
NAND Gates. First, we checked the LEDs by using a resistor in series so that they don’t burn
then we checked each IC if it is working or not by connecting them between high and low
voltages by using an LED then then we connected the circuit as it was given and compared
the output values with theoretical expectations using a truth table.
The simplified expressions for D and E are as follows:
D=A⊕B⊕C
E = AB + BC + CA

My own inferences/ what I learned:


1. I deduced that the circuit we made was actually a FULL ADDER Circuit where “D” is
the “Sum” and “E” is the “Carry out”.
2. It is very important not to forget connecting VCC and GND to the IC’s.
3. It is also necessary to check each component separately before using it in a circuit.
4. It is good to know the configuration of the IC’s beforehand.

2|Page
Date of Report Submission: 17 August 2024
Indian Institute of Technology Delhi
ELL 201: Digital Electronic Circuits Laboratory
Experiment 1: Combinational Logic Circuits
Observations:

Observation Table:
Theoretical Experimental
A B C
D E D E
0 0 0 0 0 0 0
0 0 1 1 0 1 0
0 1 0 1 0 1 0
0 1 1 0 1 0 1
1 0 0 1 0 1 0
1 0 1 0 1 0 1
1 1 0 0 1 0 1
1 1 1 1 1 1 1

Circuit Image:

3|Page
Date of Report Submission: 17 August 2024
Indian Institute of Technology Delhi
ELL 201: Digital Electronic Circuits Laboratory
Experiment 1: Combinational Logic Circuits
Sources of Error:
• Loose connections

• Faulty LED’s

• Faulty IC’s (Potential reason may be because switch is turned on for long period of
time)

• Faulty power source

• It is possible that one may forget to power up the IC’s using VCC and GND

Precautions:
• Wear proper shoes and make changes to the circuit only when the power source is
turned off.

• Don’t leave the switch on for long periods of time which may damage the IC’s.

• Make the connections neat and tight.

• Check each IC individually before using in the circuit.

IC’s Description:

4|Page
Date of Report Submission: 17 August 2024
Indian Institute of Technology Delhi
ELL 201: Digital Electronic Circuits Laboratory
Experiment 1: Combinational Logic Circuits
Post Lab Question:
• Is it possible to implement the two functions using two 4-1 multiplexers? Show a
detailed diagram.
> Yes, it is possible to implement the two functions:

Implementation of D ->

Implementation of E ->

5|Page
Date of Report Submission: 17 August 2024
Indian Institute of Technology Delhi
ELL 201: Digital Electronic Circuits Laboratory
Experiment 1: Combinational Logic Circuits
Detailed Diagram:

6|Page
Date of Report Submission: 17 August 2024

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