Microprocessor and Microprocessor Architecture

Microcontroller

Prof. Nadaf S. M.
Assistant Professor
Electrical Engineering
 Microprocessor Architecture Introduction

➢ Microprocessor is the Brain of the Computer system, also called as CPU

➢ Microprocessor is an Electronics circuit that functions as the Central

Processing Unit (CPU) of a computer, providing computational control
➢ Microprocessor is the core of the system
 Microprocessor Architecture History

➢ Intel 4004 (First commercial uP, Introduced in 1971)

➢ Intel 8080
➢ Intel 8085
➢ Intel 8086 – Intel 80186, 80286, 80386, 80486
➢ Pentium
➢ Pentium Dual Core
➢ Intel Core i3, i5, i7
 Microprocessor Architecture Introduction

➢ The Microprocessor can be programmed to perform functions on given

data by writing specific instructions into its memory.
➢ The Microprocessor reads one instruction at a time, matches it with its
instruction set, and perform the data manipulation.
➢ The Result is either Stored back into Memory or Displayed on an Output
device.
 Microprocessor Architecture Necessary Tools for μP

➢ CPU: Central Processing Unit

➢ I/O: Input / Output
➢ Bus: Address bus and Data bus
➢ CU: Timing and Control Unit
➢ Special and General Purpose Registers
➢ L1 and L2 Cache Memory
➢ Bus Interface
Microprocessor Architecture Block diagram of μP

AHB- High
Freq Design
Microprocessor Architecture Pin diagram of 8085 μP
Microprocessor Architecture Architecture of 8085 μP
 Microprocessor Architecture A.L.U and C.U. of μP

➢ CPU is partitioned into A.L.U. and C.U.

➢ A.L.U. carries out Arithmetic operations like Addition, Subtraction, Increment,
Decrement etc.
➢ And Logical operations like AND, OR, XOR, Complement etc.
➢ The function of C.U. is to generate the relevant timing and control signals to
all operations in the computer
➢ It controls the flow of the data between the processor and memory and
peripherals.
 Microprocessor Architecture A.L.U and C.U. of μP

➢ Instruction Decoding and Machine Cycle Encoding:

Used to Decode Instruction Opcode into Binary form and to control various
Machine cycle operations during execution of an instruction.
➢ Serial I/O Control:
Used to control Serial data communication with external devices via SID/SOD lines
➢ Interrupt Control:
Used to handle various incoming interrupts which occurs via 5 interrupt pins TRAP,
RST7.5, RST6.5, RST5.5 and INTR lines.
 Microprocessor Architecture Registers Array of μP

➢ 14 Registers – 12 Registers are 8 bit and 2 Registers are 16 bit

➢ Classifies into 4 Groups
1. General Purpose Registers (User Accessible)
- B, C, D, E, H, L are 8 bit registers (can be used singly)
- Can also be used for 16 bit register pairs as – BC, DE and HL
- Used to store the intermediate data and result
- H & L can be used as a Data pointers (Hold memory address)
Microprocessor Architecture Registers Array of μP

2. Special Purpose Registers (A, Instruction Register and Flag)

2.1 – Accumulator (A) (User accessible)
- 8 bit Register
- All the ALU Operations are performed with reference to the contents of
Accumulator
- Result of an operation is stored in A
- Store 8 bit data during I/O transfer
Microprocessor Architecture Registers Array of μP

2.2 – Instruction Register (Not user accessible)

- When an instruction is fetched from memory, it is loaded in IR, then transfer
to the decoder for decoding
- It is not programmable and can not be accessed through any instruction
2.3 – Flag Register (User accessible)
- 8 bit register
- Indicated the status of the ALU operation
- ALU includes 5 flip flops which are set or reset after an operation according
to data conditions of the result in accumulator
Microprocessor Architecture Registers Array of μP

2.3 – Flag Register (User accessible)

 Microprocessor Architecture Registers Array of μP

3. Temporary Registers (W, Z, Temporary data register)

Internally used by the MP (Not user accessible)
3.1 – W and Z Register:
- 8 bit capacity
- Used to hold temporary addresses during the execution of some
instructions
3.2 – Temporary data register
- 8 bit capacity
- Used to hold temporary data during ALU operations
 Microprocessor Architecture Registers Array of μP

4. Pointer Registers or Special purpose Register (SP, PC)

4.1 – Stack Pointer (SP):
- 16 bit register which holds the address of the data present at the top of the
stack memory.
- It is reserved area of the memory in the RAM to store and retrieve the
temporary information.
- When there is a subroutine call or on an interrupt i.e. pushing the return
address on a jump, and retrieving it after the operation is complete to
come back to its original location.
Microprocessor Architecture Registers Array of μP

4.2 – Program Counter (PC):

- 16 bit register used for the execution of program
- Contain the address of the next instruction to be executed after fetching
the instruction it is automatically incremented by 1.
- Not much use in programming, but as an indicator to user only
 Microprocessor Architecture Registers Array of μP

Increment and Decrement address latch: 16 bit register

- Used to increment or decrement the content of PC and SP
Address Buffer: 8 bit unidirectional buffer
- Used to drive high order address bus (A8 to A15)
Data/ Address buffer: 8 bit Bi-directional buffer
- Used to drive the low order address (A0 to A7) and data (D0 to D7) bus.
 Microprocessor Architecture ALU & Logical Group

➢ ALU and Logical Groups –

a) ALU: Perform Arithmetic and Logical Operations
b) Accumulator: General purpose register
c) Temporary Register: During ALU operation one operand is available in A
and other is always transferred to temporary register
d) Flag Register: Status of ALU operation is stored in Flag register
 Microprocessor Architecture Instruction Decoder

➢ Instruction Decoder and Machine cycle Encoder –

- Decodes the Op-code stored in the Instruction Register (IR) and
establishes the sequence of events to follow.
- Encodes it and transfer to the timing and control unit to perform the
execution of the instruction.
➢ Timing and Control Circuitry – Works as the brain of the CPU
- For proper sequence and synchronization of all operation of
Microprocessor, this unit generates all timing and control signals for
communication between MP and peripherals.
 Microprocessor Architecture Interrupt Control

➢ Interrupt Control Group –

- Occurrence of the external disturbance.
- After receiving the interrupt, 8085 resumes its normal working
sequence.
- Transfer the control to the special routines.
- Five interrupts: TRAP, RST7.5, RST6.5, RST5.5, INTR
- In response to INTR , it generates INTA signal
 Microprocessor Architecture Serial I/O Control

➢ Serial I/O Control Group –

- Data transferred on D0 to D7 lines is parallel data.
- But under some conditions serial data transfer is possible.
- Serial data is entered through SID input.
- Serial data outputted on SOD input
 Microprocessor Architecture Status Signals

➢ Status Pins – (ALE, S1, S0)

1. ALE (Address Latch Enable) (Pin No. 30)
- Used to DE multiplexed address and data bus.
- +ve going pulse generated when a new operation is started by MP.
- ALE=1 when the AD0-AD7 lines have an address
- ALE=0 when the contents on AD0-AD7 is data
- This signal can be used to enable a latch to save the address bits from
the AD lines.
 Microprocessor Architecture Status Signals

➢ Status Pins – (ALE, S1, S0)

2. S1 and S0 (Status signals) (Pin No. 29 and 33)
- Status signals to specify the kind of operation being performed.
- Usually unused in small systems.
 Microprocessor Architecture Control Signals

➢ Control Pins – (RD, WR, IO/M)

1. RD: Read (Active Low) (Pin No. 32)
- Read memory or IO device.
- Indicate that data is to be read either from memory or I/O device and data
bus is ready for accepting data from the memory or I/O device.
2. WR: Write (Active Low) (Pin No. 31)
- Write memory or IO device.
- Indicate that data on data bus is to be written into selected memory or I/O
device.
 Microprocessor Architecture Control Signals

ഥ Write (Input Output/Memory – Active Low) (Pin No. 34)

3. IO/𝑴:
- Signal specifies that the read/write operation relates to weather memory or
I/O device.
- ഥ
When (IO/𝑀=1) address on address bus is for I/O device.
- ഥ
When (IO/𝑀=0) address on address bus is for memory device.
ഥ
IO/𝐌 RD WR Control Signal Operation

0 0 1 MEMR M/M Read

0 1 0 MEMW M/M Write
1 0 1 IOR I/O Read
1 1 0 IOW I/O Write
 Microprocessor Architecture Reset Signals

1. Reset In (Input – Active Low) (Pin No. 36)

- This signal is used to reset Microprocessor.
- The Program Counter inside the Microprocessor is set to zero (0000H)
- The buses are Tri stated.
2. Reset Out (Output – Active High) (Pin No. 3)
- It indicates Microprocessor is being Reset.
- Used to reset all the connected devices when the Microprocessor is reset.
 Assembly Language Programming
Microprocessor Architecture

➢ Instruction Classification
- An instruction is a binary pattern designed inside a Microprocessor to
perform a specific function.
- The entire group of instruction called the Instruction Set, determines what
functions the Microprocessor can perform
- 8085 Instructions can be classified into following five functional categories
1. Data Transfer (Copy) Instructions 2. Arithmetic Operations

3. Logical Operations 4. Branching Operations

5. Machine-control Operations
 Assembly Language Programming
Microprocessor Architecture

➢ Data Transfer (Copy) Operations

- This group of instructions copies data from a location called a source to
another location called a destination without modified the contents of the
source.
- The contents of a source are retained without any modification
- Various types of data transfer (Copy) are listed below
1. Between Registers – Copy the contents of Register B into Register D
2. Specific data byte to a Register or a Memory location – Load register B with
data byte 32H
 Assembly Language Programming
Microprocessor Architecture

3. Between a Memory location and a Register – From a Memory location 2000H

to Register B
4. Between an I/O device and the Accumulator – From an input keyboard to the
Accumulator
 Assembly Language Programming
Microprocessor Architecture

➢ Arithmetic Operations
- These instructions perform arithmetic operations such as addition,
subtraction, Increment, and Decrement
1. Addition – Any 8 bit number or a contents of a register or contents of a
memory locations can be added to the contents of an Accumulator and the
sum is stored in an Accumulator.
No other two 8 bit registers can be added directly except DAD instruction.
DAD instruction adds 16 bit data directly in register pairs.
 Assembly Language Programming
Microprocessor Architecture

2. Subtraction – Any 8 bit number or a contents of a register or contents of

a memory locations can be subtracted to the contents of an Accumulator
and the result is stored in an Accumulator.
The subtraction is performed in 2’s compliment.
Negative results are expressed in 2’s compliment
3. Increment/ Decrement – The 8 bit contents of a register or a memory
location can be incremented or decremented by 1.
The 16 bit contents of a register pair can be incremented or
decremented by 1.
 Assembly Language Programming
Microprocessor Architecture

➢ Logical Operations
- These instructions perform various logical operations with the contents of an
Accumulator
1. AND, OR, Exclusive OR – Any 8 bit number or a contents of a register or
contents of a memory locations can be ANDed, Ored, or Exclusive Oredwith
the contents of an Accumulator and the result is stored in an Accumulator.
2. Rotate – Each bit of Accumulator shifted either left or right to next position
 Assembly Language Programming
Microprocessor Architecture

3. Compare – Any 8 bit number or a contents of a register or a memory location

can be compared for equality, greater than or less than with the contents of an
accumulator.
4. Complement – The contents of an Accumulator can be complimented
 Assembly Language Programming
Microprocessor Architecture

➢ Branching Operations
- This group of instructions alters the sequence of program execution either
conditionally or unconditionally.
1. Jump – Conditional jumps are an important aspects of a decision making process in
programming. These instructions test certain conditions (Zero, Carry) and alter
the program sequence when the condition is met.
2. Unconditional jump
3. Call, Return, Restart – These instructions change the sequence of a programming
either by calling a subroutine or returning from a subroutine.
 Assembly Language Programming
Microprocessor Architecture

➢ Machine Control Operations

- These instructions control machine functions such as Halt, Interrupt, or do
nothing
 Assembly Language Programming
Microprocessor Architecture

➢ 8085 Addressing Modes

- The way of specifying data to be operated by an instruction is called as
Addressing Mode.
- In 8085 Microprocessor there are 5 types of Addressing Modes,
1. Immediate Addressing Mode
2. Register Addressing Mode
3. Direct Addressing Mode
4. Register Indirect Addressing Mode
5. Implied/ Implicit Addressing Mode
 Assembly Language Programming
Microprocessor Architecture

1. Immediate Addressing Mode –

In immediate addressing mode the source operand is always data, e.g.
MVI B 45H LXI H 3050H JMP Address
2. Register Addressing Mode –
In register addressing mode, the data to be operated is available inside
the register(s) and register(s) is(are) operands.
MOV A, B ADD B INR A
 Assembly Language Programming
Microprocessor Architecture

3. Direct Addressing Mode –

The data to be operated is available inside a memory location and that
memory location is directly specified as an operand.
LDA 2050H LHLD Address IN 35
4. Register Indirect Addressing Mode –
The data to be operated is available inside a memory location and that
memory location is indirectly specified by a register pair.
MOV A, M LDAX B LXIH 9570H
 Assembly Language Programming
Microprocessor Architecture

5. Implied/Implicit Addressing Mode –

The operand is hidden and the data to be operated is available in the
instruction itself.
CMA RRC RLC
 Microprocessor Architecture Instruction Formats

8085 instructions are classified into following three groups according to

word size or byte size.
1- Byte Instructions
MOV C,A 0100 1111 4FH
ADD B 1000 0000 80H
CMA 0010 1111 2FH
 Microprocessor Architecture Instruction Formats

2- Byte Instructions 3- Byte Instructions

MVI A,32H 0011 1110 3EH LDA 2050H 0011 1010 3AH
0011 0010 32H 0101 0000 50H
0010 0000 20H
MVI B,F2H 0000 0110 06H JMP 2085H 1100 0011 C3H
1111 0010 F2H 1000 0101 85H
0010 0000 20H
 Assembly Language Programming
Microprocessor Architecture

➢ Need for Assembly Language Programming

- Assembly language is low level programming language.
- Assembly language has strong correspondence with architecture’s
machine code instruction and is specific only to that machine.
- Assembly language directly deals with processor of a machine.
- We can write code to access the registers and even deal with memory
addresses directly for retrieving values and pointers.
 Assembly Language Programming
Microprocessor Architecture

➢ Need for Assembly Language Programming

- If you are writing a program that has a great algorithm, you are going to benefit
greatly.
- This is mainly because assembly language is gateway to optimization in speed,
thereby offering great efficiency and performance.
- Assembly language is the only language that speaks to the computer/machine
directly.
- It is the language that a certain CPU recognizes and different CPUs recognize
different types of them.
 Assembly Language Programming
Microprocessor Architecture

➢ Need for Assembly Language Programming

- Assembly language is transparent, when compared to high-level
languages, which are mostly in the form of abstract data types.
- Assembly language is bare and transparent.
- It also makes it easier for debugging, as it is less complex, there is
less overhead as compared to high-level languages.
 Assembly Language Programming
Microprocessor Architecture

➢ Development of Assembly Language Programming

Adding two Hexadecimal Numbers
- Problem statement
Write instructions to load the two hexadecimal numbers 32H and
48H in registers A and B respectively. Add the numbers and display
the sum at the LED output port PORT1.
 Assembly Language Programming
Microprocessor Architecture

- Problem Analysis
Divide the problem in small steps to examine the process of writing
programs
1. Load the numbers in Registers
2. Add the numbers
3. Display the sum at output port PORT1
 Assembly Language Programming
Microprocessor Architecture

- Flowchart
Steps listed in problem analysis can be represented in block diagram
called a flowchart.
Start

Load Hex
numbers

Add
Numbers

Display
Sum

END
 Assembly Language Programming
Microprocessor Architecture

- Assembly Language Program

Translate the blocks shown in the flowchart into 8085 operations and
then subsequently into mnemonics.
Block 1 and 3 are copy operations
Block 2 is an arithmetic operation
Block 4 is machine control operation
To translate these steps into assembly language program we should
review the instruction set.
 Assembly Language Programming
Microprocessor Architecture

- Assembly Language Program

Block 1: MVI A, 32H ;Load Register A with 32H
MVI B, 48H ;Load Register B with 48H
Block 2: ADD B ;Add two bytes and save the sum in A
Block 3: OUT 01H ;Display accumulator contents at PORT 01H
Block 4: HLT ;End
 Assembly Language Programming
Microprocessor Architecture

- From Assembly Language to Hex Code

MVI A, 32H 3E 2 – Byte Instruction
32
MVI B, 48H 06 2 – Byte Instruction
48
ADD B 80 1 – Byte Instruction
OUT 01H D3 2 – Byte Instruction
01
HLT 76 1 – Byte Instruction
 Assembly Language Programming
Microprocessor Architecture

- Storing in Memory and Converting from Hex Code to Binary Code

➢ Assume that R/W memory ranges from 2000H to 20FFH
➢ And system has LED output port with the address 01H
1. Reset the system by pushing the RESET key
2. Enter the first memory address using Hex keys where program
should be stored. Assume that it is 2000H.
3. Enter each machine code by pushing Hex keys, e.g. to enter first
machine code push the 3, E and STORE key.
 Assembly Language Programming
Microprocessor Architecture

When we push STORE key, program will store machine code in memory
location 2000H and upgrade memory address to 2001H
4. Repeat step 3 until the last machine code, 76H
5. Reset the system.
Monitor program stored in EPROM of the Microcomputer system
converts Hex code into Binary Code
To Memory
Flowchart 8085 Manual Hex Monitor Binary for Storage
Mnemonics Lookup Code Program Code
 Assembly Language Programming
Microprocessor Architecture

- Executing the Program

➢ Instruct Microprocessor where the program begins by entering the
memory address 2000H.
➢ We can now push the execute key to begin the execution.
➢ As soon as the execution function key is pushed, the Microprocessor loads
2000H in the program counter and the program control is transferred
from monitor program to our program.
➢ Microprocessor begins to read one machine code at a time.
 Assembly Language Programming
Microprocessor Architecture

➢ And when it fetches the complete instruction it executes that instruction.

➢ For example, it will fetch the machine codes stored in memory locations
2000H and 2001H and execute the instruction MVI A, 32H.
➢ It loads 32H in Accumulator A.
➢ The ADD instruction will add the two numbers.
➢ OUT instruction will display the answer 7AH at LED port.
➢ It continues to execute instructions until it fetches the HLT instruction.