MCA PRACTICAL EXAM NOTES

For practicing and running the codes on Keil, download Keil from the below link as
other versions of Keil does not support LPC2148 .
https://embetronicx.com/tutorials/microcontrollers/lpc2148/setting-up-keil-for-lpc2148/

Steps to run the Program :

1. Select LPC2148 microprocessor in the beginning. Will be inside NXP section.

2. Create a text file and save it in .s format.
3. After completing the code, add the file to Source group 1 under Target 1.
4. Build Target or F7.
5. Chances are there might be many warnings but ignore them.
6. Start Debug.
7. If the Register window doesn’t get open, go to view and select Register Window.
8. Press F11 to debug line by line.

There might be a lil chance that code have error, so check it.
Q1. Write an assembly language program to add two 64 bit numbers using ARM7
processor.

ADDS: Adds lower 32-bit values (R0 and R2) and sets carry flag if there’s an overflow.
ADC: Adds upper 32-bit values (R1 and R3) and considers the carry flag from the lower
addition.
Output :

Verified answer. Last ke 3 digits bhaad mei jaaye

Q2. Write an assembly language program to subtract two 64 bits number using ARM 7
processor.

SUBS: Subtracts R2 from R0 (lower bits), sets flags for borrow.

SBC: Subtracts R3 from R1 (upper bits) and considers the borrow flag.

Output :
Q3. Write an assembly language program to evaluate expression Y = AB + CD using
ARM 7 processor. Where A, B, C, and D are the 32-bit numbers.

Output :

This ARM assembly program computes the expression ( Y = AB + CD ) using hardcoded 32-
bit hexadecimal numbers for ( A ), ( B ), ( C ), and ( D ). It begins by loading the values of ( A
), ( B ), ( C ), and ( D ) into registers ( R0 ), ( R1 ), ( R2 ), and ( R3 ) respectively. The
program then performs unsigned multiplication of ( A ) and ( B ) using
the UMULL instruction, which produces a 64-bit result stored across registers ( R5 ) (high)
and ( R4 ) (low). It repeats this for ( C ) and ( D ), storing the result in ( R7 ) and ( R6 ). After
obtaining both products, it adds the lower 32 bits of the two results using ADDS, and then
adds the upper 32 bits with carry using ADC. The final result is stored in registers ( R8 ) and
( R9 ), and the program enters an infinite loop to halt execution, effectively preserving the
computed value of ( Y ).
Q4. Write an assembly language program to count number of "1's" in a given word(32-
bit number) using ARM 7 processor.

Output:

This code counts the number of 1 bits in a 32-bit number stored in register R0. Initially, R0 is
loaded with the value 0xF0F0F0F0 using the LDR instruction, and R1 is set to 0 to serve as
the counter. The LOOP begins with ANDS R2, R0, #1, which isolates the least significant bit
(LSB) of R0 by performing a bitwise AND with 1, storing the result in R2 and updating the
zero flag. This bit is then added to R1 using the ADD R1, R1, R2 instruction, incrementing
the counter if the LSB is 1. The LSR R0, R0, #1 instruction performs a logical right shift on
R0, effectively discarding the LSB and moving the next bit into position. After the shift, CMP
R0, #0 compares R0 with 0 to set the zero flag, and BNE LOOP branches back to LOOP if
R0 is not zero. This process repeats until all bits in R0 are processed, at which point the
program halts in the infinite loop at the STOP label (B STOP). The counter R1 contains the
total count of 1 bits at the end of execution.
Q5. Write an assembly language program to count number of "0's" in a given word(32-
bit number) using ARM 7 processor.

Output :

This program calculates the number of 0 bits in a 32-bit number. It begins by loading the
value 0xF0F0F0F0 into R0 with the LDR instruction, setting R1 to 32 (total bits), and
initializing R2 to 0 as the counter for 1 bits. The LOOP isolates the least significant bit (LSB)
of R0 using ANDS R3, R0, #1, adding it to R2 with ADD R2, R2, R3 if it is 1. The number in
R0 is then shifted right by one bit with LSR R0, R0, #1, effectively processing each bit
sequentially. The CMP R0, #0 checks if R0 has become zero, and the BNE LOOP repeats the
loop until all bits are processed. After the loop, the program calculates the count of 0 bits by
subtracting the count of 1 bits (R2) from the total bit count (R1) using SUB R1, R1, R2.
Finally, the program halts at the STOP label with an infinite loop to allow the results to be
inspected in a debugger.
Q6. Write an assembly language program to find the largest number from series of five
32 bit number using ARM 7 processor. Series starts from memory location 0x40000000.
Store the result in register R0.

Output:

First iteration :
Final answer after 5 iterations :

This ARM assembly code finds the largest number in a series of 5 numbers stored in memory
starting at address 0x40000000. It begins by loading the first number into R1 as the initial
maximum, then sets up a loop to process the remaining 4 numbers. In each iteration, it loads
the next number into R3 and compares it with the current maximum in R1. If the new number
(R3) is larger than the current maximum, it updates R1 with this new value using an unsigned
comparison (MOVLO). The loop continues until all 5 numbers have been checked,
decrementing a counter (R2) with each iteration. Once the largest number is found, it is
moved to R0, and the program enters an infinite loop (STOP) to halt execution, effectively
preserving the result of the largest number in R0.
Q7. Write an assembly language program to find the smallest number from series of five
32 bit number using ARM 7 processor. Series starts from memory location 0x40000000.
Store the result in register R0.

Output :

First iteration :
Similarly do all iterations and get final result

The smallest number code finds the minimum value in a series of five 32-bit integers starting
at memory address 0x40000000. Initially, the program loads the first number into R1 (initial
minimum) and increments the pointer R0 to point to the next number. A loop processes the
remaining four numbers, loading each into R3 and comparing it with the current minimum in
R1. The instruction MOVLT R1, R3 (or in some cases MOVHI for unsigned comparisons)
updates R1 only if the value in R3 is smaller. The loop decrements a counter (R2) until all
numbers are checked. At the end of the loop, the smallest number resides in R1, which is
moved to R0 to store the result. This ensures R0 contains the smallest number from the series.
Q8. Write an assembly language program to find 2's complement of 64-bit number
which is present in register R1 and R0. Store the result in R2 and R3 registers.

Output :

This ARM assembly language program computes the two's complement of a 64-bit number
stored across registers R1 (upper 32 bits) and R0 (lower 32 bits) by first performing a bitwise
inversion (1's complement) using the MVN instruction on both registers, storing the inverted
values in R2 and R3 respectively. After obtaining the 1's complement, the program adds 1 to
complete the two's complement conversion by using the ADDS instruction to add 1 to the
lower 32-bit register (R2) with the carry flag enabled, and then using the ADC (Add with
Carry) instruction to propagate any carry to the upper 32-bit register (R3). This method
ensures a mathematically correct two's complement conversion for 64-bit numbers, with the
final result stored in R2 (lower 32 bits) and R3 (upper 32 bits), effectively negating the
original 64-bit value by flipping all bits and adding 1.
Q9. Write an assembly language program to transfer data block of 5-word (32-bit).
Source data block starts from address 0X40000000 and destination data block starts
from 0X40000100.

Output:

This ARM assembly language program demonstrates a straightforward memory block

transfer technique for copying 5 consecutive 32-bit words from a source memory address
(0x40000000) to a destination memory address (0x40000100). The program initializes three
key registers: R0 stores the source address, R1 stores the destination address, and R2 serves
as a loop counter initialized to 5. Within the loop, each iteration loads a 32-bit word from the
source address into R3 using the LDR instruction with post-increment, then immediately
stores that word to the destination address using the STR instruction, also with post-
increment. The SUBS instruction decrements the counter and sets the zero flag, and
the BNE (Branch if Not Equal) instruction continues the loop until all 5 words have been
transferred, effectively creating a memory block copy routine with minimal code complexity.
Q10. Write an assembly language program to add series of 05 word (32-bit) numbers.
Data series starts from address 0X40000000. Store the result in registers R4 and R5
respectively.

Output :

This ARM assembly language program is designed to perform a cumulative addition of a

series of five 32-bit numbers stored sequentially in memory, starting from the address
0x40000000. The program initializes two registers, R4 and R5, to store the 64-bit result of the
addition, allowing for potential overflow beyond 32 bits. The implementation uses a carefully
crafted loop that iteratively loads each 32-bit word from the memory location, adding it to the
accumulating sum. The ADDS instruction is used for the lower 32-bit addition, which
simultaneously updates the carry flag, and the ADC (Add with Carry) instruction is employed
to propagate any carry to the upper 32-bit register, ensuring a precise 64-bit summation. The
loop continues until all five words have been processed, decrementing the counter with each
iteration. After completing the addition, the program enters an infinite loop at the STOP label,
preserving the final 64-bit sum in R4 (lower 32 bits) and R5 (upper 32 bits), effectively
demonstrating a robust method for handling multi-word arithmetic operations in ARM
assembly language.