UNIT OBJECTIVES:

Learn the basic aspects of a computer's I/O system.

Learn the basic I/O techniques.
Understanding the advantages of each of these techniques to improve performance
computer.
Having basic knowledge of the devices' ports that we can connect to
computer and how they communicate with the processor through the I/O system.

In this unit, we will analyze which devices allow us to free or offload the processor.
the different tasks that need to be done in this process and we will distinguish the basic techniques
of the following I/O:

Scheduled E/S.

I/O by interrupts.

I/O via DMA.

I/O Channels.

SCHEDULED I/O: To perform the I/O operation between the processor and the I/O module, the
processor executes a program that controls all I/O operations (programming,
data transfer and completion.

Next, we analyze in more detail the transfer of a data point:

SYNCHRONIZATION: During synchronization, the processor, as responsible for the transfer,

run a program that constantly checks the status of the peripheral by consulting the register
state of the I/O module. This program has a loop that runs continuously until
detects the change of state and indicates that the peripheral is ready. This method of
Synchronization is referred to as polling or active waiting synchronization. While it is taking place.
the synchronization, the processor is dedicated one hundred percent to this task and, therefore, does not
it can attend to other processes or applications. If this wait is too long, it can degrade the
benefit level of the entire system. Therefore, it is advisable that the transfers
made using this technique are short and fast.

DATA EXCHANGE: During the data exchange, if it is a read operation

(entry), the processor reads the data register of the I/O module to collect the sent data
through the peripheral, and stores it in memory; if it is a write operation (output), the processor
It takes the data we want to send to the peripheral from memory and writes it in the data register.
from the I/O module.

I/O WITH INTERRUPTIONS: In this section we will see I/O through interruptions. This technique of
E/S aims to prevent the processor from having to be idle or doing unproductive work.
while waiting for the peripheral to be ready to perform a new I/O operation and
I can take advantage of this time to run other programs. Using the I/O technique of
interruptions are downloaded to the I/O module responsible for carrying out the
synchronization between the peripheral and the processor. To use this I/O technique in a
computer, it is necessary to consider both software and hardware aspects.

E/S WITH DIRECT MEMORY ACCESS: In this section, we will describe a technique much more
efficient for transferring data blocks, direct memory access DMA. In this technique the
processor programs the transfer of a block of data between the peripheral and memory
charging a new element connected to the system bus to carry out the entire transfer. A
once finished, this new element notifies the processor. In this way, the processor can
dedicate all the time that the block transfer lasts to other tasks. This new element
who manages all the data transfer between the peripheral and the main memory
we call it a DMA module or controller, or in more advanced versions, a channel or
I/O processor. Using the DMA I/O technique, the processor is relieved of the
responsibility for carrying out the synchronization and data exchange between the peripheral and the
memory. On the other hand, a new problem appears on the computer, as there are two
devices, the processor and the DMA controller that must access in a way
concurrent to the memory and a mechanism needs to be established to resolve this conflict.

I/O CHANNELS: I/O channels are an enhancement of DMA controllers. They can
execute instructions that read directly from memory. This allows for better management
autonomy the I/O operations and in this way multiple operations can be controlled
I/O with devices with minimal processor intervention.

These channels can still be made more complex by adding their own local memory that
turns them into specific I/O processors.

The programming of the I/O operation by the processor is done by writing in

memory the data and the instructions that the I/O channel needs to manage the entire operation
of I/O. The information specified includes the device we need to access, the
operation that must be performed indicating the priority level, the direction of the data block
where we have to read or write the data that needs to be transferred, the size of the block of
data that need to be transferred, how to handle error processing and how to
It must inform the processor of the end of the I/O operation.

When the I/O operation is finished, the I/O channel informs the processor that it is complete.
the transfer and possible errors through memory. It can also indicate the end of the
transfer by interruptions.

THE TWO BASIC CONFIGURATIONS OF I/O CHANNELS ARE THE FOLLOWING:

CANAL SELECTOR: it is designed for high-speed transfer peripherals and only

allows a simultaneous transfer operation.
• MULTIPLEXER CHANNEL: it is designed for slower transfer peripherals and can
combine the data block transfer from different devices.

THE MAIN ADVANTAGES OF I/O CHANNELS OVER I/O CONTROLLERS

THEY ARE AS FOLLOWS:

They allow controlling simultaneous I/O operations.

Multiple I/O operations can be scheduled on different devices or sequences.

operations on the same device, while the I/O channel performs other I/O operations.

IN A FEW WORDS, THE INPUT AND OUTPUT TECHNIQUES WORK AS FOLLOWS

WAY:

DMA IMPLEMENTATION: two new signals are added to communicate between the CPU and MOD
about the use of buses. The BUSREQ and BUSACK signals mean request and grant
respectively. Once granted, the CPU cannot use them and must stop, which generates
a waste of time.

INTERRUPT-DRIVEN IMPLEMENTATION: with a single line whose case determines the address
From the jump, the survey system can be used (question by programming to all and each)
one of the peripherals has been the product of said interruption) or vectorized (each peripheral
when it generates an interrupt and delivers the vector address through the corresponding bus
interrupted in such a way that the CPU receives the interrupt notice or immediately picks up from
but the interrupted vector.

Input/Output via Interrupts

A memory space is assigned for each device.

A single set of input and output instructions (No difference between memory and I/O).

Only the memory bus is used.

2tpos:

BURST MODE: the bus is not released until the data transfer is complete.
It occurs when the CPU has cache memory (so it can continue working without the need for the bus).

CYCLE ROBOT MODE: the bus is released after transferring each word; it requests
constantly on. It is used when the CPU does not have cache. It takes longer, but the CPU can
continue processing instructions.

Scheduled Entry/Exit

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The CPU:

Start and carry out the transfer.

Check the status of the device.

Send read and write commands.

Transfer the data to memory

There are two ways in which the CPU sends instructions to the devices.

Memory mapping

Isolated

The devices access the memory (through the DMA controller) without having to go through the
processor.

Devices with multiple speeds can communicate without needing to subject the CPU to a
heavy load of instructions

In this way, the CPU can work on other activities and at greater speed.

It is used to transfer memory blocks.

For this process, the system bus is used.

The DMA sets to regulate so that it does not occupy the bus completely.

Memory mapping

Direct Memory Access (DMA)

Input and Output Techniques

Scheduled Entry/Exit

Input/Output by interruptions

Direct Memory Access

Input/Output Techniques

The I/O module interrupts the CPU to request a data exchange.

The CPU starts the information transfer and continues carrying out its prior process.

This allows the CPU to execute other instructions while the data is being passed.
receive.
Synchronous I/O: at the end of the transfer, control is returned to the process that requested it.
transfer. The 'wait' instruction (or a loop) is initiated, waiting for an I/O module to do
An interruption to the CPU. Only one I/O request is made at a time.

Asynchronous I/O: multiple I/O requests can be made through a table in the system
of operations where there is an entry for each peripheral (Device Status Table).
While I/O is being carried out, the CPU can process other information and manage other processes.
E/S.

Scheduled Entry/Exit

Device speeds

Devices of

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Input and Output Devices

Programmed I/O interfaces

The CPU has a set of special instructions to access I/O ports (in, out, outb,
outw, outl).