GUJARAT TECHNOLOGICAL UNIVERSITY

Bachelor of Engineering
Subject Code: 3130907
Semester – III
Subject Name: Analog and Digital Electronics

Type of course:

Prerequisite:

Rationale:

Teaching and Examination Scheme:

Teaching Scheme Credits Examination Marks Total

L T P C Theory Marks Practical Marks Marks
ESE (E) PA (M) ESE (V) PA (I)
4 0 2 5 70 30 30 20 150

Content:

Sr. No. Content Total

Hrs

1 Differential, multi-stage and operational amplifiers 10

Differential amplifier; power amplifier; direct coupled multi-stage amplifier; internal
structure of an operational amplifier, ideal op-amp, non-idealities in an op-amp (Output
offset voltage, input bias current, input offset current, slew rate, gain bandwidth product)
2 Linear applications of op-amp 10
Idealized analysis of op-amp circuits. Inverting and non-inverting amplifier, differential
amplifier, instrumentation amplifier, integrator, active filter, P, PI and PID controllers and
lead/lag compensator using an op-amp, voltage regulator, oscillators (Wein bridge and
phase shift). Analog to Digital Conversion.
3 Nonlinear applications of op-amp 8
Hysteretic Comparator, Zero Crossing Detector, Square-wave and triangular-wave
generators. Precision rectifier, peak detector.
4 Combinational Digital Circuits 10
Standard representation for logic functions, K-map representation, simplification of logic
functions using K-map, minimization of logical functions. Don’t care conditions,
Multiplexer, De-Multiplexer/Decoders, Adders, Subtractors, BCD arithmetic, carry look
ahead adder, serial adder, ALU, elementary ALU design, popular MSI chips, digital
comparator, parity checker/generator, code converters, priority encoders, decoders/drivers
for display devices, Q-M method of function realization
5 Sequential circuits and systems 10
A 1-bit memory, the circuit properties of Bi-stable latch, the clocked SR flip flop, J- K-T
and D types flip-flops, applications of flip-flops, shift registers, applications of shift
registers, serial to parallel converter, parallel to serial converter, ring counter, sequence
generator, ripple(Asynchronous) counters, synchronous counters, counters design using
Page 1 of 3

w.e.f. AY 2018-19
 GUJARAT TECHNOLOGICAL UNIVERSITY
Bachelor of Engineering
Subject Code: 3130907
flip flops, special counter IC’s, asynchronous sequential counters, applications of counters.

6 A/D and D/A Converters 8

Digital to analog converters: weighted resistor/converter, R-2R Ladder D/A converter,
specifications for D/A converters, examples of D/A converter lCs, sample and hold circuit,
analog to digital converters: quantization and encoding, parallel comparator A/D converter,
successive approximation A/D converter, counting A/D converter, dual slope A/D
converter, A/D converter using voltage to frequency and voltage to time conversion,
specifications of A/D converters, example of A/D converter ICs

Suggested Specification table with Marks (Theory): (For BE only)

Distribution of Theory Marks

R Level U Level A Level N Level E Level C Level

40 40 10 10 00 00

Legends: R: Remembrance; U: Understanding; A: Application, N: Analyze and E: Evaluate C:

Create and above Levels (Revised Bloom’s Taxonomy)

Note: This specification table shall be treated as a general guideline for students and teachers. The actual
distribution of marks in the question paper may vary slightly from above table.

Reference Books:

1. A. S. Sedra and K. C. Smith, “Microelectronic Circuits”, New York, Oxford University Press,
1998.
2. J. V. Wait, L. P. Huelsman and G. A. Korn, “Introduction to Operational Amplifier theory and
applications”, McGraw Hill U. S., 1992.
3. J. Millman and A. Grabel, “Microelectronics”, McGraw Hill Education, 1988.
4. P. Horowitz and W. Hill, “The Art of Electronics”, Cambridge University Press, 1989.
5. P.R. Gray, R.G. Meyer and S. Lewis, “Analysis and Design of Analog Integrated Circuits”, John
Wiley & Sons, 2001.
6. Ramakant A Gayakwad, Op- Amps and Linear Integrated Circuits, Prentice Hall of India
7. R. P. Jain, "Modern Digital Electronics", McGraw Hill Education, 2009.
8. M. M. Mano, "Digital logic and Computer design", Pearson Education India, 2016.
9. A. Kumar, "Fundamentals of Digital Circuits", Prentice Hall India, 2016.

Course Outcomes:

Sr. CO statement Marks %

No. weightage

CO-1 Describe the functioning and selection of OP-AMP as per application. 25

Page 2 of 3

w.e.f. AY 2018-19
 GUJARAT TECHNOLOGICAL UNIVERSITY
Bachelor of Engineering
Subject Code: 3130907
CO-2 Design and testing of OP-AMP based circuits. 25

CO-3 Design and implement Combinational and Sequential logic circuits. 25

CO-4 Describe the process of Analog to Digital conversion and Digital to Analog 25
conversion.

List of Experiments:

1. Study the different parameter of op-amp.

2. Frequency response of inverting amplifier and non-inverting amplifier.
3. Study of op-amp as inverting amplifier and non-inverting amplifier.
4. OPAMP circuits –integrator, differentiator, and comparator.
5. Phase shift and Wein’s Bridge oscillator with amplitude stabilization using OPAMPs.
6. Waveform generation – Square, triangular and saw tooth wave form generation using OPAMPs.
7. Application of op-amp as low pass filter, high pass filter and band-pass filter.
8. Verification of function of Half/Full adder circuits.
9. Verification of function of Binary to Grey code conversion.
10. Verification of function of Latch and flip-flop.
11 Verification of counter circuit like binary up/down counter, decimal counter, ring counter, Johnson
counter etc.
12. Verification of Specification and Performance indices of D/A and A/D converters

Major Equipment:

 Trainer kits related to Analog and Digital electronics.

List of Open Source Software/learning website:

1. Courses available through NPTEL.

- website : nptel.ac.in

Page 3 of 3

w.e.f. AY 2018-19
 Enrolment No./Seat No_______________

GUJARAT TECHNOLOGICAL UNIVERSITY

BE - SEMESTER–III (NEW) EXAMINATION – SUMMER 2024
Subject Code:3130907 Date:29-06-2024
Subject Name: Analog & Digital Electronics
Time:10:30 AM TO 01:00 PM Total Marks:70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
4. Simple and non-programmable scientific calculators are allowed.
Marks
Q.1 (a) List all ideal characteristics of an Op-Amp. 03
(b) Classify the types of negative feedback and explain each in brief. 04
(c) Draw and explain block diagram of a typical OP-AMP 07

Q.2 (a) Compare the inverting and non-inverting comparators 03

(b) Explain how to generate triangular wave using OPAMP 04
(c) Draw the circuit Op-Amp as a Integrator and explain with necessary waveforms 07
OR
(c) Explain positive peak detector circuit using OPAMP. 07

Q.3 (a) Calculate maximum frequency for a sine wave, output voltage of 12 V peak with an 03
OPAMP having slew rate 1 V/µS
(b) Explain the use of external offset voltage compensation circuits in op amps. 04
(c) Explain the working of J- K flip flop with the help of diagram 07
OR
Q.3 (a) Reduce the following function using Boolean Algebra’s Laws and Theorems 03
F=AB’C + B + BD’ + ABD’ + A’C
(b) Explain the operation of Zero crossing detector. 04
(c) Describe 3 to 8 line decoder with logic diagram and truth table. 07

Q.4 (a) Compare decoder and demultiplexer. 03

(b) Draw and Explain 4-bit bidirectional Shift Register. 04
(c) Implement a full adder using 8 : 1 multiplexer. 07
OR
Q.4 (a) Differentiate the Asynchronous counter and Synchronous counter 03
(b) Simply the following function using K map and implement using logic gates. 04
F = ∑m(2,9,10,12,13) +D(15,14)
(c) Explain full subtractor and construct full subtractor using half subtractors. 07

Q.5 (a) Define following specification of ADC i) Resolution 03

ii)Conversion time and iii) Quantization error
(b) Explain R-2R ladder DAC with necessary diagram 04
(c) Describe operation of D/A converter with binary – weighted resistors 07
OR
Q.5 (a) Explain terms Accuracy and settling time for DAC 03
(b) What will be resolution of 4 bit ADC with 5V input? Define quantization error for ADC. 04
(c) Explain working of successive approximation type ADC 07
**************

1
Seat No.: ________ Enrolment No.___________

GUJARAT TECHNOLOGICAL UNIVERSITY

BE - SEMESTER–III (NEW) EXAMINATION – WINTER 2023
Subject Code:3130907 Date:18-01-2024
Subject Name:Analog & Digital Electronics
Time:10:30 AM TO 01:00 PM Total Marks:70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
4. Simple and non-programmable scientific calculators are allowed.
MARKS
Q.1 (a) Draw transistor C-E amplifier circuit. Draw its ac equivalent circuit. 03
(b) What is cross over distortion in power amplifier? 04
(c) Draw equivalent circuit of OP-Amp. Explain each part. 07

Q.2 (a) List applications of instrumentation amplifier. 03

(b) Prove that voltage follower has unity gain. 04
(c) Discuss the classification of active filter and explain the frequency 07
response of each type.
OR
(c) What do you mean by slew rate in an OP-AMP? Also mention about 07
causes of slew rate and explain its significance in applications.

Q.3 (a) How to detect peak of waveform using OP-AMP? 03

(b) Sketch and explain Wein bridge oscillator. 04
(c) Draw and explain the use of op-amp as a zero-crossing detector. 07
OR
Q.3 (a) Explain how to generate triangular wave using OPAMP. 03
(b) Write a short note on Precision rectifier. 04
(c) Draw and explain the block diagram of basic three terminal IC 07
regulator.

Q.4 (a) Explain the different types of triggering methods used for flip flops. 03
(b) Write short note on binary codes. 04
(c) Explain Master-Slave J-K flip-flop configuration. 07
OR
Q.4 (a) What is multiplexer? 03
(b) Design full adder circuit. 04
(c) Minimize following Boolean function using K-map and implement 07
using basic logic gates:
F(A,B,C,D) = ∑m(1, 2, 3, 8, 9, 11, 14) with d(7, 15)

Q.5 (a) Define following specification of DAC 03

a) Accuracy b) Resolution c) Setting time
(b) Compare combinational logic circuit with sequential logic circuit. 04
(c) Design a 4 bit synchronous up counter. 07

1
 OR
Q.5 (a) Sketch sample and hold circuit and explain its working. 03
(b) Which are the different methods for A/D conversion? 04
(c) Explain in detail 7 segment LED display. 07

*************

2
Seat No.: ________ Enrolment No.___________

GUJARAT TECHNOLOGICAL UNIVERSITY

BE - SEMESTER–III(NEW) EXAMINATION – SUMMER 2023
Subject Code:3130907 Date:28-07-2023
Subject Name:Analog & Digital Electronics
Time:02:30 PM TO 05:00 PM Total Marks:70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
4. Simple and non-programmable scientific calculators are allowed.

MARKS
Q.1 (a) Define Slew Rate, CMRR, & Input Offset Voltage. 03
(b) What is cross over distortion in power amplifier? 04
(c) Sketch the block schematic of a typical operational amplifier and 07
briefly explain the function of each block.

Q.2 (a) List applications of instrumentation amplifier. 03

(b) Design an R-C phase shift oscillator to produce a sinusoidal 04
output at 1KHz, using capacitor value 0.1 μF.
(c) Draw integrator circuit with example of input and output 07
Waveforms. Derive expression for output voltage.
OR
(c) Draw & explain in detail the logic diagram & the truth table of 07
clocked SR flip-flop.

Q.3 (a) For an inverting amplifier, V1 = 1V, V2 = 3V, V3 = 2V with R1 03

= R2 = R3 = 2KΩ and RF = 3KΩ. Determine the output voltage.
(b) Implement the following function using 8:1 Multiplexer. 04
F(A,B,C,D) =A̅BD̅ +ACD +B̅CD+A̅C̅D
(c) Explain the circuit diagram of op-amp as a Peak detector. 07
OR
Q.3 (a) Simplify A̅BCD̅ +BCD̅ +BC̅D̅ +BC̅D. 03
(b) Classify digital logic gates. Draw truth table and symbols of basic 04
logic gates.
(c) Prove that NAND and NOR gates are universal gates. 07

Q.4 (a) Design D FF using SR FF. Write truth table of D FF. 03

(b) Explain Master-Slave J-K flip-flop configuration. 04
(c) Simplify the Boolean function F(A,B,C,D) = Σm 07
(1,5,6,12,13,14), Σd=(2,4) using K-map method. Implement
using basic logic gates.
OR
Q.4 (a) Design half subtractor logic circuit. 03
(b) Write short note on Gray code. 04
(c) Explain Half Adder circuit .Explain Full adder circuit with the 07
help of two Half adder.

Q.5 (a) Compare RC phase shift and Wien bridge oscillator. 03

(b) Explain R-2R ladder DAC with necessary diagram. 04
(c) Explain the working of Zero crossing Detector. 07
1
 OR
Q.5 (a) Define following 03
a) Attenuation b) Pass Band c) Cut of frequency
(b) Draw Schmitt trigger circuit. Plot input and output waveforms. 04
(c) List out various commonly used A/D converters. Draw & explain 07
Flash A/D converter with necessary decoding table. Also mention
pros & cons of the same.

*************

2
Seat No.: ________ Enrolment No.___________

GUJARAT TECHNOLOGICAL UNIVERSITY

BE - SEMESTER– III(NEW) EXAMINATION – WINTER 2022
Subject Code:3130907 Date:24-02-2023
Subject Name:Analog & Digital Electronics
Time:02:30 PM TO 05:00 PM Total Marks:70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
4. Simple and non-programmable scientific calculators are allowed.

Marks
Q.1 (a) Define the following 03
a)Input Offset Current
b) Slew Rate
c)Input Bias Current
(b) Explain the ideal voltage transfer characteristics of Op-Amp. 04

(c) Draw the block schematic of a typical operational amplifier Op-Amp and 07
briefly explain the function of each block.

Q.2 (a) Explain the procedure of offset voltage compensation in an op amp. 03

(b) Explain voltage follower with it’s application. 04
(c) Draw and explain working of Op-amp base Wien Bridge oscillator with 07
it’s advantages and application.
OR
(c) With neat circuit diagram explain the working of an Integrator with 07
relevant waveforms.

Q.3 (a) Implement the following logic function using the 8:1 multiplexer. 03
F(A,B,C) =ΠM(0,1,3,5,7)
(b) Minimize the following expression and realize using basic gates. 04
Y=Σ m(0,2,5,6,7,8,10,13,15)
(c) Simplify the Boolean function F= A̅B̅C̅ +AB̅D + A̅B̅CD̅ using don’t care 07
conditions d= ABC +A B̅D̅ in
1) Sum of products (SOP)and
2) Product of sums(POS) by means of K Map and implement it with no
more than two NOR gates. Assume that both the normal and complement
inputs are available.
OR
Q.3 (a) Compare Multiplexer and Demultiplexer. 03
(b) Explain how Demultiplexer can be used as a 3:8 Decoder. 04
(c) Derive full subtractor with the help of necessary truth table and K –map. 07
Also express in terms of logic diagram.

Q.4 (a) What are Preset and Clear inputs with flip flop? Why are they provided 03
with flip flop?
(b) Classify the various modes of operation of shift register. 04
(c) Explain the working of Master Slave JK flip flop. 07
OR
Q.4 (a) Differentiate between combinational logic circuit and sequential logic 03
circuit.

1
 (b) Write a short notes on Parallel in serial out shift register. 04
(c) Explain S R flip flop with it’s working operation. 07

Q.5 (a) Compare various D/A converters. 03

(b) Define 3- bit parity generator circuit using even parity bit. 04
(c) Explain R-2R ladder DAC with necessary diagram. 07
OR
Q.5 (a) Define following specification of ADC 03
1)Conversion Time
2)Resolution
3)Quantization
(b) State the difference between Asynchronous and Synchronous counters. 04
(c) Explain working of Successive approximation type ADC 07
.

2
Seat No.: ________ Enrolment No.___________

GUJARAT TECHNOLOGICAL UNIVERSITY

BE - SEMESTER–III (NEW) EXAMINATION – WINTER 2021
Subject Code:3130907 Date:21-02-2022
Subject Name:Analog & Digital Electronics
Time:10:30 AM TO 01:00 PM Total Marks:70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
4. Simple and non-programmable scientific calculators are allowed.

MARKS
Q.1 (a) Define following a) CMRR b)PSRR c)Input Offset voltage 03
(b) What is cross over distortion in power amplifier? 04
(c) Draw and explain the equivalent circuit of OP-Amp. 07

Q.2 (a) Define Slew Rate .Also mention about causes of slew rate. 03
(b) Draw the basic Integrator using OP-Amp. Derive the output equation of 04
Integrator.
(c) Derive an expression for the output of a Inverting Summing amplifier 07
with three input and Average amplifier.
OR
(c) Discuss the classification of active filter and explain the frequency 07
response of each type.

Q.3 (a) Simplify A̅BCD̅ +BCD̅ +BC̅D̅ +BC̅D 03

(b) Realize expression using minimum NAND gates only 04
Y = AB̅+ AC̅ + C +AD + AB̅C + ABC
(c) For the following function implement the SOP and POS circuit 07
F(A,B,C,D ) = Σm (2,3,5,7,12) + Σd (6,13,14,15)
OR
Q.3 (a) Simplify the Boolean function with K map 03
F(a, b, c, d) = Σ(0,1,2,4,5,6,8,9,12,13,14)
(b) Implement the following function using 8:1 Multiplexer. 04
F(A,B,C,D) =A̅BD̅ +ACD +B̅CD+A̅C̅D
(c) Explain Half Adder circuit .Explain Full adder circuit with the help of 07
two Half adder.

Q.4 (a) Compare RC phase shift and Wien bridge oscillator. 03

(b) Write a short note on Precision rectifier. 04
(c) Explain the working of Zero crossing Detector. 07
OR
Q.4 (a) Define following 03
a) Attenuation b) Pass Band c) Cut of frequency
(b) Draw the peak detector circuit using Op-amp and explain it’s operation. 04
(c) Draw and explain the block diagram of basic three terminal IC 07
Regulator.

Q.5 (a) Explain the different types of triggering methods used for flip flops. 03
(b) Write a note on serial in parallel out operation of shift register. 04
(c) Explain the Binary Weighted register technique of D/A converter. 07
OR
1
 Q.5 (a) Define following specification of DAC 03
a) Accuracy b) Resolution c) Setting time
(b) Which are the different methods for A/D conversion ? 04
(c) Draw and explain the working of 4 bit Ring counter. 07

.
*************

2
Seat No.: ________ Enrolment No.___________

GUJARAT TECHNOLOGICAL UNIVERSITY

BE - SEMESTER–III (NEW) EXAMINATION – SUMMER 2021
Subject Code:3130907 Date:11/09/2021
Subject Name:Analog & Digital Electronics
Time:10:30 AM TO 01:00 PM Total Marks:70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
4. Simple and non-programmable scientific calculators are allowed.

MARKS
Q.1 (a) Draw transistor C-E amplifier circuit. Draw its ac equivalent circuit. 03
(b) Sketch the block schematic of a typical operational amplifier and 04
briefly explain the function of each block.
(c) Explain how Op-amp works as summing amplifier. 07
Q.2 (a) List applications of instrumentation amplifier. 03
(b) Explain the following terms. (1) PSRR (2) Input bias current (3) Input 04
offset Voltage (4) CMRR.
(c) Explain in detail voltage follower with its applications. 07
OR
(c) What do you mean by slew rate in an OP-AMP? Also mention about 07
causes of slew rate and explain its significance in applications.
Q.3 (a) What are the advantages of active filters over passive filters? 03
(b) Sketch Wein bridge oscillator. Explain working. 04
(c) Draw the circuit op-amp as differentiator and explain with necessary 07
waveforms.
OR
Q.3 (a) How to detect peak of waveform using OP-AMP? 03
(b) Compare: Comparator and Schmitt trigger. 04
(c) Draw and explain the use of op-amp as a zero crossing detector. 07
Q.4 (a) Compare SOP and POS. 03
(b) Write short note on Gray code. 04
(c) Prove that NAND and NOR gates are universal gates. 07
OR
Q.4 (a) Design half subtractor logic circuit. 03
(b) Explain Master-Slave J-K flip-flop configuration. 04
(c) Simplify the Boolean function F(A,B,C,D) = Σm (2,5,7,8,11,14,15), 07
Σd=(0,3,6,10) using K-map method. Implement using basic logic
gates.
Q.5 (a) Sketch sample and hold circuit and explain its working. 03
(b) Explain resolution and quantization error in reference to ADC. 04
(c) Design 4-bit up/down ripple counter. 07
OR
Q.5 (a) Compare EPROM with FLASH memory. 03
(b) Explain R-2R ladder DAC with necessary diagram. 04
(c) Draw 4-bit down counter; explain its working with timing diagram and 07
truth table.

*************

1
Seat No.: ________ Enrolment No.___________

GUJARAT TECHNOLOGICAL UNIVERSITY

BE- SEMESTER–III (NEW) EXAMINATION – WINTER 2020
Subject Code:3130907 Date:04/03/2021
Subject Name:Analog & Digital Electronics
Time:10:30 AM TO 12:30 PM Total Marks:56
Instructions:
1. Attempt any FOUR questions out of EIGHT questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
MARKS

Q.1 (a) Define Slew Rate, CMRR, & Input Offset Voltage. 03
(b) Compare inverting and non-inverting op-amps. 04
(c) Draw & explain in detail the logic diagram & the truth table of clocked SR 07
flip-flop.

Q.2 (a) Draw block diagram of an op-amp. 03

(b) Draw and explain working of zero crossing detector. 04
(c) List out and discuss all the ideal characteristics of an op-amp. 07

Q.3 (a) For an inverting amplifier, V1 = 1V, V2 = 3V, V3 = 2V with R1 = R2 = R3 = 03

2KΩ and RF = 3KΩ. Determine the output voltage.
(b) Design an R-C phase shift oscillator to produce a sinusoidal output at 1KHz, 04
using capacitor value 0.01 μF.
(c) Write a short note on instrumentation amplifier using op-amp. 07

Q.4 (a) Explain the application of an op-amp as an integrator. 03

(b) Design full adder logic circuit using 3 x 8 decoder and OR gates. 04
(c) Explain the circuit diagram of op-amp as a Peak detector. 07

Q.5 (a) Design D FF using SR FF. Write truth table of D FF. 03

(b) Minimize following Boolean function using K-map: 04
F(A,B,C,D) = Π M(1, 2, 3, 8, 9, 11, 14) • d(7, 15)
(c) Given a logic function: Z = ABC + BC’D + A’BC. 07
a) Make a truth table.
b) Simplify using K-map.
c) Realize simplified function using NAND gates only.

Q.6 (a) Minimize following Boolean function using K-map: 03

Y(A,B,C,D) = Σ m(0, 3, 5, 6, 9, 10, 12, 15)
(b) Implement the following logic function using 8:1 multiplexer: 04
F(A, B, C, D) = ∑ m(0, 1, 3, 4, 8, 9, 15)
(c) Design a 4-bit synchronous down counter using T flip-flops. 07

Q.7 (a) Compare combinational logic circuit with sequential logic circuit. 03
(b) Draw basic internal structure of 7490 ripple counter IC. Design BCD counter 04
using 7490 IC.
(c) Draw & explain R-2R ladder D/A converter with necessary equations. 07

1
Q.8 (a) Draw the logic diagram of 4-bit ripple up counter using JK FFs. 03
(b) Write a brief note on quantization and encoding. 04

(c) List out various commonly used A/D converters. Draw & explain Flash A/D 07
converter with necessary decoding table. Also mention pros & cons of the
same.

*************

2
Seat No.: ________ Enrolment No.___________

GUJARAT TECHNOLOGICAL UNIVERSITY

BE - SEMESTER– III (New) EXAMINATION – WINTER 2019
Subject Code: 3130907 Date: 30/11/2019
Subject Name: Analog & Digital Electronics
Time: 02:30 PM TO 05:00 PM Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
Marks
Q.1 (a) What is ideal differential amplifier? 03
(b) Design half adder circuit. 04
(c) Compare different types of power amplifiers. 07

Q.2 (a) Calculate maximum frequency for a sine wave, output voltage of 03
12 V peak with an OPAMP having slew rate 1 V/µS.
(b) Prove that voltage follower has unity gain. 04
(c) Draw integrator circuit with example of input and output 07
waveforms. Derive expression for output voltage.
OR
(c) Write short note on Wien bridge oscillator using OPAMP. 07
Q.3 (a) Explain zero crossing detector. 03
(b) Explain how to generate triangular wave using OPAMP. 04
(c) Explain first order Butterworth low-pass filter. Derive expression 07
of filter gain.
OR
Q.3 (a) Explain window comparator. 03
(b) Draw Schmitt trigger circuit. Plot input and output waveforms. 04
(c) Explain positive peak detector circuit using OPAMP. 07
Q.4 (a) What is multiplexer? 03
(b) Classify digital logic gates. Draw truth table and symbols of basic 04
logic gates.
(c) Design a combinational circuit which has 3 bit binary input and 07
has output as square of inputs.
OR
Q.4 (a) Design full adder circuit. 03
(b) Describe POS and SOP with example. 04
(c) Explain in detail 7 segment LED display. 07

Q.5 (a) Explain digital to analog converter with binary weighted resisters. 03
(b) Explain positive edge triggered JK flip-flop. 04
(c) Explain 4 bit ring counter using waveforms. 07
OR
Q.5 (a) What are preset and clear inputs with flip-flops? Why are they 03
provided?
(b) Explain master slave JK flop-flop. 04
(c) Design a 4 bit synchronous up counter. 07

****************